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Part : XC95216-15HQ208C Supplier : Xilinx Manufacturer : Bristol Electronics Stock : 71 Best Price : - Price Each : -
Part : XC95216-10HQ208C Supplier : Xilinx Manufacturer : basicEparts Stock : 8 Best Price : - Price Each : -
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XC95216 Datasheet

Part Manufacturer Description PDF Type
XC95216 Xilinx In-System Programmable CPLD Family Original
XC95216 Xilinx The Programmable Logic Data Book Original
XC95216 Xilinx XC95216 In-System Programmable CPLD Original
XC95216-10BG352C Xilinx In-System Programmable CPLD Original
XC95216-10BG352C Xilinx In-System Programmable CPLD Original
XC95216-10BG352C Xilinx Embedded - CPLDs (Complex Programmable Logic Devices), Integrated Circuits (ICs), IC CPLD 216MC 10NS 352BGA Original
XC95216-10BG352C Xilinx Over 600 obsolete distributor catalogs now available on the Datasheet Archive - CPLDs XCR Series CPLDs - 3 V and 5 V Fast Zero Power CoolRunner Scan
XC95216-10BG352I Xilinx In-System Programmable CPLD Original
XC95216-10BG352I Xilinx In-System Programmable CPLD Original
XC95216-10BG352I Xilinx Embedded - CPLDs (Complex Programmable Logic Devices), Integrated Circuits (ICs), IC CPLD 216MC 10NS 352BGA Original
XC95216-10BGG352C Xilinx XC95216-10BGG352C - NEW PRODUCT Original
XC95216-10BGG352I Xilinx XC95216-10BGG352I - NEW PRODUCT Original
XC95216-10BQ352C Xilinx In-system programmable CPLD. Speed 10ns pin-to-pin delay. Original
XC95216-10BQ352I Xilinx In-system programmable CPLD. Speed 10ns pin-to-pin delay. Original
XC95216-10HQ208C Xilinx In-System Programmable CPLD Original
XC95216-10HQ208C Xilinx In-System Programmable CPLD Original
XC95216-10HQ208C Xilinx Embedded - CPLDs (Complex Programmable Logic Devices), Integrated Circuits (ICs), IC CPLD 216MC 10NS 208HQFP Original
XC95216-10HQ208C Xilinx Over 600 obsolete distributor catalogs now available on the Datasheet Archive - CMOS CPLD, 216 Macrocells, 12 Func Blks, 216 Regs, 10ns, Pkg Style 208 Lead QFP Scan
XC95216-10HQ208I Xilinx In-System Programmable CPLD Original
XC95216-10HQ208I Xilinx In-System Programmable CPLD Original
Showing first 20 results.

XC95216

Catalog Datasheet MFG & Type PDF Document Tags

XC95216

Abstract: 22.0 5.5 XC95216-15 Min Max 15.0 10.0 0.0 10.0 XC95216-20 Min Max 20.0 Units ns ns ns ns MHz MHz ns ns , disabled GCK pulse width (High or Low) XC95216-10 Min 6.5 0.0 6.5 111 67 2.5 4.0 10.5 10.0 10.0 15.5 15.5 , Slew-rate limited delay ÌSLEW Q_ Parameter XC95216-10 Min Max 3.5 3.0 6.0 10.0 3.0 0.0 3.5 2.5 12.0 1.0 3.5 3.0 0.5 7.0 10.0 2.5 11.0 8.5 2.5 1.0 4.5 XC95216-15 Min Max 4.5 3.0 7.5 15.0 4.5 0.0 2.5 3.0 13.5 3.0 3.5 4.5 0.5 8.0 15.0 3.0 11.5 11.0 3.5 1.5 5.0 XC95216-20 Min Max 6.5 3.0 9.5 20.0 6.5
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OCR Scan
36V18 XC9500 PQ160 160-P HQ208 208-P

471 E25

Abstract: PQ160 output disabled GCK pulse width (High or Low) XC95216-10 XC95216-15 XC95216-20 Min Min , Adders tPTA3 Incremental Product Term Allocator delay tSLEW Slew-rate limited delay XC95216-10 XC95216-15 XC95216-20 Min Min Max Max Min Max Units 3.5 2.5 6.0 6.0 3.0 0.0 , 1 XC95216 In-System Programmable CPLD ® December 4, 1998 (Version 3.0) 1 12 , packages Power dissipation can be reduced in the XC95216 by configuring macrocells to standard or
Xilinx
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471 E25 BG352 352-P

471 E25

Abstract: XC95216 Family limited delay XC95216-10 XC95216-15 XC95216-20 Min Max Min Max Min Max Units 3.5 , term OE to output enabled Product term OE to output disabled GCK pulse width (High or Low) XC95216-10 XC95216-15 XC95216-20 Min Max Min 10.0 6.0 0.0 Min Max 15.0 8.0 0.0 6.0 111.1 , 1 XC95216 In-System Programmable CPLD August 21, 2001 (Version 3.1) 1 0 , packages Power dissipation can be reduced in the XC95216 by configuring macrocells to standard or
Xilinx
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XC95216 Family 134-174

xc95216

Abstract: 352-BALL package with part marking. Device Ordering and Part Marking Number XC95216-10PQ160C XC95216-10HQ208C XC95216-10BG352C XC95216-10PQ160I XC95216-10HQ208I XC95216-10BG352I XC95216-15PQ160C XC95216-15HQ208C XC95216-10BG352C XC95216-15PQ160I XC95216-15HQ208I XC95216-15BG352I XC95216-20PQ160C XC95216-20HQ208C XC95216-20BG352C XC95216-20PQ160I XC95216-20HQ208I XC95216-20BG352I Speed (pin-to-pin delay) 10 ns 10 , 0 6.5 3.0 9.5 16.0 6.5 0 ns ns ns ns ns ns Parameter Min Max XC95216-15 Min Max XC95216-20 Min Max
Xilinx
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352-BALL DS068

XC95216

Abstract: XC95216-10PQ160I Ordering and Part Marking Number XC95216-10PQ160C XC95216-10HQ208C XC95216-10BG352C XC95216-10PQ160I XC95216-10HQ208I XC95216-10BG352I XC95216-15PQ160C XC95216-15HQ208C XC95216-10BG352C XC95216-15PQ160I XC95216-15HQ208I XC95216-15BG352I XC95216-20PQ160C XC95216-20HQ208C XC95216-20BG352C XC95216-20PQ160I XC95216-20HQ208I XC95216-20BG352I Speed (pin-to-pin delay) 10 ns 10 ns 10 ns 10 ns 10 ns 10 ns 15 ns 15 , Min Max XC95216-15 Min Max XC95216-20 Min Max Units Product Term Control Delays TPTCK TPTSR TPTTS
Xilinx
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5216-20HQ208C

XC952

Abstract: designs spanning multiple: FBs. XC95216-15 Min 8.0 0.0 8.0 Max 15.0 XC95216-20 Units Min 10.0 0.0 , Characteristics XC95216-10 Parameter Min I/O to output valid I/O setup tim e before GCK I/O hold time after GCK G , l CL 35 pF 35 pF X5222 Figure 3: AC Load Circuit Internal Timing Parameters XC95216-10 , of the function as defined in the fam ily data sheet. XC95216-15 Min Max 4.5 3.0 7.5 15.0 4.5 0.0 2.5 3.0 13.5 3.0 3.5 4.5 0.5 8.0 XC95216-20 Units Min Max 6.5 3.0 9.5 20.0 6.5 0.0 2.5 3.0 15.5 4.0
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OCR Scan
XC952

XC95216-20PQG160I

Abstract: XC95216-15PQ160I XC95216-10 Symbol XC95216-20 Min Max Min Max Min Max Units - 10.0 - , Parameter XC95216-15 XC95216-20 Min Max Min Max Min Max Units Buffer Delays , XC95216-10PQG160I 10 ns Plastic Quad Flat Pack (PQFP); Pb-Free I PQG160 160-pin XC95216-10HQ208I , (HQFP) C XC95216-10BG352C 15 ns BG352 352-ball Ball Grid Array (BGA) C XC95216-15PQ160I , XC95216-20PQG160C 20 ns Plastic Quad Flat Pack (PQFP); Pb-Free C PQG160 160-pin XC95216-20HQ208C
Xilinx
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XC95288 XCN07010 XC95216-20PQG160I XC95216-15PQG160C XC95216-15PQG160I BGG252

471 E25

Abstract: XC95216-20PQ160I XC95216-10 Symbol XC95216-20 Min Max Min Max Min Max Units - 10.0 - , Parameter XC95216-15 XC95216-20 Min Max Min Max Min Max Units Buffer Delays , ) C XC95216-10PQ160I 10 ns PQ160 160-pin Plastic Quad Flat Pack (PQFP) I XC95216-10HQ208I , XC95216-15PQ160I 15 ns PQ160 160-pin Plastic Quad Flat Pack (PQFP) I XC95216-15HQ208I , XC95216-20PQ160I 20 ns PQ160 160-pin Plastic Quad Flat Pack (PQFP) I XC95216-20HQ208I
Xilinx
Original
XC95216-10PQ160 n439 DS06

471 E25

Abstract: PQ160 ) XC95216-10 XC95216-15 XC95216-20 Min Max Min 10.0 6.5 0.0 Max 6.5 20.0 10.0 0.0 , Adders tPTA3 Incremental Product Term Allocator delay tSLEW Slew-rate limited delay XC95216-10 XC95216-15 XC95216-20 Min Max Min Max Min Max Units 3.5 3.0 6.0 10.0 3.0 0.0 , 0 XC95216 In-System Programmable CPLD ® October 28, 1997 (Version 2.0) 0 3 , in the XC95216 by configuring macrocells to standard or low-power modes of operation. Unused
Xilinx
Original

HQ208

Abstract: PQ160 rate time delay XC95216-15 XC95216-20 Min tPD tSU tH tCO fCNT fSYSTEM 1 tPSU tPH tPCO , XC95216 In-System Programmable CPLD AC Characteristics Symbol Note: XC95216-10 I/O to output , ® XC95216 In-System Programmable CPLD August 1, 1996 (Version 1.1) Preliminary Product , XC95216 by configuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize power dissipation. Description The XC95216 is a high-performance CPLD
Xilinx
Original
X5088 PQ100 TQ100 X5089

irf 3025

Abstract: EPCOS 3557 XC17V08PC44C 48.04 XLX 862 XC95216-10PQ160C 59.38 XLX 865 XCR3064A-10VQ100C 12.24 XLX — XC1765EVO8I 6.74 XLX 862 XC17V08PC44I 56.74 XLX 862 XC95216-15BG352C 95.76 XLX 865 XCR3064A-10VQ44C 9.43 XLX — XC1765LVO8C 7.32 XLX 862 XC17V08VQ44C 48.04 XLX 862 XC95216-15HQ208C 42.02 XLX 865 XCR3064A-7PC44C 11.99 XLX — XC17S05PD8C 3.04 XLX 863 XC17V08VQ44I 56.74 XLX 862 XC95216-15PQ160C 35.04 XLX 865 XCR3064A-7VQ100C 15.04 XLX — XC17S05PD8I 3.70 XLX 863 XC17V16PC44C 65.00 XLX 862 XC95216-20BG352C 506.02 XLX 865 XCR3064A
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XCR3064-10PC44C XCR5128-12PQ100C XC95144XL-10TQ144C irf 3025 EPCOS 3557 XC3090A-6PC84C XC95108-10PQ160C 10PQ100C XC1765EVO8C XCR3064A-7VQ44C XC17S05VO8C XC17V16PC44I XCR3064XL-10CP56C XC17S05VO8I

xc95216-20pq160c

Abstract: . Device Ordering and Part Marking Number XC95216-10PQ160C XC95216-10PQG160C XC95216-10HQ208C XC95216-10BG352C XC95216-10PQ160I XC95216-10PQG160I XC95216-10HQ208I XC95216-10BG352I XC95216-15PQ160C XC95216-15PQG160C XC95216-15HQ208C XC95216-10BG352C XC95216-15PQ160I XC95216-15PQG160I XC95216-15HQ208I XC95216-15BG352I XC95216-20PQ160C XC95216-20PQG160C XC95216-20HQ208C XC95216-20BG352C XC95216-20PQ160I XC95216-20PQG160I , 6.5 0 ns ns ns ns ns ns Parameter Min Max XC95216-15 Min Max XC95216-20 Min Max Units Product Term
Xilinx
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XCN11010

XC95216-10PQG160I

Abstract: XC95216-10PQG160C Part Marking Number XC95216-10PQ160C XC95216-10PQG160C XC95216-10HQ208C XC95216-10BG352C XC95216-10PQ160I XC95216-10PQG160I XC95216-10HQ208I XC95216-10BG352I XC95216-15PQ160C XC95216-15PQG160C XC95216-15HQ208C XC95216-10BG352C XC95216-15PQ160I XC95216-15PQG160I XC95216-15HQ208I XC95216-15BG352I XC95216-20PQ160C XC95216-20PQG160C XC95216-20HQ208C XC95216-20BG352C XC95216-20PQ160I XC95216-20PQG160I XC95216-20HQ208I , Characteristics XC95216-10 Symbol TPD TSU TH TCO fCNT (1) (2) XC95216-15 Min 8.0 0 95.2 55.6 4.0 4.0 5.5 8.0
Xilinx
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XC95216-15PQ160

PQ160

Abstract: XC9500 output disabled GCK pulse width (High or Low) XC95216-10 XC95216-15 XC95216-20 Min Max Min , Adders tPTA3 Incremental Product Term Allocator delay tSLEW Slew-rate limited delay XC95216-10 XC95216-15 XC95216-20 Min Max Min Max Min Max Units 3.5 2.5 6.0 6.0 3.0 0.0 , 1 XC95216 In-System Programmable CPLD August 21, 2001 (Version 3.1) 1 0 , packages Power dissipation can be reduced in the XC95216 by configuring macrocells to standard or
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Original
Abstract: Symbol Parameter XC95216-10 XC95216-15 XC95216-20 Units Min Max Min Max Min , , = GND, No load f = 1.0 MHz 2 0 0 (typ) ma AC Characteristics XC95216-10 Symbol XC95216-15 XC95216-20 Parameter Units Min Max Min Max Min Max tsu I/O to , HXILINX* XC95216 In-System Programmable CPLD April, 1997 (Version 1.0) Product , -pin HQFP packages Power dissipation can be reduced in the XC95216 by con­ figuring macrocells to -
OCR Scan

HP 3070 Manual

Abstract: HP 3070 series 3 Manual xc95216_v0.bsd 3. Rename xc95108_v1.bsd to xc95108.bsd 4. Rename xc95216_v1.bsd to xc95216.bsd Invoke the JTAG , xc95108_v1.bsd 2. Rename xc95216.bsd to xc95216_v1.bsd 3. Rename xc95108_v0.bsd to xc95108.bsd 3. Select , xc95216_v1:design216a xc95108_v1:design108 xc95216_v1:design216b XAPP113 July 22, 1998 (Version 1.0 , directory you will notice BSDL files with the following names: xc95108.bsd xc95108_v1.bsd xc95216.bsd xc95216_v1.bsd 4. In another window, erase_design108.svf. rename design108.svf to 5. Then
Xilinx
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XC95108 HP 3070 Manual HP 3070 series 3 Manual HP 3070 Tester PB-0300 PB05 PAD120
Abstract: ma 200 (typ) AC Characteristics XC95216-10 Symbol XC95216-15 XC95216-20 Parameter , Output Type 3.3 V 260 a 360 a 35 pF AC Load Circuit Internal Timing Parameters XC95216-10 Symbol XC95216-15 XC95216-20 Parameter Units Min Max Min Max Min Max , flX IU N X XC95216 In-System Programmable CPLD October 28, 1997 (Version 2.0) Product , , 352-pin BGA, and 208-pin HQFP packages Power dissipation can be reduced in the XC95216 by con -
OCR Scan
Abstract: 4.5 XC95216-15 Min Max 4.5 3.0 7.5 11.0 4.5 0.0 2.5 3.0 5.0 3.0 3.5 4.5 XC95216-20 Units Min , Characteristics XC95216-10 Symbol tpD ts u tH tc o fCNT1 Parameter Min I/O to output valid I/O setup time , 6.0 6.0 10.0 10.0 4.5 6.0 0.0 6.0 XC95216-15 Min 8.0 0.0 8.0 95.2 55.6 4.0 4.0 12.0 11.0 11.0 14.0 14.0 5.5 XC95216-20 Units Min 10.0 0.0 10.0 83.3 50.0 4.0 6.0 16.0 16.0 16.0 18.0 18.0 5.5 Max , pF Figure 3: AC Load Circuit Internal Timing Parameters XC95216-10 Symbol Buffer Delays t|N -
OCR Scan

XC95144XL-10TQ100C

Abstract: XC95144-10PQ100C XC95144-15PQ160C — — 15.0 160 144 8 144 133 — XC95144-20PQ160C — — 20.0 160 144 8 144 133 13 — XC95216-10PQ160C XC95216-10BG352C — 10.0 160/352 216 12 216 133/166 — XC95216-15PQ160C XC95216-15BG352C — 15.0 160/352 216 12 216 133/166 — XC95216-20PQ160C XC95216-20BG352C — 20.0 160/352 216 12 216 133/166 — XC95216-10HQ208C — — 10.0 208 216 12 216 166 — XC95216-15HQ208C — — 15.0 208 216 12 216 166 — XC95216-20HQ208C — — , Features and Performance XC9536/XL XC9572/XL XC95108/XL XC95144/XL XC95216/XL XC95288/XL Output Drive (mA
Allied Electronics Catalog
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XCR3128XL-7TQ144C XCR3384XL-10PQ208C XC95144XL-10TQ100C XC95288XL-6TQ144C XC95144-10PQ100C XC9572-10PC44C CoolRunner xc9536 xc9572 XCR3128XL-7CS144C XCR3128XL-10TQ144C XCR3128XL-10CS144C XCR3256XL-7TQ144C XCR3256XL-10TQ144C

PQ160

Abstract: XC9500 disabled GCK pulse width (High or Low) XC95216-10 XC95216-15 XC95216-20 Min Max 10.0 6.5 0.0 , Product Term Allocator delay tSLEW Slew-rate limited delay XC95216-10 XC95216-15 XC95216-20 Min , ® XC95216 In-System Programmable CPLD March, 1997 (Version 1.1) Product Specification , -pin PQFP and 208-pin HQFP packages Power dissipation can be reduced in the XC95216 by configuring , dissipation. The XC95216 is a high-performance CPLD providing advanced in-system programming and test
Xilinx
Original

XC9500 pinout

Abstract: AC24-AC25 11.35 V XC95144 25 10.20 10.40 V XC95216 21 10.8 11.2 V XC95216 , 11.15 11.35 V XC95144 25 10.60 10.80 V XC95216 21 10.8 11.2 V XC95216 28 11.15 11.35 V XC95288 5/1/98 Rev. 2.6 5.35 XC95288 VPP Program 5.15 XC95216 VPPPROG 23 XC95216 VPP Erase V XC95144 VPPERS 5.35 XC95108 Nominal , PROGRAMMER QUALIFICATION SPECIFICATION XC9500 FAMILY XC95216 Programming Signal Definitions Pin Type
Xilinx
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XC9500 pinout AC24-AC25 XC95288 Family xc95144 pinout Fuse n25 xilinx xc9536
Showing first 20 results.