NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| XC5VLX50T-1FF1136C | Xilinx, Inc. | XC5VLX50T-1FF1136C - NEW PRODUCT |
13 pages, |
Original |  |
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| XC5VLX50T-1FF1136I | Xilinx, Inc. | XC5VLX50T-1FF1136I - NEW PRODUCT |
13 pages, |
Original | |
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| XC5VLX50T-1FF665C | Xilinx, Inc. | XC5VLX50T-1FF665C - NEW PRODUCT |
13 pages, |
Original | |
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| XC5VLX50T-1FF665I | Xilinx, Inc. | XC5VLX50T-1FF665I - NEW PRODUCT |
13 pages, |
Original | |
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| XC5VLX50T-1FFG1136C | Xilinx, Inc. | XC5VLX50T-1FFG1136C - NEW PRODUCT |
13 pages, |
Original | |
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| XC5VLX50T-1FFG1136I | Xilinx, Inc. | XC5VLX50T-1FFG1136I - NEW PRODUCT |
13 pages, |
Original | |
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| XC5VLX50T-1FFG665C | Xilinx, Inc. | XC5VLX50T-1FFG665C - NEW PRODUCT |
13 pages, |
Original | |
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| XC5VLX50T-1FFG665I | Xilinx, Inc. | XC5VLX50T-1FFG665I - NEW PRODUCT |
13 pages, |
Original | |
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| XC5VLX50T-2FF1136C | Xilinx, Inc. | XC5VLX50T-2FF1136C - NEW PRODUCT |
13 pages, |
Original | |
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| XC5VLX50T-2FF1136I | Xilinx, Inc. | XC5VLX50T-2FF1136I - NEW PRODUCT |
13 pages, |
Original | |
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: XCF16P XCF16P XC5VLX30T XC5VLX30T XCF16P XCF16P XC5VLX50T XCF16P XCF16P XC5VLX50T XCF16P XCF16P Standard Package XCF32P XCF32P , XCF128X XCF128X XC5VLX20T XC5VLX20T XCF08P XCF08P XC5VLX30T XC5VLX30T XCF16P XCF16P XC5VLX50T XCF16P XCF16P XC5VLX85T XC5VLX85T XCF32P XCF32P ... | Original |
2 pages, |
xc6slx150t jtag spi serial flash spartan 6 ug161 XC6VLX550T XC6SL* MEMORY HW-USB-II-G Product Selection Guide xilinx XC6SLX25 XCF08P XC6VLX240T xc6vhx565t xc6slx75 XC6SLX9 datasheet abstract |
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| Abstract: address map for the XC5VLX50T. Table 3: ML555 ML555 Address Map Peripheral Instance Base Address High , transferring data between the PLBv46 PCI Bridge in the XC5VLX50T on the ML555 ML555 board and the PLBv46 PCI Bridge , PLBv46 PCI in the XC5VLX50T on the ML555 ML555 board interfaces to the PLBv46 PCI in the Virtex-4 ML410 ML410 Evaluation Platform. The ML555 ML555 board uses the Xilinx XC5VLX50T device in the 1136 pin package. XAPP999 XAPP999 , XC4VFX60 XC4VFX60 FPGA interfaces to the PLBv46 PCI Bridge in the XC5VLX50T FPGA on the ML555 ML555. To configure the ... | Original |
19 pages, |
vhdl code for bram XC4VFX60 XAPP999 XAPP1001 ML410 pcie microblaze tcl script ModelSim ISE Virtex-5 LX50T XPS IIC Virtex 5 LX50T IPIF ML555 PLBv46 ML555 abstract |
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| Abstract: Xilinx XC5VLX50T device [Ref 3] and a Micron MT49H16M18BM-25 MT49H16M18BM-25 device for the timing parameters. The , timing analysis for 250 MHz. Table 11: Read Timing Analysis for 250 MHz XC5VLX50T Device (-1 Speed , Timing Analysis for 333 MHz XC5VLX50T Device (-3 Speed Grade) Parameter Value (ps) TCLOCK , 13: Write Timing Analysis for 250 MHz XC5VLX50T Device (-1 Speed Grade) Parameter Value (ps , XC5VLX50T device/package. TJITTER 0 0 Same DCM used to generate CLK0 and CLK90 CLK90. ... | Original |
30 pages, |
XAPP852 verilog code for ddr2 sdram to virtex 5 MT49H16M18BM-25 MT49H16M18 FIFO36 dll 1117 asynchronous fifo vhdl xilinx datasheet abstract |
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| Abstract: reference design. The I/O timing analysis uses a Xilinx XC5VLX50T device [Ref 3] and a Micron , Timing Analysis for 250 MHz XC5VLX50T Device (-1 Speed Grade) Parameter Value (ps) Description , XC5VLX50T Device (-3 Speed Grade) Parameter Value (ps) TCLOCK 3003 TPHASE 1501.5 , 250 MHz. The table includes all parameters. Table 13: Write Timing Analysis for 250 MHz XC5VLX50T , 50 50 Worst-case package skew for an XC5VLX50T device/package. TJITTER 0 0 Same ... | Original |
30 pages, |
XAPP852 verilog code for ddr2 sdram to virtex 5 MT49H16M18BM-25 MT49H16M18 ML561 micron DDR2 pcb layout ISERDES spartan 6 FIFO36 datasheet abstract |
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| Abstract: : XC5VLX20T XC5VLX20T - XC5VLX50T FXT: XC5VFX30T XC5VFX30T (Device Limited) Red Hat Enterprise Linux 4 WS 64-bit Virtex ... | Original |
1 pages, |
SPARTAN 3an Spartan 3E SPARTAN 6 spartan XI spartan 3a XC4VFX12 XC4VLX15 XC4VLX25 XC4VSX25 linux XC9500 CoolRunner ChipScope Spartan-3an datasheet abstract |
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| Abstract: Xilinx XC5VLX50T device in the 1136 pin package. Table 5 provides the address map for the XC5VLX50T. , between the PLB PCI Bridge in the XC4VFX60 XC4VFX60 on the ML410 ML410 board and the PCI Bridge in the XC5VLX50T on the , interfaces to an PLB PCI Bridge in the XC5VLX50T FPGA. To configure the XC5VLX50T, connect the Xilinx , file. After downloading the XC5VLX50T FPGA bit file, the PCI functionality in the ML555 ML555 is configured ... | Original |
23 pages, |
M1535 embedded system projects PPC405 TI2250 datasheet ALi M1535D ALi M1535D data sheet XAPP945 XAPP1001 vortex modem Virtex-5 LX50T Virtex 5 LX50T controllers ML410 manual ALi M1535D ML410 abstract |
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| Abstract: , the XC5VLX50T device on the ML505 ML505 development board has approximately 11.37 Mb of configuration cells , configuration cells in Mb for each device. For example, using a XC5VLX50T device yields 355,190 x 32/1,000,000 , XC5VLX20T XC5VLX20T 152,609 2.54 8.03 XC5VLX30T XC5VLX30T 236,782 3.95 12.46 XC5VLX50T 355,190 , example, if the above XC5VLX50T is used in 1,000 products, the nominal FIT across all products is 1,489 , configuration FIT can be divided by ten to provide a design configuration FIT, which for the XC5VLX50T device ... | Original |
16 pages, |
xilinx uart verilog code for spartan 3a RAM SEU ML505 XAPP864 XAPP864 abstract |
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| Abstract: Development Platform. This operates on a 32-bit PCI bus. The ML555 ML555 board uses the Xilinx XC5VLX50T device in the 1136 pin package. The address map for the XC5VLX50T is listed in Table 5. Table 5: ML555 ML555 , data between the PLBv46 PCI in the XC4VFX60 XC4VFX60 on the ML410 ML410 board and the PLBv46 PCI in the XC5VLX50T on , PCI Bridge in the XC4VFX60 XC4VFX60 FPGA interfaces to an PLBv46 PCI Bridge in the XC5VLX50T FPGA. To configure the ML555 ML555 XC5VLX50T, connect the Xilinx Download (USB or Parallel IV) cable to the ML555 ML555 JTAG ... | Original |
25 pages, |
104C ALI chipset datasheet ALi M1535D M1535D ML410 ML555 PPC405 XAPP1001 XC4VFX60 VIRTEX4 DEVELOPMENT BOARD XC4VFX60 Virtex4 uart datasheet Virtex4 XC4VFX60 ALi M1535D manual ALi M1535D ML410 abstract |
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| Abstract: XC5VLX50T and XC5VFX100T XC5VFX100T are available · Programmable over JTAG or via the on-board 128Mb Flash, which ... | Original |
2 pages, |
MB86065 Hitec MB86064 datasheet abstract |
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| Abstract: and an XC5VLX50T. DAC1408D DAC1408D has a default common mode voltage of 800 mV. Virtex5 GTP has a common , (eg XC5VLX50T, XC5VFX70 XC5VFX70, etc.). GTP/GTX have a fixed location inside the FPGA. This is an important ... | Original |
8 pages, |
DAC1408D650 JESD204A IEEE1596 DAC1408D JESD204 AN10830 IEEE1596.3-1996 AN10830 abstract |
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| Abstract: ASIC Chip · SouthBridgeVirtex-4 XC4VLX40 XC4VLX40 FPGA · Debug Virtex-5 XC5VLX50T FPGA · 512MB 512MB DDR SDRAM, 2MB ... | Original |
2 pages, |
vga pci card schematics Cortex-A8 ARMv7 ARMv7 neon ARMv7 Cortex-A8 VGA DVI datasheet abstract |
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