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LT1017MJ8/883 Linear Technology LT1017 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military visit Linear Technology - Now Part of Analog Devices
LM108AJ8 Linear Technology LM108A - Operational Amplifiers; Package: CERDIP; Pins: 8; Temperature: Military visit Linear Technology - Now Part of Analog Devices
LT1175CDWF#MILDWF Linear Technology LT1175 - 500mA Negative Low Dropout Micropower Regulator; Pins: 5 visit Linear Technology - Now Part of Analog Devices
LT1018MJ8/883 Linear Technology LT1018 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military visit Linear Technology - Now Part of Analog Devices
LTC1041MJ8/883 Linear Technology LTC1041 - BANG-BANG Controller; Package: CERDIP; Pins: 8; Temperature: Military visit Linear Technology - Now Part of Analog Devices
LTC2905HDDB#TRPBF Linear Technology LTC2905 - Precision Dual Supply Monitor with Pin-Selectable Thresholds; Package: DFN; Pins: 8; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy

XC4013XL PIN BG256

Catalog Datasheet MFG & Type PDF Document Tags

XC9572XL-PC44

Abstract: XC3195A XC9500XV product families, and all of the device/package/pin combinations of the XC3100A product families , Grade Temperature Grade Recommended Replacement XC4013XL HT144 All speed grades , temperature grades XC4020XL BG256 All speed grades Commercial and industrial temperature grades , , and XC3100A Product Appendix Table 5: Ordering Part Numbers Affected XC4013XL-09HT144C XC4044XL-09HQ240C XC4003E-4PC84I XC3130A-09PC68C XC3142A-4PC84I XC4013XL-1HT144C XC4044XL
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XC3195A-4PC84I XC3195A-4PQ208C XC9572XL-PC44 XC3195A XC9536XL-CS48 XC9536XLPC44 XC4006E-3TQ144I XC4013XL HT144 XC4000XL XC4000E XCN05020 PDN2004-20 PDN2004-21 4000XL

XC6200

Abstract: xilinx xc9536 Schematic XC5200 ­ HardWire n XC9500 - Flash-based ISP CPLD family ­ Lowest price, best pin locking , interface Pin assignment flexibility DSP and arithmetic Improved carry logic Higher , HQ240 HQ240 HQ240 BG256 BG256 BG256 BG352 BG352 BG432 BG256 HQ160 PQ240 , Th (input register) 0 ns 0 ns ­ Max I/O frequency Product Overview ­ 33 XC4013XL 92 , Global Clock 4 XC4000E Routing New in XC4000X XC4000X Architecture Reduces Runtimes XC4013XL
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XC6200 xilinx xc9536 Schematic Altera CPLD PCMCIA XC3000 XC3000A XC3000L XC9536 XC9572 XC95108 XC95216 XC95288 PQ160

XC4013XL PIN BG256

Abstract: C2910 /partinfo/spartan.pdf The Spartan Series offers an optimized pinout for the 208-pin Plastic Quad Flat Pack , XC4000 series, we not only has only one mode pin, provide excellent devices, but we also equivalent to , . Total CLBs Usable I/O Common Package XC4005XL 196 XC4005XL 196 XC4010XL XC4013XL , BG256 TQ144 (HT1442) XC4020XL 784 193 205 PQ240 BG256 -3 -2 See article on page 5
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XC4013XL PIN BG256 C2910 XCS10 vq100 30VQ100 RAM16X1 RAM32X1 SPARTAN-XL/XC4000XL XCS05XL XCS10XL XCS20XL

XCS20 TQ144

Abstract: Spartan /partinfo/ds060.pdf The Spartan Series offers an optimized pinout for the 208-pin Plastic Quad Flat Pack , XC4000 series, we not only has only one mode pin, provide excellent devices, but we also equivalent to , Package XC4005XL 196 XC4005XL 196 XC4010XL XC4013XL 400 576 61 77 61 77 112 113 192 192 113 PC84 VQ100 PC84 VQ100 TQ144 TQ144 PQ240 BG256 TQ144 (HT1442) XC4020XL 784 193 205 PQ240 BG256 -3 -2 See article on page 5 Xilinx
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XCS20 TQ144 Spartan xcs40 xilinx spartan 3 datasheet spartan 5 specifications XCS30XL XCS40XL

3300 XL

Abstract: ROM32X1 column furthest to the right shows packages with pin configurations common to each matched pair of , XC4005XL 196 61 77 112 XC4010XL 400 113 XC4013XL 576 192 192 113 XC4020XL 784 193 205 1 , package for the XCS30XL package and the HT144 package for the XC4013XL are pin-compatible. If no 5.0 V , choose another package, one of those listed in Table 1 The new PQ208 pin configuration will offer eight , 2 Common Package PC84 VQ100 PC84 VQ100 TQ144 TQ144 PQ240 BG256 TQ144 (HT1442) PQ240
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XAPP099 3300 XL ROM32X1 XCS20XL PQ208

vhdl code for 8 bit ODD parity generator

Abstract: vhdl code for 8-bit calculator Remaining1 I/O CLBs XC4013XL-1-BG256 (Tx) 69 322 XC4013XL-1-BG256 (Rx) 66 388 Provided with Core , in MPHY configuration. Bit 4 is MSB. Transmit clock; uses 1 FPGA CLKIOB pin. Data input from ATM , CLKIOB pin. Data output from MUC to ATM layer. Start Of Cell indication to ATM layer from MUC; active
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vhdl code for 8 bit ODD parity generator vhdl code for 8-bit calculator vhdl code for 4 bit even parity generator vhdl code for 8 bit parity generator vhdl code for 8-bit parity generator CC140 50/33/25MH XC4000XL-1

vhdl code for 8-bit calculator

Abstract: vhdl ODD parity generator XC4013XL-1-BG256 (Tx) 69 322 XC4013XL-1-BG256 (Rx) 66 388 Provided with Core Documentation Product , configuration. Bit 4 is MSB. Transmit clock; uses 1 FPGA CLKIOB pin. Data input from ATM layer Start of cell , appropriate PHY device. Bit 4 is MSB. Receiver clock; uses 1 FPGA CLKIOB pin. Data output from MUC to ATM
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vhdl ODD parity generator

transistor bl p68

Abstract: J955 and XC4000XV families. Electrical Specifications and package/pin information are covered in separate , for the input or output flip-flop or both. This clock enable operates exactly like the EC pin on the , high-performance routing near the IOBs enhances pin flexibility. Global Signal Access to Logic There is , . Configuration Pin Pull-Up Resistors During configuration, these pins have weak pull-up resistors. For the most , without weak pull-up or pull-down resistors after configuration. The PROGRAM input pin has a permanent
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transistor bl p68 J955 w29 transistor g41 p28 schematic diagram bl p88 XC4010XL PQ160 XC4000EX XC4000XLA DS006 VG432 XC4002XL XC4028XL

XC9572PC44

Abstract: XC9572-PC44 XC4013XL BG256, CB228, HT144, HT176, PG223, PQ160, PQ208, PQ240 X XC4020XL BG256, HT144, HT176 , information. · Emphasis in text If a wire is drawn so that it overlaps the pin of a symbol, the two , , BG256 X XCS40 PQ208, PQ240, BG256 X XCS05XL PC84, VQ100 X XCS10XL PC84, VQ100, TQ144 X XCS20XL PQ208, VQ100, TQ144 X XCS30XL PQ208, VQ100, TQ144, PQ240, BG256 X XCS40XL PQ208, PQ240, BG256 X SpartanXL Family: Foundation Series 2.1i Installation Guide and
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XC9572PC44 XC9572-PC44 XCS20 PQ208 XC9536-PC44 Xilinx jtag cable Schematic XC95144 PQ100 XC2064 XC3090 XC4005 XC5210 XC-DS501 95/98/NT

Transistor C2910

Abstract: The Practical Xilinx Designer Lab Book /partinfo/spartan.pdf The Spartan Series offers an optimized pinout for the 208-pin Plastic Quad Flat Pack , XC4000 series, we not only has only one mode pin, provide excellent devices, but we also equivalent to
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Transistor C2910 The Practical Xilinx Designer Lab Book PROGRAM FOR INTERFACING LCD WITH CPLD IC xc9500 LCD 16X1 sharp traffic light controller vhdl coding vhdl code for traffic light control 400MH PG411 PG475 PG559 BG560 XC4036XL

transistor bl p89

Abstract: J955 flip-flop or both. This clock enable operates exactly like the EC pin on the XC4000 CLB. This new feature , maximum speed. Additional high-performance routing near the IOBs enhances pin flexibility. Global , inputs. Configuration Pin Pull-Up Resistors During configuration, the three mode pins, M0, M1, and M2 , pull-up or pull-down resistors after configuration. The PROGRAM input pin has a permanent weak pull-up , active High. The EC pin is shared by both storage elements. If left unconnected for either, the clock
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XC4000XLT XC4000A XC4000D XC4000H transistor bl p89 bl p74 transistor transistor bl p87 XC4020 XC4010EPC84 X6692 XC4000L PG156

XAPP031

Abstract: like the EC pin on the XC4000 CLB. This new feature makes the lOBs more versatile, and avoids the , the lOBs enhances pin flexibility. Global Signal Access to Logic There is additional access from global clocks to the F and G function generator inputs. Configuration Pin Pull-Up Resistors During , PROGRAM input pin has a permanent weak pull-up. Soft Start-up Like the XC3000A, XC4000 Series devices , . The EC pin is shared by both storage elements. If left unconnected for either, the clock enable for
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XAPP031 XC4013E XC4020E XC4025E HQ304 XC4005E PG299

GE rcrt 6-60

Abstract: ot 409 w31 input or output flip-flop or both. This clock enable operates exactly like the EC pin on the XC4000 CLB , global clocks to the F and G function generator inputs. Configuration Pin Pull-Up Resistors During , input pin has a permanent weak pull-up. Soft Start-up Like the XC3000A, XC4000 Series devices have "Soft , the lOBs enhances pin flexibility. A fast, dedicated early clock sourced by global clock buffers is , signal (EC) is active High. The EC pin is shared by both storage elements. If left unconnected for either
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GE rcrt 6-60 ot 409 w31 decoder 7448 input 4 7448 with internal pullup an12 pic 632 463 phd c15n3 XC4003E XC4006E XC4008E XC4010E XC4028EX XC4036EX

DC MOTOR SPEED CONTROL USING VHDL xilinx

Abstract: xilinx vhdl rs232 code them to meet a very aggressive schedule, on time. "We were able to go to layout and pick pin , , such as the delay before the signal arrives at the input pin. ® -route - Using this option
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DC MOTOR SPEED CONTROL USING VHDL xilinx xilinx vhdl rs232 code gr228x structural vhdl code for ripple counter PCIM 164 PCIM 176 500K-G TQ176 PG191 CB196 HQ208 BG225

p301 stag

Abstract: TRANSISTOR R 40 AH-16 . 4-40 XC4000E and XC4000X Series Table of Contents Pin D e s c rip tio n s , .4-109 Pin Locations for XC4003E D evices. 4-109 Pin Locations for XC4005E/XL D e v ic e s . 4-110 Pin Locations for XC4006E D evices. 4-111 Pin Locations for XC4008E D evices
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p301 stag TRANSISTOR R 40 AH-16 Stag P301 DE C 748 transistor cs 9013 XC401OE
Abstract: . . 37 Pin D escriptions , . Pin Locations for XC4003E Devices. Pin Locations for XC4005E/XL D evices. Pin Locations for XC4006E Devices. Pin Locations for XC4008E Devices -
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XILIU001

bl p76

Abstract: IC 7448 4-33 4-33 4-36 4-36 4-38 4-40 4-1 XC4000E and XC4000X Series Table of Contents Pin , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin , . . . . . . . Pin Locations for XC4005E/XL Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Locations for XC4006E Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Locations for XC4008E Devices .
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bl p76 IC 7448 C1535 connecting diagram for ic 7448 f34 function generator matrix mux

AF2.5 din 74

Abstract: P181 Japan . Pin Locations for XC4003E Devices XC4003E Pad Name VCC I/O (A8) I/O (A9) I/O I/O I/O (A10) I , XC4000X Series Field Programmable Gate Arrays Pin Locations for XC4005E/XL Devices The following table , - - N.C. Pins - - - Pin Locations for XC4006E Devices XC4006E Pad Name VCC I/O , ) Pin Locations for XC4008E Devices XC4008E Pad Name VCC I/O (A8) I/O (A9) I/O I/O I/O I/O I/O , P156 P196 - PQ208 P1 P51 P91 P117 P157 P206 6/3/97 Pin Locations for XC4010E/XL Devices
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AF2.5 din 74 P181 Japan K2808 634 p181 715 P181 xc4005e-TQ144 PQ100

TRANSISTOR SMD MARKING CODE 31A 3 pin

Abstract: free circuit diagram pc uprog the extra handling of the 100-pin PQFP packages that would have been required if an external , XC4062XL is available in 560-pin ball grid array (BGA), 475-pin pin grid array (PGA) and 240-pin high , speed grades and unpopular pin grid array package combinations, will be discontinued within the next , these discontinued products can now move to the next-highest speed grade, maintaining pin and
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TRANSISTOR SMD MARKING CODE 31A 3 pin free circuit diagram pc uprog TRANSISTOR SMD MARKING CODE 352 smd transistor marking ey LEAPER-10 LEAPER-10 driver XC4000E-1 HW-130

ict flexacom analyzer

Abstract: v309 spanning multiple FBs. 44-Pin VQFP 44-Pin PLCC 84-Pin PLCC 100-Pin TQFP 100-Pin PQFP 160-Pin PQFP 208-Pin HQFP 352-Pin BGA 34 34 34 69 72 72 69 81 81 108 81 133 133 166 166 168 192 GUEST , array and 559-pin pin grid array packages. Please contact your local Xilinx sales representative for the , instructions, and uses the same 4-pin set used by the IEEE 1149.1 test commands, thereby minimizing the chip , the external voltage provided at the VCC pin(s). Charge pumps are designed to be robust, but they do
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ict flexacom analyzer v309 Xilinx PCI logicore FR-hel XC4085XL 000-G XC6264
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