X24C00 X24C01 X24C01A/02/04/08/16 X25C02/020/040 X24C44/45 AN26-1 68HC05 002DH - Datasheet Archive

 

AN26 Interfacing the X24C00 to the Motorola 6805 Microcontroller by Applications Staff, June 1995 The following code demonstrates

 

Application Note AN26 Interfacing the X24C00 X24C00 to the Motorola 6805 Microcontroller by Applications Staff, June 1995 The following code demonstrates how the Xicor 2 X24C00 X24C00 serial E PROM could be interfaced to the Motorola 6805 microcontroller when connected as shown in Fig. 1. The interface uses port A of the 6805, with the PA0 pin connected to the serial data (SDA) and PA1 connected to serial clock (SCL) input of the 2 E PROM. Additional code can be found on the Xicor BBS (or through the Xicor FaxBack system) that will implement interfaces between the Motorola 6805 microcontroller and other Xicor serial devices, including the X24C01 X24C01, X24C01A/02/04/08/16 X24C01A/02/04/08/16 family, X25C02/020/040 X25C02/020/040 SPI family, and X24C44/45 X24C44/45 serial NOVRAMs. The Xicor BBS can be reached toll free at 1-800-258-8864, or in the (408) area code and internationally at 1-408-943-0655. Xicor's BBS will support up to a 19.2K baud rate modem (no parity, 8 bit words, 1 stop bit, and no local echo). These listings can be found in the MOTOROLA SIG (Special Interest Group). Xicor application notes are also available through Xicor's FaxBack system at (408) 954-1627. U2 8 MH z 27 26 1 2 25 OS C 1 OS C 2 RE S E T I RQ T CA P PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PB5 PB6 PB7 P C0 P C1 P C2 P C3 P C4 P C5 P C6 P C7 P D5 T C MP 10 9 8 7 6 5 4 3 U1 6 S CL S DA 5 X24C00 X24C00 11 12 13 2 2 2 1 1 1 1 1 2 1 0 9 8 7 6 5 VCC VCC 23 24 6 8 HC0 5 Figure 1 - Typical hardware connection for interfacing an X24C00 X24C00 to a 6805 microcontroller Xicor, Inc. · 1511 Buckeye Drive · Milpitas, CA 95035 · (408) 432-8888 AN26-1 AN26-1 Xicor Application Note 0001 0002 0003 0004 0005 0006 0007 0008 0009 0010 0011 0012 0013 0014 0015 0016 0017 0018 0019 0020 0021 0022 0023 0024 0025 0026 0027 0028 0029 0030 0031 0032 0033 0034 0035 0036 0037 0038 0039 0040 0041 0042 0043 0044 0045 0046 0047 0048 0049 0050 0051 0052 AN26 * * THIS CODE WAS DESIGNED TO DEMONSTRATE HOW THE XICOR X24C00 X24C00 PART COULD * * BE INTERFACED TO THE 68HC05 68HC05 MICROCONTROLLER. THE INTERFACE USES 2 LINES * * FROM PORT A (PA0 AND PA1) TO COMMUNICATE. * * * * THE CODE SHOWN DEMONSTRATES A 'BYTE READ' AND 'BYTE WRITE'. * * * * THE MAINLINE OF THIS PROGRAM READS THE DATA LOCATED AT ADDRESS 04H AND * * THEN WRITES THAT DATA BACK TO ADDRESS 0BH. * * 0001 0000 0003 0002 0080 SCLBIT SDABIT SDAOUT SDAIN DMASK EQU EQU EQU EQU EQU 1 0 $03 $02 $80 BIT INDICATING PORTA SCL POSITION BIT INDICATING PORTA SDA POSITION MAKES SDA AN OUTPUT IF STORED IN DDRA MAKES SDA AN INPUT IF STORED IN DDRA USED TO MASK BIT TO SEND TO DUT 0000 0004 PORTA DDRA EQU EQU $00 $04 PORT A MEMORY ADDRESS PORT A DIRECTION REGISTER OFFSET 0080 0082 0083 0086 ADDR DATA COUNT TEMP1 EQU EQU EQU EQU $80 $82 $83 $86 LOCATION FOR X24C00 X24C00 ADDRESS TO ACCESS LOCATION FOR X24C00 X24C00 DATA TRANSFERED COUNTER LOCATION FOR LOOPING SCRATCH PAD REGISTER * * RESET VECTOR ENTRY POINT * * 1ffe 1ffe 01 00 ORG FDB $1FFE $0100 RESET VECTOR ADDRESS TO PROGRAM ENTRY JUMP TO BEGINNING OF EXECUTABLE CODE * * PROGRAM ENTRY POINT * * 0100 0100 0102 0104 0106 0108 010a 010c 010e 0110 0113 0115 0117 011a ORG a6 b7 a6 b7 a6 b7 a6 b7 cd a6 b7 cd 20 ff 04 ff 00 03 04 04 80 01 1c 0b 80 01 32 fe $0100 BEGIN: LDA STA LDA STA LDA STA LDA STA JSR LDA STA JSR BRA BEGINNING OF EXECUTABLE CODE #$FF DDRA #$FF PORTA #$03 DDRA #$04 ADDR RDBYT #$0B ADDR WRBYT * MAKE PORTA ALL OUTPUTS MAKE PORTA ALL ONES MAKE SDA AND SCL OUTPUTS READ DATA FROM ADDRESS 002DH 002DH WRITE DATA BACK TO ADDRESS 0041H 0041H LOOP UNTIL RESET AN26-2 AN26-2 Xicor Application Note 0053 0054 0055 0056 0057 0058 0059 0060 0061 0062 0063 0064 0065 0066 0067 0068 0069 0070 0071 0072 0073 0074 0075 0076 0077 0078 0079 0080 0081 0082 0083 0084 0085 0086 0087 0088 0089 0090 0091 0092 0093 0094 0095 0096 0097 0098 0099 0100 0101 0102 0103 0104 0105 AN26 * * READ A BYTE "RANDOM READ SEQUENCE". THE ADDRESS TO READ IS STORED * * IN ADDR. THE DATA FROM THE DUT IS STORED IN DATA. * * 011c 011f 0121 0122 0123 0125 0127 012a 012d 012f 0131 cd b6 48 48 aa b7 cd cd 12 10 81 01 aa 80 RDBYT: 83 82 01 85 01 50 00 00 JSR LDA LSLA LSLA ORA STA JSR JSR BSET BSET RTS START ADDR READ A BYTE FROM THE ADDRESS INDICATED IN 'ADDR' #$83 BUILD INSTRUCTION DATA OUTI SEND SLAVE ADDRESS INBYT READ DATA FROM 2404 #SCLBIT,PORTA #SDABIT,PORTA * * WRITE A BYTE "BYTE WRITE SEQUENCE". THE ADDRESS TO WRITE IS STORED * * IN ADDR. THE DATA TO WRITE IS STORED IN DATA. * * 0132 0134 0136 0139 013b 013c 013d 013f 0141 0144 0146 0148 014b 014d 014f b6 b7 cd b6 48 48 aa b7 cd b6 b7 cd 12 10 81 82 86 01 aa 80 WRBYT: 43 82 01 85 86 82 01 67 00 00 LDA STA JSR LDA LSLA LSLA ORA STA JSR LDA STA JSR BSET BSET RTS DATA TEMP1 START ADDR WRITE TO BYTE POINTED TO BY ADDR THE VALUE IN LOCATION 'DATA' SEND START COMMAND #$43 DATA OUTI SEND SLAVE ADDRESS TEMP1 DATA OUTD SEND WRITE DATA #SCLBIT,PORTA #SDABIT,PORTA * * READ 8 BITS FROM THE DUT. THE RESULTS ARE RETURNED IN DATA. * * 0150 0152 0154 0156 0158 015b 015c 015e 0160 0162 0164 a6 b7 a6 b7 cd 46 39 3a 26 a6 b7 02 04 08 83 01 b3 82 83 f6 03 04 INBYT: LOOPI: LDA STA LDA STA JSR RORA ROL DEC BNE LDA STA #SDAIN DDRA #$08 COUNT CLOCK DATA COUNT LOOPI #SDAOUT DDRA MAKE SDA AN INPUT PREPARE TO SHIFT IN 8 BITS CLOCK DATA LOOP UNTIL 8 BITS ARE READ MAKE SDA AN OUTPUT AN26-3 AN26-3 Xicor Application Note 0106 0107 0108 0109 0110 0111 0112 0113 0114 0115 0116 0117 0118 0119 0120 0121 0122 0123 0124 0125 0126 0127 0128 0129 0130 0131 0132 0133 0134 0135 0136 0137 0138 0139 0140 0141 0142 0143 0144 0145 0146 0147 0148 0149 0150 0151 0152 0153 0154 0155 0156 0157 0158 0166 81 AN26 RTS * * WRITE 8 BITS TO THE DUT. THE DATA TO SEND IS IN DATA. IF THE LAST * * BIT TO SEND IS A ONE THE SDA LINE IS MADE AN INPUT BEFORE THE EIGHTH* * CLOCK PULSE TO AVOID BUS CONTENTION WHEN THE DUT ACKNOWLEDGES. THE * * ROUTINE FINISHES WITH SDA IN AN INPUT STATE. * * 0167 0169 016b 016d 016f 0171 0173 0175 0177 0179 017b 017e 0180 0182 0184 a6 b7 a6 b7 b6 a4 27 10 20 11 cd 38 3a 26 81 03 04 08 83 82 80 04 00 02 00 01 b3 82 83 eb 0185 0187 0189 018b 018d 018f 0191 0193 0195 0197 0199 019c 019e 01a0 01a2 01a4 01a6 01a9 a6 b7 a6 b7 b6 a4 27 10 20 11 cd 38 3a 26 a6 b7 cd 81 03 04 07 83 82 80 04 00 02 00 01 b3 82 83 eb 02 04 01 b3 OUTD: LOOPO: IS0: IS1: OUTI: LOOPOI: IS0I: IS1I: LDA STA LDA STA LDA AND BEQ BSET BRA BCLR JSR LSL DEC BNE RTS #SDAOUT DDRA #$08 COUNT DATA #DMASK IS0 #SDABIT,PORTA IS1 #SDABIT,PORTA CLOCK DATA COUNT LOOPO LDA STA LDA STA LDA AND BEQ BSET BRA BCLR JSR LSL DEC BNE LDA STA JSR RTS #SDAOUT DDRA #$07 COUNT DATA #DMASK IS0I #SDABIT,PORTA IS1I #SDABIT,PORTA CLOCK DATA COUNT LOOPOI #SDAIN DDRA CLOCK PREPARE TO SHIFT OUT 8 BITS IS THE DATA TO BE SHIFTED 1 OR 0 JUMP IF DATA SHOULD BE 0 MAKE SDA A 0 SEND CLOCK SIGNAL LOOP UNTIL ALL 8 BITS HAVE BEEN SENT PREPARE TO SHIFT OUT 8 BITS IS THE DATA TO BE SHIFTED A 1 OR A 0 JUMP IF DATA SHOULD BE 0 MAKE SDA A 0 SEND CLOCK SIGNAL LOOP UNTIL ALL 8 BITS HAVE BEEN SENT * * ISSUE A START COMMAND * * 01aa 01ac 01ae 01b0 01b2 10 12 11 13 81 00 00 00 00 START: BSET BSET BCLR BCLR RTS #SDABIT,PORTA #SCLBIT,PORTA #SDABIT,PORTA #SCLBIT,PORTA MAKE SURE MAKE SURE FORCE SDA FORCE SCL THAT SDA IS HIGH THAT SCL IS HIGH LOW LOW AN26-4 AN26-4 Xicor Application Note 0159 0160 0161 0162 0163 0164 0165 0166 0167 0168 0169 0170 AN26 * * ISSUE A CLOCK PULSE. WHILE THE CLOCK IS HIGH THE VALUE ON THE * * SDA LINE IS PLACED IN THE LSB OF REG A. WHEN A READ IS TAKING* * PLACE THE LSB OF REG A WILL INDICATE THE VALUE FROM THE DUT. * * 01b3 01b5 01b7 01b9 01bb 12 b6 13 a4 81 00 00 00 01 CLOCK: BSET LDA BCLR AND RTS #SCLBIT,PORTA PORTA #SCLBIT,PORTA #$01 PROVIDE A CLOCK ON SCL, START HIGH READ SDA WHILE SCL IS HIGH SDA VALUE IS IN LOWER BIT OF A REG AN26-5 AN26-5