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X133 Datasheet

Part Manufacturer Description PDF Type
X133 N/A Discontinued Transistor Data Book 1975 Scan

X133

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: NOTE 1 TABLE 1.0 NOTE CW X133 133.33M 0426 X133 DESCRIPTION OPERATING SPECIFICATIONS PARAMETER , ) The Connor-Winfield X133 is a 3.3V, LVCMOS, Surface Mount, Fixed Frequency Crystal Oscillator (XO , /Disable Ground Output Vcc ORDERING INFORMATION CW X133 133.33M 0426 X133 CLOCK SERIES - 133.33 Connor-Winfield
Original
Abstract: the BD6095GUL Charge Pump Constant Current LED Driver FLASH LED x1 x1.33 x1.5 x2 , functions, greater energy savings. x1.33 + ALC (Dimming 1) ON Current reducing eye strain and , , and current is controlled in 256 steps for flicker-free, energy-efficient performance. x1.33 + , high efficiency x1.33 step-up charge pump circuit Using the ALC dimmer + Charge pump voltage Vbat x , an original x1.33V mode featuring low loss close to the VF of the white LEDs. Automatic adjustment ROHM
Original
BD6086GU BH1600FVC dimmer BD6086 dimmer LED dimmer ic with pwm input PWM circuit dimmer Bright white LED 10mm E7046 BD6095GUL/BD6086GU VCSP50L3 VCSP85H4
Abstract: O x133_01_111699 Figure 1: Input Buffer (IBUF) Symbol IBUFG Signals used as high fanout , Spartan-II IBUFG symbol appears in Figure 2. IBUFG I O x133_03_111699 Figure 2: Global Clock , port. The generic output buffer (OBUF) symbol appears in Figure 3. OBUF I O x133_04_111699 , are configured with OBUFT_S_12, which is disabled with a weak pulldown. T OBUFT O I x133_05_111699 , IOBUF IO O x133_06_111699 Figure 5: Input/Output Buffer (IOBUF) Symbol 3-state output buffers Xilinx
Original
XAPP179 SPARTAN XC2S50 CS144 FG256 PCI33 PQ208 TQ144
Abstract: 1-800-255-7778 3 R Using the Virtex SelectI/O IBUF I O x133_01_111699 Figure 1: Input Buffer , Bank 5 Bank 4 x133_02_122799 Figure 2: Virtex I/O Banks Table 2: Xilinx Input Standards , . Symbol IBUFG I O x133_03_111699 Figure 3: Virtex Global Clock Input Buffer (IBUFG) The , (OBUF) symbol appears in Figure 4. OBUF I O x133_04_111699 Figure 4: Virtex Output Buffer , ) and is specified in mA (2, 4, 6, 8, 12, 16, or 24). T OBUFT I O x133_05_111699 Xilinx
Original
XAPP133 verilog code for lvds driver 3state buffer vhdl code PQ240 HQ240 BG432 BG352
Abstract: standard is LVTTL when the generic IBUF has no specified extension. 1 2 3 4 A IBUF I O x133_01_111699 , ) symbol. OBUF I O x133_04_111699 Figure 2-78: Virtex-II Output Buffer (OBUF) Symbol The , bidirectional I/O. T I OBUFT O x133_05_111699 Figure 2-79: 3-State Output Buffer Symbol (OBUFT) The , /output IOBUF buffer. T I IOBUF IO O x133_06_111699 Figure 2-80: Input/Output Buffer Symbol , Terminated Output Driving a Parallel Terminated Input Series Terminated Output Z=50 Z=50 VREF VREF x133_07_111699 Xilinx
Original
BG5751 UG002 LVCMOS25 LVCMOS33
Abstract: standard is LVTTL when the generic IBUF has no specified extension. IBUF I O x133_01_111699 , O x133_03_111699 Figure 3: Virtex Global Clock Input Buffer Symbol (IBUFG) The extension to the , . OBUF I O x133_04_111699 Figure 4: Virtex Output Buffer Symbol (OBUF) The extension to the base , I OBUFT O x133_05_111699 Figure 5: 3-State Output Buffer Symbol (OBUFT) The extension to , O x133_06_111699 Figure 6: Input/Output Buffer Symbol (IOBUF The extension to the base name Xilinx
Original
CG560 CB228
Abstract: slowing down the outputs. HSTL Class I VTT= 0.75V VCCO = 1.5V 50 Z = 50 VREF = 0.75V x133_10_111699 , VREF = 0.9V x133_11_111699 Figure 2: Asymmetrically parallel terminated loads 2 , 0.9V x133_12_111699 Figure 3: Asymmetrically double parallel terminated loads Table 3: HSTL Class Xilinx
Original
HSTL standards JESD8-6 JESD86 HSTL class I
Abstract: generic IBUF has no specified extension or attribute. IBUF I O x133_01_111699 Figure 1: Input , CLKDLL, CLKDLLHF, or a BUFG symbol. The generic IBUFG symbol appears in Figure 2. IBUFG I O x133_03_111699 , . OBUF I O x133_04_111699 Figure 3: Output Buffer (OBUF) Symbol 8 www.xilinx.com XAPP179 , OBUFT O I x133_05_111699 Figure 4: 3-State Output Buffer (OBUFT) Symbol 3-state output , IOBUF IO O x133_06_111699 Figure 5: Input/Output Buffer (IOBUF) Symbol 3-state output buffers Xilinx
Original
XC2S100 pq208 RS-644 standard RS-644 JESD8-8 intel FPGA FT256 LVCMOS18
Abstract: standard is LVTTL when the generic IBUF has no specified extension. IBUF I O x133_01_111699 , symbol appears in Figure 3. IBUFG I O x133_03_111699 Figure 3: Virtex Global Clock Input Buffer , external output port. The generic output buffer (OBUF) symbol appears in Figure 4. OBUF I O x133_04_111699 , , typically implements 3-state outputs or bidirectional I/O. T I OBUFT O x133_05_111699 Figure 5 , /output buffer IOBUF appears in Figure 6. T I IOBUF IO O x133_06_111699 Figure 6: Input Xilinx
Original
vhdl code for lvds driver V200E V2000E fundamentals of fdr
Abstract: standard is LVTTL when the generic IBUF has no specified extension. IBUF I O x133_01_111699 , Figure 3. IBUFG I O x133_03_111699 Figure 3: Virtex Global Clock Input Buffer Symbol (IBUFG , ) symbol appears in Figure 4. OBUF I O x133_04_111699 Figure 4: Virtex Output Buffer Symbol , I OBUFT O x133_05_111699 Figure 5: 3-State Output Buffer Symbol (OBUFT) The extension to , O x133_06_111699 Figure 6: Input/Output Buffer Symbol (IOBUF The extension to the base name Xilinx
Original
d flip-flop JESD84
Abstract: CCD47-20 NIMO Back Illuminated High Performance NIMO Back Illuminated CCD Sensor FEATURES â'¢ 1024 by 1024 1:1 image format â'¢ Image area 13.3 x13.3 mm â'¢ Back Illuminated format â'¢ Frame transfer operation â'¢ 13 μm square pixels â'¢ Symmetrical anti-static gate protection â'¢ Very low , x13.3 mm Active pixels (H) . .1024 (V , . 13.3 x13.3 mm Pixels (H) . e2v semiconductors
Original
CCD4720 CCD47 A1A-100040
Abstract: power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2.0) is automatically set based on input and output , x1; x1.333; x1.5; x2 x2 or x3 x-1 Boost setting Autonomous Boost Fixed Fixed , conversion through a wide input range by supporting x1.0, x1.33, x1.5, and x2.0 boost charge pump operation , ratio from x1.33 to x1.5. In a fixed input voltage mode, the device provides for higher conversion , 3.5 3.6 3.7 3.8 3.9 x1.33 5.0 3.3 4.0 4.1 4.2 4.4 4.6 4.8 Texas Instruments
Original
TPS65110 TPS65111 LTPS TPS65110RGE TPS65111RGE SLVS495 TPS65110/11
Abstract: power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2.0) is automatically set based on input and output , Power Supply Output Current Accuracy Num of Ext CAP VCC Regulated x1; x1.333; x1.5; x2 Autonomous Boost , efficiency, regulated, dc/dc conversion through a wide input range by supporting x1.0, x1.33, x1.5, and x2 , automatically increases the boost ratio from x1.33 to x1.5. In a fixed input voltage mode, the device provides , 3.9 4.0 4.1 4.2 4.4 x1 x1.5 x1.33 x1 4.6 4.8 5.0 5.2 5.4 5.5 x1.33 x2 NOTE: Gray portion is Texas Instruments
Original
Abstract: power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2.0) is automatically set based on input and output , Power Supply Output Current Accuracy Num of Ext CAP VCC Regulated x1; x1.333; x1.5; x2 Autonomous Boost , efficiency, regulated, dc/dc conversion through a wide input range by supporting x1.0, x1.33, x1.5, and x2 , automatically increases the boost ratio from x1.33 to x1.5. In a fixed input voltage mode, the device provides , 3.9 4.0 4.1 4.2 4.4 x1 x1.5 x1.33 x1 4.6 4.8 5.0 5.2 5.4 5.5 x1.33 x2 NOTE: Gray portion is Texas Instruments
Original
Abstract: conversion for the LCD analog power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2.0) is automatically set , Control Boost Ratio Boost setting Power Supply Output Current Accuracy Num of Ext CAP VCC Regulated x1; x1.333 , supporting x1.0, x1.33, x1.5, and x2.0 boost charge pump operation. TPS65110 automatically sets the boost , becomes lower, the device automatically increases the boost ratio from x1.33 to x1.5. In a fixed input , 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.4 x1 x1.5 x1.33 x1 4.6 4.8 5.0 5.2 5.4 Texas Instruments
Original
Abstract: low ripple dc/dc conversion for the LCD analog power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2 , VDD VSS Output Voltage Control Regulated Regulated Regulated Boost Ratio x1; x1.333 , efficiency, regulated, dc/dc conversion through a wide input range by supporting x1.0, x1.33, x1.5, and x2 , automatically increases the boost ratio from x1.33 to x1.5. In a fixed input voltage mode, the device provides , x1.5 NA x2 3.4 3.5 3.6 3.7 3.8 3.9 x1.33 5.0 3.3 4.0 4.1 4.2 Texas Instruments
Original
ISO/TS16949
Abstract: power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2.0) is automatically set based on input and output , x1; x1.333; x1.5; x2 x2 or x3 x-1 Boost setting Autonomous Boost Fixed Fixed , conversion through a wide input range by supporting x1.0, x1.33, x1.5, and x2.0 boost charge pump operation , ratio from x1.33 to x1.5. In a fixed input voltage mode, the device provides for higher conversion , 3.5 3.6 3.7 3.8 3.9 x1.33 5.0 3.3 4.0 4.1 4.2 4.4 4.6 4.8 Texas Instruments
Original
TPS65110RGER TPS65110RGERG4 TPS65111RGER
Abstract: conversion for the LCD analog power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2.0) is automatically set , Control Boost Ratio Boost setting Power Supply Output Current Accuracy Num of Ext CAP VCC Regulated x1; x1.333 , supporting x1.0, x1.33, x1.5, and x2.0 boost charge pump operation. TPS65110 automatically sets the boost , becomes lower, the device automatically increases the boost ratio from x1.33 to x1.5. In a fixed input , 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.4 x1 x1.5 x1.33 x1 4.6 4.8 5.0 5.2 5.4 Texas Instruments
Original
Abstract: power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2.0) is automatically set based on input and output , Power Supply Output Current Accuracy Num of Ext CAP VCC Regulated x1; x1.333; x1.5; x2 Autonomous Boost , efficiency, regulated, dc/dc conversion through a wide input range by supporting x1.0, x1.33, x1.5, and x2 , automatically increases the boost ratio from x1.33 to x1.5. In a fixed input voltage mode, the device provides , 3.9 4.0 4.1 4.2 4.4 x1 x1.5 x1.33 x1 4.6 4.8 5.0 5.2 5.4 5.5 x1.33 x2 NOTE: Gray portion is Texas Instruments
Original
marking ltps mtbf pump TPS65124 TPS65130 TPS65124EVM-076 TPS65130EVM-063
Abstract: power. The VCC boost ratio (x1.0, x1.33, x1.5, and x2.0) is automatically set based on input and output , Power Supply Output Current Accuracy Num of Ext CAP VCC Regulated x1; x1.333; x1.5; x2 Autonomous Boost , efficiency, regulated, dc/dc conversion through a wide input range by supporting x1.0, x1.33, x1.5, and x2 , automatically increases the boost ratio from x1.33 to x1.5. In a fixed input voltage mode, the device provides , 3.9 4.0 4.1 4.2 4.4 x1 x1.5 x1.33 x1 4.6 4.8 5.0 5.2 5.4 5.5 x1.33 x2 NOTE: Gray portion is Texas Instruments
Original
Abstract: NOTE 1 TABLE 1.0 NOTE CW X133 133.33M 0426 X133 DESCRIPTION OPERATING SPECIFICATIONS PARAMETER , ) The Connor-Winfield X133 is a 3.3V, LVCMOS, Surface Mount, Fixed Frequency Crystal Oscillator (XO , /Disable Ground Output Vcc ORDERING INFORMATION CW X133 133.33M 0426 X133 CLOCK SERIES - 133.33 EA ELEKTRO-AUTOMATIK
Original
EA-PS 7032-200 EA-PS 7016-400 EA-PS 7016-100 71500-04 7032-200 3HE/42TE/ 12/15V
Abstract: 1-800-255-7778 3 R Using the Virtex SelectI/O IBUF I O x133_01_111699 Figure 1: Input Buffer , Bank 5 Bank 4 x133_02_122799 Figure 2: Virtex I/O Banks Table 2: Xilinx Input Standards , . Symbol IBUFG I O x133_03_111699 Figure 3: Virtex Global Clock Input Buffer (IBUFG) The , (OBUF) symbol appears in Figure 4. OBUF I O x133_04_111699 Figure 4: Virtex Output Buffer , ) and is specified in mA (2, 4, 6, 8, 12, 16, or 24). T OBUFT I O x133 -
OCR Scan
arcotronics C87 87.8AF1 MKP arcotronics c .87.0cf1 mkp 4 uf ARCOTRONICS C.87 MKP arcotronics mkp C 4a EN 60252 mkp 25X48
Abstract: the BD6095GUL Charge Pump Constant Current LED Driver FLASH LED x1 x1.33 x1.5 x2 , functions, greater energy savings. x1.33 + ALC (Dimming 1) ON Current reducing eye strain and , , and current is controlled in 256 steps for flicker-free, energy-efficient performance. x1.33 + , high efficiency x1.33 step-up charge pump circuit Using the ALC dimmer + Charge pump voltage Vbat x Arcotronics
Original
arcotronics mkp 1.44 ARCOTRONICS MKP 1.44 7.5 ARCOTRONICS MKP 1.44 2 ARCOTRONICS MKP 1.44 1 arcotronics C94E ARCOTRONICS MKP 1.44 3 C930ZG35500RA0X C930ZG36100RA0X C930ZG36105RA0X C931ZG35137RA0X C931ZG35274RA0X C931ZG35411RA0X
Abstract: standard is LVTTL when the generic IBUF has no specified extension. IBUF I O x133 , symbol appears in Figure 3. IBUFG I O x133_03_111699 Figure 3: Virtex Global Clock Input Buffer , external output port. The generic output buffer (OBUF) symbol appears in Figure 4. OBUF I O x133 , , typically implements 3-state outputs or bidirectional I/O. T I OBUFT O x133_05_111699 Figure 5 , /output buffer IOBUF appears in Figure 6. T I IOBUF IO O x133_06_111699 Figure 6: Input -
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MAX133 045H11 LCD-IV u800 ptc MAX134
Abstract: generic IBUF has no specified extension or attribute. IBUF I O x133_01_111699 Figure 1: Input , CLKDLL, CLKDLLHF, or a BUFG symbol. The generic IBUFG symbol appears in Figure 2. IBUFG I O x133 , . OBUF I O x133_04_111699 Figure 3: Output Buffer (OBUF) Symbol 8 www.xilinx.com XAPP179 , OBUFT O I x133_05_111699 Figure 4: 3-State Output Buffer (OBUFT) Symbol 3-state output , IOBUF IO O x133_06_111699 Figure 5: Input/Output Buffer (IOBUF) Symbol 3-state output buffers EA ELEKTRO-AUTOMATIK
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15-POL EA-PS 9000 650-watt 9032-20 903-220 GROB
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