W25Q80BV 208-MIL 150/208-MIL 300-MIL 50MB/S 128KB 256KB 512KB 960KB 896KB 768KB

8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI -1- Publication Release Date: March 26, 2009 Preliminary - Revision A W25Q80BV

W25Q80BV W25Q80BV 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI -1- Publication Release Date: March 26, 2009 Preliminary - Revision A W25Q80BV W25Q80BV Table of Contents 1. GENERAL DESCRIPTION . 5 2. FEATURES . 5 3. PIN CONFIGURATION SOIC 150 / 208-MIL 208-MIL . 6 4. PAD CONFIGURATION WSON 6X5-MM . 6 5. PIN DESCRIPTION SOIC 150/208-MIL 150/208-MIL, AND WSON 6X5-MM . 6 6. PIN CONFIGURATION SOIC 300-MIL 300-MIL . 7 7. PIN DESCRIPTION SOIC 300-MIL 300-MIL . 7 7.1 Package Types . 8 7.2 Chip Select (/CS) . 8 7.3 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) . 8 7.4 Write Protect (/WP). 8 7.5 HOLD (/HOLD) . 8 7.6 Serial Clock (CLK) . 8 8. BLOCK DIAGRAM . 9 9. FUNCTIONAL DESCRIPTION . 10 9.1 SPI OPERATIONS . 10 9.1.1 Dual SPI Instructions .10 9.1.3 Quad SPI Instructions .10 9.1.4 9.2 Standard SPI Instructions .10 9.1.2 Hold Function .10 WRITE PROTECTION . 11 9.2.1 10. Write Protect Features .11 CONTROL AND STATUS REGISTERS . 12 10.1 STATUS REGISTER . 12 10.1.1 BUSY .12 10.1.2 Write Enable Latch (WEL) .12 10.1.3 Block Protect Bits (BP2, BP1, BP0).12 10.1.4 Top/Bottom Block Protect (TB) .12 10.1.5 Sector/Block Protect (SEC) .12 10.1.6 Complement Protect (CMP) .13 10.1.7 Status Register Protect (SRP1, SRP0) .13 10.1.8 Erase/Program Suspend Status (SUS) .13 10.1.9 Security Register Lock Bits (LB3, LB2, LB1, LB0) .13 10.1.10 Quad Enable (QE) .14 10.1.11 Status Register Memory Protection (CMP = 0).15 10.1.12 Status Register Memory Protection (CMP = 1).16 -2- W25Q80BV W25Q80BV 10.2 INSTRUCTIONS. 17 10.2.1 Instruction Set Table 1 (Erase, Program Instructions) .18 10.2.3 Instruction Set Table 2 (Read Instructions) .19 10.2.4 Instruction Set Table 3 (ID, Security Instructions) .20 10.2.5 Write Enable (06h) .21 10.2.6 Write Enable for Volatile Status Register (50h) .21 10.2.7 Write Disable (04h) .22 10.2.8 Read Status Register-1 (05h) and Read Status Register-2 (35h).23 10.2.9 Write Status Register (01h) .23 10.2.10 Read Data (03h) .25 10.2.11 Fast Read (0Bh) .26 10.2.12 Fast Read Dual Output (3Bh) .27 10.2.13 Fast Read Quad Output (6Bh).28 10.2.14 Fast Read Dual I/O (BBh).29 10.2.15 Fast Read Quad I/O (EBh) .31 10.2.16 Word Read Quad I/O (E7h) .33 10.2.17 Octal Word Read Quad I/O (E3h).35 10.2.18 Set Burst with Wrap (77h) .37 10.2.19 Continuous Read Mode Bits (M7-0) .38 10.2.20 Continuous Read Mode Reset (FFh or FFFFh) .38 10.2.21 Page Program (02h) .39 10.2.22 Quad Input Page Program (32h) .40 10.2.23 Sector Erase (20h) .41 10.2.24 32KB Block Erase (52h) .42 10.2.25 64KB Block Erase (D8h).43 10.2.26 Chip Erase (C7h / 60h) .44 10.2.27 Erase / Program Suspend (75h) .45 10.2.28 Erase / Program Resume (7Ah) .46 10.2.29 Power-down (B9h) .47 10.2.30 Release Power-down / Device ID (ABh) .48 10.2.31 Read Manufacturer / Device ID (90h) .50 10.2.32 Read Manufacturer / Device ID Dual I/O (92h) .51 10.2.33 Read Manufacturer / Device ID Quad I/O (94h) .52 10.2.34 Read Unique ID Number (4Bh) .53 10.2.35 Read JEDEC ID (9Fh) .54 10.2.36 Erase Security Registers (44h) .55 10.2.37 Program Security Registers (42h) .56 10.2.38 11. Manufacturer and Device Identification .17 10.2.2 Read Security Registers (48h) .57 ELECTRICAL CHARACTERISTICS . 58 -3- Publication Release Date: March 26, 2009 Preliminary - Revision A W25Q80BV W25Q80BV 11.1 11.2 Operating Ranges . 58 11.3 Power-up Timing and Write Inhibit Threshold . 59 11.4 DC Electrical Characteristics . 60 11.5 AC Measurement Conditions . 61 11.6 AC Electrical Characteristics . 62 11.7 AC Electrical Characteristics (cont'd) . 63 11.8 Serial Output Timing . 64 11.9 Input Timing . 64 11.10 12. Absolute Maximum Ratings . 58 Hold Timing . 64 PACKAGE SPECIFICATION . 65 12.1 12.2 8-Pin SOIC 208-mil (Package Code SS) . 66 12.3 8-Contact 6x5mm WSON (Package Code ZP) . 67 12.4 13. 8-Pin SOIC 150-mil (Package Code SN) . 65 16-Pin SOIC 300-mil (Package Code SF). 69 ORDERING INFORMATION . 70 13.1 14. Valid Part Numbers and Top Side Marking . 71 REVISION HISTORY . 72 -4- W25Q80BV W25Q80BV 1. GENERAL DESCRIPTION The W25Q80BV W25Q80BV (8M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving packages. The W25Q80BV W25Q80BV array is organized into 4,096 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q80BV W25Q80BV has 256 erasable sectors and 16 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.) The W25Q80BV W25Q80BV supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation. A Hold pin, Write Protect pin and programmable write protection, with top, bottom or complement array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit Unique Serial Number. 2. FEATURES Family of SpiFlash Memories W25Q80BV W25Q80BV: 8M-bit/1M-byte (1,048,576) 256-byte per programmable page Standard SPI: CLK, /CS, DI, DO, /WP, /Hold Dual SPI: CLK, /CS, IO 0 , IO 1 , /WP, /Hold Quad SPI: CLK, /CS, IO 0 , IO 1 , IO 2 , IO 3 Highest Performance Serial Flash 104MHz Dual/Quad SPI clocks 208/416MHz equivalent Dual/Quad SPI 50MB/S 50MB/S continuous data transfer rate Up to 8X that of ordinary Serial Flash More than 100,000 erase/program cycles More than 20-year data retention Efficient "Continuous Read Mode" Low Instruction overhead Continuous Read with 8/16/32/64-Byte Wrap As few as 8 clocks to address memory Allows true XIP (execute in place) operation Outperforms X16 Parallel Flash Note 1: Contact Winbond for details Low Power, Wide Temperature Range Single 2.7 to 3.6V supply 4mA active current,