OC-48/STM-16 VSC8220 OC-48/SDH STM-16 G52291-0 - Datasheet Archive

 

SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 Features · OC-48/STM-16

 

VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Features · OC-48/STM-16 OC-48/STM-16 Clock and Data Recovery · Loss of Lock/Loss of Reference Clock Indicators · 2.488Gb/s LVPECL Data Input/Output · Differential Back Terminated High-Speed I/O · 2.488MHz LVPECL Recovered Clock Output · Meets SONET/SDH Requirements for Jitter Tolerance, Jitter Transfer and Jitter Generation. · Internal Phase Locked Loop (PLL) Maintains Clock Output in the Absence of Data · 3.3V Supply Operation · 1.2W Maximum Power Dissipation · Selectable LVPECL Reference Clock Input · 10x10x2mm 64-Pin PQFP Packaging General Description The VSC8220 VSC8220 is a single-chip clock and data recovery IC for use in SONET OC-48/SDH OC-48/SDH STM-16 STM-16 systems operating at 2.488Gb/s data rates. The VSC8220 VSC8220 complies with SONET jitter tolerance, jitter transfer and jitter generation specifications. Alarm functions support typical telecom system applications. The Loss of Lock (LOL) output indicates when the device goes out of lock, which would most often occur in the event of a loss of valid data. The NOREF output flags when the reference input to the VSC8220 VSC8220 either is removed, or goes severely out of tolerance. VSC8220 VSC8220 Block Diagram FILTO+/- FILTI+/Clock Recovery DI+ DI- Ph/Freq. Detector Loop Filter CO+ VCO CO- Data Retiming REFCK Lock Detect Divider DO+ DOLOL NOREF REF_SEL[1:0] G52291-0 G52291-0, Rev 4.0 04/02/01 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Page 1 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Functional Description High-Speed Data Input The VSC8220 VSC8220 high-speed data input receiver is internally terminated by a center-tapped resistor network as shown in Figure 1. For differential input AC coupling, the network is terminated to the appropriate termination voltage, VTERM through a blocking capacitor, CAC to ground. The input requires a differential signal with a peak-to-peak voltage on both the true (+) and complement (-) lines of a minimum of 250mV. These inputs are required to be AC coupled to permit use with a variety of limiting amplifiers. Figure 1: High-Speed Data Input Termination (AC-coupled) Limiting Amp VSC8220 VSC8220 Zo = 50 0.1 µF CAC DI+ 50 VTERM 50 Zo = 50 0.1 µF DI- High-Speed Clock and Data Outputs The VSC8220 VSC8220 high-speed clock and data outputs can be AC terminated, 50 to VCC as shown in Figure 2. Figure 2: High-Speed Clock and Data Output AC Termination VSC8220 VSC8220 VCC VCC 50 100 0.1 µF CO+ / DO+ Zo = 50 0.1 µF CO- / DO- 100 VCC Page 2 Zo = 50 50 VCC © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com G52291-0 G52291-0, Rev 4.0 04/02/01 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Outputs can also be DC terminated as shown in Figure 3. The output differential voltage and common-mode voltage range are specified in Table 4, High-Speed Inputs and Outputs. Figure 3: High-Speed Clock and Data Output DC Termination VSC8220 VSC8220 VTERM VCC 50 100 CO+ / DO+ CO- / DO- Zo = 50 100 VCC Zo = 50 50 VTERM Clock Recovery The VSC8220 VSC8220 incoming high-speed data is presented both to the clock recovery circuit and the data retiming circuit. When there is a phase error between the incoming data and the on-chip Voltage Controlled Oscillator (VCO), the loop filter raises or lowers the control voltage of the VCO to null the phase difference. The lock detector monitors the frequency difference between the REFCK (optionally divided by a prescaler), and the recovered clock divided by 128. In the event of the loss of an input signal, or if the input is switching randomly, the VCO will move in one direction. At the time the VCO differs by more than 1MHz from the REFCK-based 2.488GHz rate, the lock detector will assert the Loss Of Lock (LOL) output. LOL is designed to be asserted from between 2.3µs and 100µs after the interruption of data. The VCO will continue to be frequency locked at approximately 1MHz off of the REFCK-based 2.488GHz rate. When the high-speed data presents itself at the data input, the phase detector will permit the VCO to lock to the incoming data. Hysteresis is provided which delays the deassertion of LOL until approximately 160µs following the restoration of valid data. In the event that REFCK is lost, a No Reference (NOREF) output will go HIGH to indicate that there is no signal on the REFCK input. It will also go HIGH if the REFCK is more than approximately 25% above or below the expected value. Reference frequency inputs to the VSC8220 VSC8220 are shown in Table 1. Internally, the VSC8220 VSC8220 requires a 19.44MHz reference and the customer can select to provide either a 19.44MHz reference, or the 2x, 4x or 8x of that reference (38.88MHz, 77.76MHz or 155.52MHz). The REF_SEL[1:0] inputs will program the internal divider as required to use the selected REFCK frequency. LVPECL levels are recommended for REFCK inputs and interface schemes are shown in Figure 4. It is also recommended that an unused reference clock input be tied to GND. G52291-0 G52291-0, Rev 4.0 04/02/01 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Page 3 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Figure 4: REFCK Input Levels LVPECL Level REFCK Inputs (recommended) NON-LVPECL Level REFCK Inputs 0.1µf REFCK REFCK VSC8220 VSC8220 50 VSC8220 VSC8220 50 VTERM VTERM * VTERM can be to any power supply, as long as LVPECL levels are supplied to REFCK inputs. Typically, VEE (typ. GND) is used as VTERM. * For differential REFCK input signals, 100 termination between true and complement REFCK signals can be substituted for the 50 to VTERM termination on each line. Table 1: Reference Frequency Reference Frequency REF_SEL0 REF_SEL1 19.44MHz 0 0 38.88MHz 1 0 77.76MHz 0 1 155.52MHz 1 1 Loop Filter The Phase Locked Loop (PLL) on the VSC8220 VSC8220 employs two external capacitors. The PLL design is fully differential, therefore the loop filter must also be fully differential. One capacitor should be connected between FILTO+ and FILTI+, with the other connected between FILTO- and FILTI-. Recommended capacitors are low inductance 1.0µF (0603 or 0805) ceramic SMT X7R devices, 6.3 WVDC or greater. Page 4 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com G52291-0 G52291-0, Rev 4.0 04/02/01 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 AC Characteristics (Over recommended operating conditions) Table 2: AC Characteristics Parameters Description Min Typ Max Units Conditions tPD Center of Output Data Eye from Rising Edge of CO+ -75 +75 ps tr,tf DO± Rise and Fall Times - 150 ps. 20% to 80% into 50 load. tr,tf CO± Rise and Fall Times - 135 ps 20% to 80% into 50 load. Measured at the high-speed data output for jitter in the ps - rms 12kHz - 20MHz band. Assume 1.2ps rms input data jitter. JitterGEN Jitter Generation (12kHz-20Mhz) - 3.6 JitterTOL Jitter Tolerance - - - LBW Loop Bandwidth - 2.0 MHz JitterPEAK Jitter Peaking - 0.1 dB Exceeds SONET/SDH mask -3dB point of jitter transfer curve Figure 5: High-Speed Clock and Data Outputs 80% DO 20% tPD tr,tf 80% CO 20% tf tr Table 3: High-Speed Inputs and Outputs Parameters Description Min Typ Max Units VOD Data Output Voltage Swing 600 900 1000 mV VOC Clock Output Voltage Swing 500 700 1000 mV VCMO Common-Mode Range (DO/CO) 2.6 - 3.2 V VDIFF Serial Input Absolute Voltage, Single-Ended Peak-to-Peak Swing (VIH-VIL) for DI +/- 250 - 1200 mV RIN Input Resistance Between DI+ and VTERM or DI- and VTERM 43 - 58 Conditions G52291-0 G52291-0, Rev 4.0 04/02/01 AC-coupled © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Page 5 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Table 4: REFCLK Parameters Parameters Description Min Typ Max Units 45 - 55 % REF_CLK Frequency Range -100 - +100 ppm VIH REF_CLK Input HIGH Voltage VCC1.165 - VCC0.7 V VIL REF_CLK Input LOW Voltage VCC2.0 - VCC1.475 V REF_CLK Duty Cycle Conditions DC Characteristics (Over recommended operating conditions) Table 5: TTL Inputs and Outputs Parameters Description Min Typ Max Units Conditions VOH Output HIGH Voltage 2.4 - - V IOH = -1.0mA VOL Output LOW Voltage - - 0.5 V IOL= 1.0mA VIH Input HIGH Voltage 2.0 - 3.47 V VIL Input LOW Voltage 0 - 0.8 V IIH Input HIGH Current - 50 500 µA VIN = 2.4V IIL Input LOW Current - - 500 µA VIN = 0.5V Min Typ Max Units 3.14 3.3 3.47 V 3.3V± 5% Table 6: Power Supply Parameters Description Conditions VCC Supply voltage PD Power dissipation - 1.0 1.2 W Outputs unterminated ICC Supply Current - 300 347 mA Outputs unterminated Page 6 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com G52291-0 G52291-0, Rev 4.0 04/02/01 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Absolute Maximum Ratings (1) Power Supply Voltage (VCC) . -0.5V to +3.8V DC Input Voltage (differential inputs) .-0.5V to VCC +0.5V DC Input Voltage (TTL inputs). -0.5V to +5.5V DC Output Voltage (TTL outputs) . -0.5V to VCC + 0.5V Output Current (TTL outputs). +/-50mA Output Current (differential outputs) .+/-50mA Case Temperature Under Bias. -55oC to +125oC NOTE: (1) CAUTION: Stresses listed under "Absolute Maximum Ratings" may be applied to devices one at a time without causing permanent damage. Functionality at or above the values listed is not implied. Exposure to these values for extended periods may affect device reliability. Recommended Operating Conditions Power Supply Voltage (VCC) .+3.3V+5% Operating Temperature Range .0oC Ambient to +85oC Case Temperature ESD Ratings Proper ESD procedures should be used when handling this product. The VSC8220 VSC8220 is rated to the following ESD voltages based on the human body model: 1. All pins are rated at or above 1500V. G52291-0 G52291-0, Rev 4.0 04/02/01 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Page 7 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Package Pin Descriptions NC NC NC VCC VEE VTERM VCC DI+ DI- VCC VEE VEE VCC REF_SEL[1] REF_SEL[0] VCC 61 60 59 58 57 56 55 54 53 52 51 50 49 3 NC 62 2 NC 63 1 NC VCC 64 Figure 6: Pin Diagram 48 VEE 47 REFCK+ 46 REFCK- 4 45 NC VEE_ANA 5 44 NC VCC_ANA 6 43 VEE NC 7 42 VCC NC 8 41 VEE LOL 9 40 VCC NOREF 10 39 DO+ VCC 11 38 DO- FILTO+ 12 37 VCC FILTI+ 13 36 VEE FILTI- 14 35 VCC FILTO- 15 34 NC VEE 16 33 NC Page 8 25 26 27 28 29 30 31 32 VCC CO- CO+ VCC VEE VCC NC 22 NC VEE 21 NC 24 20 NC 23 19 NC NC 18 NC VCC 17 VCC VSC8220 VSC8220 Top View, PQFP © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com G52291-0 G52291-0, Rev 4.0 04/02/01 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Table 7: Pin Identifications Pin # Name I/O Level Description 1 NC - - No connect, leave unconnected(1) 2 NC - - No connect, leave unconnected(1) 3 NC - - No connect, leave unconnected(1) 4 NC - - No connect, leave unconnected(1) 5 VEE_ANA - GND Negative power supply pins for analog parts of CMU 6 VCC_ANA - +3.3V Positive power supply pins for analog parts of CMU 7 NC - - No connect, leave unconnected(1) 8 NC - - No connect, leave unconnected(1) 9 LOL O TTL Loss of lock indication 10 NOREF O TTL No reference output. Active HIGH for REFCK far off the expected frequency. 11 VCC - +3.3V 12 FILTO+ I - Loop filter pin - connect via capacitor to FILTI+ 13 FILTI+ I - Loop filter pin - connect via capacitor to FILTO+ Positive power supply 14 FILTI- I - Loop filter pin - connect via capacitor to FILTO- 15 FILTO- I - Loop filter pin - connect via capacitor to FILTI- 16 VEE - GND Negative power supply 17 VCC - +3.3V Positive power supply 18 NC - - No connect, leave unconnected(1) 19 NC - - No connect, leave unconnected(1) 20 NC - - No connect, leave unconnected(1) 21 NC - - No connect, leave unconnected(1) 22 NC - - No connect, leave unconnected(1) 23 NC - - No connect, leave unconnected(1) 24 VCC - +3.3V Positive power supply 25 VEE - GND Negative power supply 26 VCC - +3.3V 27 CO- O High-Speed High-speed clock output, complement. 28 CO+ O High-Speed High-speed clock output, true. 29 VCC - +3.3V Positive power supply 30 VEE - GND Negative power supply 31 VCC - +3.3V Positive power supply 32 NC - - No connect, leave unconnected(1) 33 NC - - No connect, leave unconnected(1) 34 NC - - No connect, leave unconnected(1) G52291-0 G52291-0, Rev 4.0 04/02/01 Positive power supply © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Page 9 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Pin # Name I/O Level Description 35 VCC - +3.3V Positive power supply 36 VEE - GND Negative power supply 37 VCC - +3.3V 38 DO- O High-Speed High-speed data output, complement. 39 DO+ O High-Speed High-speed data output, true. 40 VCC - +3.3V 41 VEE - GND Negative power supply 42 VCC - +3.3V Positive power supply 43 VEE - GND Negative power supply 44 NC - - No connect, leave unconnected(1) 45 NC - - No connect, leave unconnected(1) 46 REFCK- I LVPECL Reference clock input, complement. 47 REFCK+ I LVPECL Reference clock input, true. 48 VEE - GND 49 VCC - +3.3V 50 REF_SEL[0] I - Reference clock rate select, pin 0. 51 REF_SEL[1] I - Reference clock rate select, pin 1. 52 VCC - +3.3V Positive power supply 53 VEE - GND Negative power supply 54 VEE - GND Negative power supply 55 VCC - +3.3V Positive power supply 56 DI- I LVPECL High-speed data input, complement. High-speed data input, true. Positive power supply Positive power supply GND power supply Positive power supply 57 DI+ I LVPECL 58 VCC - +3.3V 59 VTERM - 0V->3.3V 60 VEE - GND Negative power supply. 61 VCC - +3.3V Positive power supply 62 NC - - 63 VCC - +3.3V 64 NC - - Positive power supply High-speed0 data input termination voltage, connect through a series AC-coupling capacitor to ground. No connect, leave unconnected(1) Positive power supply No connect, leave unconnected(1) NOTE: (1) No connect (NC) pins must be left unconnected, or floating. Connecting any of these pins to either the positive or negative power supply rails may cause improper operation or failure of the device; or in extreme cases, cause permanent damage to the device. Page 10 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com G52291-0 G52291-0, Rev 4.0 04/02/01 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Package Information 64-pin PQFP Package Drawing F Item 17 13.20 ±.25 10.00 ±.10 13.20 ±.25 10.00 ±.10 0.88 ±.15 K 33 ±.05 J 16 0.22 I H +0.10 H I L 2.00 G 1 MAX F 48 2.45 D 49 Tol. E 64 10 mm A G 0.50 BASIC 32 10o TYP D A 100 TYP K 0.30 RAD. TYP. A STANDOFF 0.25 MAX. 0.20 RAD. TYP . 0 o - 8o 0.17 MAX. 0.25 0.102 MAX. LEAD COPLANARITY E J NOTES: Drawing not to scale. Heat spreader up on 10mm package only. All units in mm unless otherwise noted. Heat spreader is not electrically connected. G52291-0 G52291-0, Rev 4.0 04/02/01 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Page 11 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 Package Thermal Considerations This package has been enhanced with a copper heat slug to provide a low thermal resistance path from the die to the exposed surface of the heat spreader. The thermal resistance is shown in Table 8. Table 8: Thermal Resistance Symbol Description °C/W JC Thermal resistance from junction-to-case. 1.5 CA Thermal resistance from case-to-ambient with no airflow, including conduction through the leads. 31.5 Thermal Resistance with Airflow Shown in Table 9 is the thermal resistance with airflow. This thermal resistance value reflects all the thermal paths including through the leads in an environment where the leads are exposed. The temperature difference between the ambient airflow temperature and the case temperature should be the worst-case power of the device multiplied by the thermal resistance. Table 9: Thermal Resistance with Airflow Airflow CA (oC/W) 100 lfpm 25.8 200 lfpm 23.0 400 lfpm 19.3 600 lfpm 17.0 Maximum Ambient Temperature without Heatsink The worst case ambient temperature without use of a heatsink is given by the equation: T A ( MAX ) = T C ( MAX ) ­ P ( MAX ) CA where: CA TA(MAX) TC(MAX) P(MAX) Page 12 = = = = Theta case-to-ambient at appropriate airflow Ambient air temperature Case temperature (85oC for VSC8220 VSC8220) Power (1.2 W for VSC8220 VSC8220) © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com G52291-0 G52291-0, Rev 4.0 04/02/01 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 The results of this calculation are listed in Table 10: Table 10: Maximum Ambient Air Temperature without Heatsink Airflow Temperature (oC) None 47.2 100 lfpm 54.0 200 lfpm 57.4 400 lfpm 61.8 600 lfpm 64.6 Note that ambient air temperature varies throughout the system based on the positioning and magnitude of heat sources and the direction of air flow. Ordering Information The order number for this product is formed by a combination of the device number, and package type. VSC8220 VSC8220 xx Device Type OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC Package Style QP: 64-pin PQFP, 10x10mm Notice Vitesse Semiconductor Corporation ("Vitesse") provides this document for informational purposes only. All information in this document, including descriptions of features, functions, performance, technical specifications and availability, is subject to change without notice at any time. Nothing contained in this document shall be construed as extending any warranty or promise, express or implied, that any Vitesse product will be available as described or will be suitable for or will accomplish any particular task. Vitesse products are not intended for use in life support appliances, devices or systems. Use of a Vitesse product in such applications without written consent is prohibited. G52291-0 G52291-0, Rev 4.0 04/02/01 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Page 13 VITESSE SEMICONDUCTOR CORPORATION Data Sheet OC-48/STM-16 OC-48/STM-16 SONET/SDH Clock and Data Recovery IC VSC8220 VSC8220 This page left intentionally blank. Page 14 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com G52291-0 G52291-0, Rev 4.0 04/02/01