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Part : VL16C451-QC Supplier : VLSI Solution Manufacturer : Bristol Electronics Stock : 31 Best Price : $6.5625 Price Each : $10.50
Part : VL16C451QC Supplier : - Manufacturer : Chip One Exchange Stock : 5,880 Best Price : - Price Each : -
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VL16C450

Catalog Datasheet MFG & Type PDF Document Tags

VL16C450

Abstract: VL16C450PC INFORMATION Part Number VL16C450-PC VL16C450-QC VL82C50A-PC VL82C50A-QC VL82C50-PC VL82C50-QC Clock Frequency , the VL16C450. In the diagnostic mode, data transmitted is immediately received. This allows the , VLSI T e c h n o l o g y , in c . VL16C450 · VL82C50A · VL82C50 ASYNCHRONOUS COMMUNICATIONS , bus DESCRIPTIONS The VL16C450 is an asynchronous communications element (ACE) that is functionally , specifications provide ensured compatibility with state-of-theart CPUs. The VL16C450, VL82C50A, and VL82C50 ACEs
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VL16C450PC VL82C50PC VL16C450QC vl82c 68-PIN T-90-20 84-PIN 100-PIN

VL82C50

Abstract: VL82C50-PC Number Clock Frequency Package VL16C450-PC VL16C450-QC 3.1 MHz Plastic DIP Plastic , VLSI Technology, inc . VL16C450»VL82C50A»VL82C50 ASYNCHRONOUS COMMUNICATIONS ELEMENT FEATURES DESCRIPTIONS â'¢ Full double buffering The VL16C450 is an asynchronous communications element (ACE) that , modem control output pins are forced to their inactive state (high) on the VL16C450. In the , conditions involving parity, overrun, framing, or break interrupt. The VL16C450, VL82C50A, and VL82C50
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DQDST27

VL16C550

Abstract: VL16C450 are identical to those of the VL16C450. Improved VL16C550 specifications provide compatibility with , Fully compatible with VL16C450 ACE · 16 byte FIFO reduces CPU interrupts · Full double buffering · Modem , an asynchronous communications element (ACE) that is functionally equivalent to the VL16C450, and , , the VL16C550 is in VL16C450 mode. In this mode, the UARTs mimic FIFO Mode 0, which allows for single , the FIFO are made. Note: When the FIFO's are disabled, the VL16C550 is in VL16C450 mode. In this mode
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Delco 195 sorep s3607 VL16C550PC MSR 200 VL16C
Abstract: . The complement of this bit corresponds to the -O U T 2 pin on a VL16C450. Bit 4 - MCR(4) provides a , disabled, the VL16C554 is in VL16C450 mode. In this mode, the UARTs mimic FIFO Mode 0, which allows for , . Note: -IO R 5 1 1 W hen the FIFOs are disabled, the VL16C554 is in VL16C450 mode. In this , always 0 in the VL16C450 Mode. 8 VLSI T e c h n o l o g y , in c . VL16C554 Reg 4 Read/W , VL16C450 Mode or FIFO Mode 0. W hen in FIFO Mode 1, this bit is not set low until the last character is -
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16C550

CX20106A

Abstract: GL7805 - GM16C450 GM16C451 MX16C450 MX16C451 WD16C450 VL16C451 VL16C450 WD16C451
GoldStar
Original
GL317 GL348 GL386 LA7830 GL1150 GL1151 CX20106A GL7805 GL7809 GAS105 2SB474 GD75188 GD75189 DS1488 DS1489

VY86C010

Abstract: VY86C110 VL16C450 Asynchronous Communications Element and VL1772 Floppy Disk Controller without severe latency on
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VY86C010 VY86C110 risc s7 VY86C410 VY86C010/VY86C110/VY86C310 VY86C410-08QC VY86C410-10QC

VL16C450

Abstract: VL16C451B C M O w VL16C450 UART i 5 a 1 £ 4 3 2 1 3 £D W o J > O Q Q] I , : When the FIFO's are disabled, the VL16C551 is in VL16C450 mode. In this mode, the UARTs mimic FIFO Mode , data. This bit is set low by a read of the RBR when in VL16C450 Mode or FIFO Mode 0. When in FIFO 2 , bit is set to one. Bit 7 - This bit is always 0 in the VL16C450 Mode. In FIFO Mode, it is set when at , . The FIFO's operate in VL16C450 mode when bit 0 of the FCR = 0. All bytes in both FIFOs can be cleared
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VL16C451B Burr Brown PWR 74 Nippon capacitors 91667 traco power tme MARKING vlsi 486

vl16c552

Abstract: the FIFO are made. NOTE: When the FIFO's are disabled, the VL16C552 is in VL16C450 mode. In this , a read of the RBR when in VL16C450 Mode or FIFO Mode 0. When in FIFO Mode 1, this bit is not set , to one. 9 LSR(7) This bit is always 0 in the VL16C450 Mode. In FIFO Mode, it is set when at , FCR(O) to a one. The FIFO's operate in VL16C450 Mode when FCR(O) is zero. All bytes in both FIFOs , VL16C450 Mode and vice versa. FCR(1) RCVR FIFO Reset: This bit clears all bytes in the RCVR FIFO and
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VL16C452 VL16C452B

VL86C410

Abstract: VL16C450 cycle thats allows the system to use slower, low-cost periph eral controllers such as the VL16C450
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VL86C410 VL86C410-08QC VL86C010/VL86C110/VL86C310 VLS6C410 VL86C410-08LC

VL16C451

Abstract: VL16C452B INDIVIDUAL FEATURES · · VL16C450 - Single UART VL16C451B - Single UART (enhanced VL16C451) - Parallel port
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74 TTL PACKAGE OUTLINES VL16C45X VL16C55X

vl82c110

Abstract: DESCRIPTION (C oni.) The on-chip UARTs are 100% software compatible with the VL16C450 ACE. The , COMMUNICTIONS PORTS The chip contains two UARTS based on the VL16C450 ACE. The UART clock is the 24 MHz clock
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vl82c110 VL82C110 16C450 NS16C450 PC87310

VL16C450

Abstract: VL16C452 on-chip UARTs are 100% software compatible with the VL16C450 ACE. The bidirectional parallel port , COMMUNICTIONS PORTS The chip contains two UARTS based on the VL16C450 ACE. The UART clock is the 24 MHz clock
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lpt port direction bit 5 ria PD6 hard disk head motor lpt control VL82C110-PFC

82c042

Abstract: vl82c1 V L S I Tech n o lo gy , in c . tio v i 2 . U M DM, VL82C108 TOPCAT COMBO I/O CHIP FEATURES · Combines the following PC/AT®compatible peripheral chips: VL16C450 UART - COM1: Parallel , compatible with the VL16C450 ACE. The bidirectional parallel port provides a PS/2 software compatible , contains a UART based on the VL16C450 Megacell core. The baudrate clock is the XTAL1 input (18.432 MHz , get an approximate 6 MHz reference clock. Please refer to the VL16C450 data sheet for the register
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82c042 vl82c1 CP342 ibm AT keyboard controller VL82C10 102h 16C450- 74LS245 74ALS244

laptop MOTHERBOARD Chip Level MANUAL

Abstract: VL82c311 characters transmitted by the CPU. VL16C450 Single UART » VL16C451B Single UART (enhanced VL16C451) °
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laptop MOTHERBOARD Chip Level MANUAL VL82c311 topcat ibm schematics 80286 VL82C106 80286 microprocessor schematics 286/386SX 80386SX VL82C320A VL82C335

30 pin dock connector

Abstract: VL16C450 UARTs are 100% software compatible with the VL16C450 ACE. The bidirectional parallel port provides a PS , SERIAL COMMUNICTIONS PORTS The chip contains two UARTS based on the VL16C450 ACE. The UART clock is the
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30 pin dock connector MTR100

VL16C450

Abstract: NS16450 Package ISÏÃ'Ïmm s B ¡2 Plastic-DIP Package FEATURES â'¢Functional compatible to NS16450, VL16C450
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ST16C2450 ST16C2450CP40 162450-RD-1 ST16C2450CJ44 161450-CK-1 QQ440 T30-H

16c2450cp

Abstract: INTB FEATURES · Functional compatible to NS16450, VL16C450, WD16C450 >Modem control signals (CTS
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16c2450cp
Abstract: NS16450, VL16C450, WD16C450 1Modem control signals (CTS*, RTS*, DSR*, DTR*, Rl*, CD*) â Programmable -
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162450-WD-1

mcr 12m

Abstract: compatible to NS16450, VL16C450, WD16C450 · Modem control signals (CTS*, RTS*, DSR*, DTR*, RI*, CD*) Â
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mcr 12m 162450-MD-1 162450-RX-1 162450-TX-1

VL82c311

Abstract: 386DX motherboard parallelto-serial conversion on data characters transmitted by the CPU. ° VL16C450 Single UART ° VL16C451B Single
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386DX motherboard VL82C331-FC VL82C332-FC scamp VLB2C386-SET VL82C331FC 386DX 80386DX VL82C330A PB-001B
Abstract: 34 OP1* D7 · Pin to pin and functional compatible to NS16450,VL16C450,WD16C450 · Modem -
Original
ST16C450 ST16C450CJ44 16450-CK-1 16450-RD-1 16450-WD-1 16450-MD-1

VL16C450

Abstract: 10 35L cd - ° w Plastic-DIP Package FEATURES Pin to pin and functional compatible to NS16450, VL16C450
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ST16C450CP40 ST16C450CQ48 10 35L cd TGG440 16450-RX-1 16450-TX-1 1QG440
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