NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 1 NG OK NG 2 OK VDD15/GND NG VDD15/GND 2 OK OK 1. = + I/O 2. 1 ±10 I/O, PLL PDGate 2.0 W PD66201 PD66201, 66202, 66203, 66204 PDGate 4.7 W PD66205 PD66205, 66206, 66207, 66208, 66209, 66210 PDGate = PDCELLPDRAMPDCTSW GNDGND VDD1.5 V= 20 Ã- PDGate GND = 20 Ã- PDGate PDGate = PDCELL + PDRAM + PDCTS 2 ... | Original |
2 pages, |
datasheet abstract |
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| Abstract: PLL VSS LD14 VDD1.5 LA4 LA8 VSS AVSS_ PLL VDD3.3 VDD1.5 AVDD_ PLL , DB15 DQM L DB10 DB11 DB12 VDD1.5 L VSS VSS VSS M DB6 DB7 DB8 , VSS VDD1.5 R VSS VSS VSS DMA7 VDD1.5 T VSS VSS VSS DMA2 DMA3 , AC YUV5 YUV4 YUV3 VSS YDAC VDD1.5 UDAC VSS AUX7 AUX6 AD YUV7 , AVSS_ PLL VID_XO AVDD_ PLL AVDD_ PLL VSS VID_XI VDD1.5 AVSS_ PLL AVSS_ PLL ... | Original |
6 pages, |
spdif atapi CCIR656 ES7020 LA12 LA16 LA18 LD11 MD26 388-PIN HD12 DECODER MD31 ES7020D ES7020 abstract |
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| Abstract: VDD15_55 VDD15_56 VDD15_57 VDD15_58 VDD15_59 VDD15_60 VDD15_61 VDD15_62 VDD15_63 VDD15_64 1.5V , VDD15_10 VDD15_9 VDD15_8 VDD15_7 VDD15_6 VDD15_5 VDD15_4 VDD15_3 VDD15_2 VDD15_1 AC30VDDOB AC30VDDOB_BA , VDD15_17 VDD15_18 VDD15_19 VDD15_20 VDD15_21 VDD15_22 VDD15_23 VDD15_24 VDD15_25 VDD15_26 VDD15_27 VDD15_28 VDD15_29 VDD15_30 VDD15_31 VDD15_33 VDD15_34 VDD15_35 VDD15_36 VDD15_37 VDD15_38 VDD15_39 VDD15_40 VDD15_41 VDD15_42 VDD15_43 VDD15_44 VDD15_45 VDD15_46 VDD15_47 ... | Original |
16 pages, |
8x2 connector header CON96 JP13 JP15 JP16 JP32 JP35 PT29D MPC860 PB21B pt36d PT25D ak25p debounce IC n20 fuse ORSO/ORT82G5 ORSO/ORT82G5 abstract |
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| Abstract: Flow for Calculating Power Consumption Estimating total power consumption of chip Note 1 Changing package or circuit NG Is allowable power consumption of package satisfied? OK Changing frequency or circuit NG Is internal power consumption limit satisfied? Note 2 OK Adding VDD15/GND NG Is allowable power of VDD15/GND for internal cell satisfied? OK Power consumption: OK Note 1. Power consumption of entire chip = power consumption of internal cell + I/O power ... | Original |
2 pages, |
datasheet abstract |
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| Abstract: , internal pullup I Async VDD18 VDD18 - - - 1.8V core power VDD15 - - - , Conditions mA VDD15 1.5V HSTL supply 1.425 1.5 1.575 V ±5% VDD18 VDD18 1.8V Core , A3 VDD15 P B13 HT_DOUT_12 O A4 HT_CLK_CN I B14 VDD15 P A5 , B17 HT_CLK_KP O A8 VDD15 P B18 HT_DOUT_34 O A9 GND P B19 HT_ADDR_15 O GND P A10 HT_DIN_34 I B20 A11 HT_DIN_35 I B21 VDD15 P ... | Original |
30 pages, |
ZTM200 89TTM553 Flip-chip 1.8V SRAM 89TTM553 abstract |
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| Abstract: , internal pullup I Async VDD18 VDD18 - - - 1.8V core power VDD15 - - - , Conditions mA VDD15 1.5V HSTL supply 1.425 1.5 1.575 V ±5% VDD18 VDD18 1.8V Core , B11 HT_DIN_32 I HT_DOUT_13 O A2 GND P B12 A3 VDD15 P B13 HT_DOUT_12 O A4 HT_CLK_CN I B14 VDD15 P A5 HT_CLK_CP I B15 GND P , VDD15 P B18 HT_DOUT_34 O A9 GND P B19 HT_ADDR_15 O GND P A10 ... | Original |
29 pages, |
89TTM553 ZTM200 89TTM553 abstract |
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| Abstract: Threshold Current â- th 50 pA VDD=15 V 10 VDd=5 V 1 V0D=3 V Trigger Voltage V,r 1/3 VDD V Trigger Current â- tr 50 pA Vdd-15 V 10 VDD»5 V 1 VDD-3 V Reset Voltage (VQ becoms low) Vreset 0.6 1.1 2.0 V Vdd=15 V 0.6 1.1 2.0 VDD'3 V Reset Current 'reset 100 pA Vreset-gnd, Vdd-15 V 20 vreset-gnd, V0d=5 V 2 VRESET=gnd, vdd-3 V Output Low Voltage VOL 0.06 0.4 V Vdd=15V, lSINK=3.2 mA , > isink=3-2 ma VdD-5V VDD-15 V -20 0 50 80 Ta-Ambient Temperature-°C discharge current 0.010.02 0.05 0.1 0.2 ... | OCR Scan |
8 pages, |
PD5555 mpd5555 UPD5555 /UPD5555 PD5555 abstract |
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| Abstract: Threshold Voltage Vth 2/3 Vqd V Threshold Current â- th 50 PA VDD=15 V 10 Vdd=5 V 1 V0D=3 V Trigger Voltage V,r 1/3 VDD V Trigger Current â- tr 50 pA Vdd-15 V 10 Vdd»5 V 1 VDD-3 V Reset Voltage (VQ becoms low) vreset 0.6 1.1 2.0 V Vdd=15 V 0.6 1.1 2.0 VDD'3 V Reset Current 'reset 100 pA Vreset-gnd, Vdd-15 V 20 vreset-gnd, V0d=5 V 2 vreset=gnd, vdd-3 v Output Low Voltage vol 0.06 0.4 V vdd=15v, lsink=3.2 ma 0.14 0.4 Vdd-5 V, lsiNK=3-2 mA Output High Voltage Voh ... | OCR Scan |
8 pages, |
PD5555 upd5555 PD5555G mpd5555 /UPD5555 UPD5555 PD5555 abstract |
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| Abstract: , LC8MHz IDD2 VDD2VDD25V VDD2VDD25V SYNC VSN CVOUT VDD15.0V VDD25 VDD25.0V VPD CVOUT VDD15.0V VDD25 VDD25.0V , VCBL CVOUT VDD15.0V VDD25 VDD25.0V H VCBH CVOUT VDD15.0V VDD25 VDD25.0V L VRSL0 CVOUT VDD15.0V VDD25 VDD25.0V H VRSH0 CVOUT VDD15.0V VDD25 VDD25.0V 1 L VRSL1 CVOUT VDD15.0V VDD25 VDD25.0V 2 L VRSL2 CVOUT VDD15.0V VDD25 VDD25.0V 1, 2 H VRSH1, 2 CVOUT VDD15.0V VDD25 VDD25.0V 0 VBK0 CVOUT VDD15.0V VDD25 VDD25.0V 1 VBK1 CVOUT VDD15.0V VDD25 VDD25.0V VCHA CVOUT VDD15.0V ... | Original |
22 pages, |
PAL60 NTSC44 LC74789N LC747 DIP24S LC74789N abstract |
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| Abstract: , LC8MHz IDD2 VDD2VDD25V VDD2VDD25V SYNC VSN CVOUT VDD15.0V VDD25 VDD25.0V VPD CVOUT VDD15.0V VDD25 VDD25.0V , VCBL CVOUT VDD15.0V VDD25 VDD25.0V H VCBH CVOUT VDD15.0V VDD25 VDD25.0V L VRSL0 CVOUT VDD15.0V VDD25 VDD25.0V H VRSH0 CVOUT VDD15.0V VDD25 VDD25.0V 1 L VRSL1 CVOUT VDD15.0V VDD25 VDD25.0V 2 L VRSL2 CVOUT VDD15.0V VDD25 VDD25.0V 1, 2 H VRSH1, 2 CVOUT VDD15.0V VDD25 VDD25.0V 0 VBK0 CVOUT VDD15.0V VDD25 VDD25.0V 1 VBK1 CVOUT VDD15.0V VDD25 VDD25.0V VCHA CVOUT VDD15.0V ... | Original |
22 pages, |
VS21 VS20 LC74789N LC74789N abstract |
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| Abstract: Vdd 15, 27, 34, 65 14,30,31,44,53, 74 BH9506BDS2 BH9506BDS2 777 43 OUT 42 FCR 4. OMC 5 7T7 ... | OCR Scan |
1 pages, |
BH9506BDS2 bh9506 BH9506BDS2 abstract |
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| Abstract: Vdd 1,5 28 MN150205MA MN150205MA OSC1 2 1 OSC2 3 FCR4.0MC5 V1H/V1L 3 V2H/V2L CL1 CL2 2 *BUILT-IN LOADING CAPACITOR CL1/CL2=30/30pF +/-20% Oscillating circuit for evaluation ... | Original |
1 pages, |
MN150205MA MN150205MA abstract |
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| Abstract: Vdd 15 1-14,18-36 M37540M4 M37540M4 XIN 16 XOUT 17 FCR16 FCR16.0M2G 1 2 V1H/V1L V2H/V2L CL1 CL2 5pF 5pF Oscillating circuit for evaluation ... | Original |
1 pages, |
M37540M4 FCR16 M37540M4 abstract |
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| Abstract: Vdd 15 7,16 LC7367J LC7367J Xin 13 1 Xout 14 FCR3.58MC5 58MC5 3 V2H/V2L CL1 CL2 2 *BUILT-IN LOADING CAPACITOR CL1/CL2=30/30pF +/-20% Oscillating circuit for evaluation ... | Original |
1 pages, |
LC7367J LC7367J abstract |
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| Abstract: Vdd 15 1-14,18-36 M37540M4 M37540M4 XIN 16 1 XOUT 17 FCR4.0MC5 V1H/V1L 3 V2H/V2L CL1 CL2 2 *BUILT-IN LOADING CAPACITOR CL1/CL2=30/30pF +/-20% Oscillating circuit for evaluation ... | Original |
1 pages, |
M37540M4 M37540M4 abstract |
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| Abstract: (continued) Pin Symbol Type I/O Description Power and Ground Signals (continued) Common VDD15 Pins (96) VDD15 CMOS - Common power signals for 1.5 V VDD. AA7, AA16, AA17, AA18, AA19, AA28, AB7 , ] VDD33 VDD33 DS3POSDATAOUT[2] DS3NEGDATAOUT[2] VDD15 Vss Vss Pin AA16 AA17 AA18 AA19 AA21 AA22 , AC34 Signal Name VDD15 VDD15 VDD15 VDD15 VSS VSS VDD15 CHITXDATA[35] CHITXDATA[37] VSS CHITXDATA[39] CHITXDATA[42] CHITXGFS DS3NEGDATAOUT[1] DS3POSDATAOUT[1] DS3RXCLKOUT[3] VDD15 VSS VSS ... | Original |
56 pages, |
VC12 TMXF84622 LT 7224 AN11 AN10 AD17 TOWARD AC30 TMXF84622 abstract |
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| Abstract: 0.510.4- -32.6(MIN V.A)- -30.72- -9.0 (MAX)- > 106X56 106X56 DOTS r0.5i0.4 Z.O(MAX)- CNJ o un CD -d-C5 -h LO 1-0.25 30.5x19=9.5-^ 0.710,H -7.50- -36.6+0.2- I-0.710. DETAIL A; 0.27i^-H).02 (Tvl r- o NO. SYMBOL 1 N/C 2 VO V4 4 V3 5 V2 6 V1 7 C2- 8 C2+ 9 C1 + 10 C1- 11 C3f 12 vout 13 Vss 14 Vdd 15 SID 16 SCLK 17 RS 18 /RESET 19 /CS1 20 N/C ... | OCR Scan |
1 pages, |
106X56 106X56 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| Io Output Current @ Vdd=15V 7 mA tpd Delay Time @ Vdd=15V 45 (typ) ns www.datasheetarchive.com/files/stmicroelectronics/stonline/prodpres/standard/stanlogi/cmos-v1.htm |
STMicroelectronics | 14/12/2000 | 8.31 Kb | HTM | cmos-v1.htm |
| -40 to 85 °C Io Output Current @ Vdd=15V 7 mA tpd Delay Time @ Vdd=15V 45 www.datasheetarchive.com/files/stmicroelectronics/stonline/prodpres/standard/stanlogi/cmos.htm |
STMicroelectronics | 20/10/2000 | 50.61 Kb | HTM | cmos.htm |
| bit ; - 101 0 VDDI : linkage bit ; - 102 0 VDD15 : linkage ,"& "VDD15 : 103,"& "VSS15 VSS15 VSS15 VSS15 : 104,"& "RDB : 105,"& "RSPB www.datasheetarchive.com/files/infineon/products/ics/33/mun128x/m128x11.bsd |
Infineon | 17/09/1998 | 35.97 Kb | BSD | m128x11.bsd |
| Device listing for Drivers - Digital Still Camera Drivers - Digital Still Camera >> Semiconductor Home > Applications > Block Diagrams > Suggested High Speed Operational Amplifiers devices: Device Name Attributes Vcc / Vdd +/- 15 (V) Vcc / Vdd +/- 5 (V) Vcc / Vdd 5 (V) Acl, min stable gain (V/V) BW @ Acl (MHz) Slew Rate (V/us) Settling Time (0.1%) (typ) (ns) Io (typ) (mA) THD (Fc=1 MHz) (typ) (dB) Diff Gain (%) Diff Phase www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/psheets/diagrams/subsys/cam_driv.htm |
Texas Instruments | 29/01/2000 | 10.4 Kb | HTM | cam_driv.htm |
| Device listing for PC Client ADSL Chipset - Line Driver PC Client ADSL Chipset - Line Driver >> Semiconductor Home > Applications > Block Diagrams > Suggested High Speed Operational Amplifiers devices: Device Name Attributes Vcc / Vdd +/- 15 (V) Vcc / Vdd +/- 5 (V) Acl, min stable gain (V/V) BW @ Acl (MHz) Slew Rate (V/us) Settling Time (0.1%) (typ) (ns) Io (typ) (mA) THD (Fc=1 MHz) (typ) (dB) Diff Gain (%) Diff Phase (deg) Vio (max www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/psheets/diagrams/subsys/pc_line.htm |
Texas Instruments | 29/01/2000 | 8.84 Kb | HTM | pc_line.htm |
| Device listing for Wireless Base Station Transceiver - Transmit - Amp Wireless Base Station Transceiver - Transmit - Amp >> Semiconductor Home > Applications > Block Diagrams > Suggested High Speed Operational Amplifiers devices: Device Name Attributes Vcc / Vdd +/- 15 (V) Vcc / Vdd +/- 5 (V) Vcc / Vdd 5 (V) Acl, min stable gain (V/V) BW @ Acl (MHz) Slew Rate (V/us) Settling Time (0.1%) (typ) (ns) Io (typ) (mA) THD (Fc=1 MHz) (typ) (dB) Diff Gain www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/psheets/diagrams/subsys/wbsttamp.htm |
Texas Instruments | 29/01/2000 | 8.98 Kb | HTM | wbsttamp.htm |
| Device listing for Drivers - Network Camera Drivers - Network Camera >> Semiconductor Home > Applications > Block Diagrams > Suggested High Speed Operational Amplifiers devices: Device Name Attributes Vcc / Vdd +/- 15 (V) Vcc / Vdd +/- 5 (V) Vcc / Vdd 5 (V) Acl, min stable gain (V/V) BW @ Acl (MHz) Slew Rate (V/us) Settling Time (0.1%) (typ) (ns) Io (typ) (mA) THD (Fc=1 MHz) (typ) (dB) Diff Gain (%) Diff Phase (deg www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/psheets/diagrams/subsys/driv_nc.htm |
Texas Instruments | 29/01/2000 | 10.38 Kb | HTM | driv_nc.htm |
| Device listing for Central Office ADSL Chipset - Line Driver Central Office ADSL Chipset - Line Driver >> Semiconductor Home > Applications > Block Diagrams > Suggested High Speed Operational Amplifiers devices: Device Name Attributes Vcc / Vdd +/- 15 (V) Vcc / Vdd +/- 5 (V) Acl, min stable gain (V/V) BW @ Acl (MHz) Slew Rate (V/us) Settling Time (0.1%) (typ) (ns) Io (typ) (mA) THD (Fc=1 MHz) (typ) (dB) Diff Gain (%) Diff Phase (deg) Vio (max www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/psheets/diagrams/subsys/co_line.htm |
Texas Instruments | 29/01/2000 | 8.85 Kb | HTM | co_line.htm |
| Device listing for Video Tele Conference - Video Encoder Video Tele Conference - Video Encoder >> Semiconductor Home > Applications > Block Diagrams > Suggested High Speed Operational Amplifiers devices: Device Name Attributes Vcc / Vdd +/- 15 (V) Vcc / Vdd +/- 5 (V) Vcc / Vdd 5 (V) Acl, min stable gain (V/V) BW @ Acl (MHz) Slew Rate (V/us) Settling Time (0.1%) (typ) (ns) Io (typ) (mA) THD (Fc=1 MHz) (typ) (dB) Diff Gain (%) Diff Phase www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/psheets/diagrams/subsys/vtcecder.htm |
Texas Instruments | 29/01/2000 | 9.07 Kb | HTM | vtcecder.htm |
| Device listing for Wireless Base Station Transceiver - Receive - Amp Wireless Base Station Transceiver - Receive - Amp >> Semiconductor Home > Applications > Block Diagrams > Suggested High Speed Operational Amplifiers devices: Device Name Attributes Vcc / Vdd +/- 15 (V) Vcc / Vdd +/- 5 (V) Vcc / Vdd 5 (V) Acl, min stable gain (V/V) BW @ Acl (MHz) Slew Rate (V/us) Settling Time (0.1%) (typ) (ns) Io (typ) (mA) THD (Fc=1 MHz) (typ) (dB) Diff Gain www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/psheets/diagrams/subsys/wbstramp.htm |
Texas Instruments | 29/01/2000 | 8.97 Kb | HTM | wbstramp.htm |