500 MILLION PARTS FROM 12000 MANUFACTURERS

DATASHEET SEARCH ENGINE

UT9Q512 Datasheet

Part Manufacturer Description PDF Type
UT9Q512 Aeroflex UTMC SRAM Original
UT9Q512 Aeroflex UTMC 512K words by 8 bits high-performance CMOS asynchronous static RAM. 25ns acces time. 3V and 5V. Original
UT9Q512-20ICA Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish hot solder dipped. Original
UT9Q512-20ICC Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish gold. Original
UT9Q512-20ICX Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish factory option. Original
UT9Q512-20IPC Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish gold. Prototype flow. Original
UT9Q512-20IWA Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish hot solder dipped. Original
UT9Q512-20IWC Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish gold. Original
UT9Q512-20IWX Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish factory option. Original
UT9Q512-20UCA Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish hot solder dipped. Original
UT9Q512-20UCC Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish gold. Original
UT9Q512-20UCX Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish factory option. Original
UT9Q512-20UPC Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish gold. Prototype flow. Original
UT9Q512-20UWA Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish hot solder dipped. Original
UT9Q512-20UWC Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish gold. Original
UT9Q512-20UWX Aeroflex UTMC 512K x 8 SRAM MCM. 20ns access time, 5.0V operation. Lead finish factory option. Original
UT9Q512-25ICA Aeroflex UTMC 512K x 8 SRAM Original
UT9Q512-25ICC Aeroflex UTMC 512K x 8 SRAM Original
UT9Q512-25ICC Aeroflex UTMC IC SRAM CHIP ASYNC SINGLE 5V 4MBIT 512K x 8 25NS 36FLATPACK Original
UT9Q512-25ICX Aeroflex UTMC IC SRAM CHIP ASYNC SINGLE 5V 4MBIT 512K x 8 25NS 36CFPAK Original
Showing first 20 results.

UT9Q512

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: our 5V 4M SRAM Quantified Commercial-Off-The Shelf (QCOTSTM) used in the UT9Q512 and UT9Q512K32 , UT8Q512K32 5962-01533 In Production UT9Q512E 5962-005362 In Development UT9Q512K32E , SRAM) Function UT9Q512K32 UT9Q512K32E IDD2 (SB) @ 0MHz (-40oC & 25oC) 24mA 40mA IDD2 (SB) @ 0MHZ , (16M SRAM) Function UT9Q512K32 16M SRAM -40oC to 125oC UT9Q512K32E -40oC to 105oC Aeroflex , Dimension Length Width Height Note: 1. UT9Q512 .920 + .010 .480 + .005 .124 + .013 UT9Q512E Aeroflex Colorado Springs
Original
UT8Q512 MCM 2 ut9q512e- SRAM
Abstract: Flatpack Socket. This is also the socket used for the UT8Q512 and UT9Q512. Question 14:) The data sheets for the QCOTS SRAMs (i.e. UT7Q512, UT8Q512, and UT9Q512) note two solutions for total dose radiation , 5V UT9Q512 - 264mils x 57mils (25ns) - 36-lead ceramic flatpack Question 3:) Please provide the die , the UT8Q512 and UT9Q512 is 25ns. Question 13:) What is the UT7Q512 32 flatpack test socket number , ~572mils Figure 2. UT8Q512 and UT9Q512 Die Dimensions and Approximate X-Y Coordinates 11/7/01 Page 5 Aeroflex UTMC
Original
UTXQ512 D4 SMD
Abstract: UT8Q512 SMD 5962-99607 n UT9Q512 SMD pending UTXQ512 SRAM Clk. Gen. Pre-Charge Circuit A 0 A , UT9Q512 SRAM · Packaging (25ns product) ­ 36-lead traditional flatpack n 0.48 x .93 inches, 50 mil , ­ Read/Write cycle - 180mA ­ CMOS Stand-By Current (Post-Rad) ­ 20mA UT9Q512 SRAM · Single Aeroflex UTMC
Original
JORDAN SRAM flatpack SRAM TTL
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet January, 2006 FEATURES 20ns , INTRODUCTION The QCOTSTM UT9Q512 Quantified Commercial Off-theShelf product is a high-performance CMOS static , Control CLK Gen. A10 A11 A12 A13 A14 A15 A16 A17 A18 DQ 0 - DQ 7 E W G Figure 1. UT9Q512 SRAM Block , A15 G DQ7 DQ6 VSS VDD DQ5 DQ4 A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs called , 0 0 0 I/O Mode 3-state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 Aeroflex Colorado Springs
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Advanced Data Sheet June 20, 2001 FEATURES q , UT9Q512 Quantified Commercial Off-theShelf product is a high-performance CMOS static RAM organized as 524 , E W G Figure 1. UT9Q512 SRAM Block Diagram DEVICE OPERATION A0 A1 A2 A3 A4 E DQ0 DQ1 VDD VSS , UT9Q512 has three control inputs called Enable 1 (E), Write Enable (W), and Output Enable (G); 19 address , Read Figure 2. UT9Q512 25ns SRAM Pinout (36) (For both shielded and unshielded packages) PIN Aeroflex
Original
Dose 8E-11 36LBBFP
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet November 13, 2002 FEATURES q 20ns , Standard Microcircuit Drawing 5962-00536 - QML T and Q compliant part INTRODUCTION The QCOTSTM UT9Q512 , 13 A 14 A 15 A 16 A 17 A 18 DQ0 - DQ7 E W G Figure 1. UT9Q512 SRAM Block Diagram DEVICE , DQ5 DQ4 A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs called Enable 1 ( E), Write , 3-state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 25ns SRAM Pinout Aeroflex
Original
Abstract: Aeroflex UTMC Application Note UTXQ512-AN-000 _ CONVERTING AEROFLEX UTMC UT9Q512 4M SRAM into an SEU IMMUNE 1M X 1 SRAM This application note describes how to use two UT9Q512 4M SRAMs and one UT54ACS151 logic device to mimic a 1Mx1 SRAM. As shown below, the single bit is written into three locations of the same. When the data is read out, it is used in a voting system to select either a 0 or a 1 output. This voting method virtually makes it immune to Aeroflex UTMC
Original
UT54ACS244 UT54ACS245 UT54ACS365 UT54ACS373 UT54ACS374 UT54ACS541
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet February, 2003 FEATURES q 20ns , - DQ7 0 The QCOTSTM UT9Q512 Quantified Commercial Off-theShelf product is a high-performance , . A 3 A 4 A 5 A 6 A7 A 8 INTRODUCTION E W G Figure 1. UT9Q512 SRAM Block Diagram , 26 25 24 23 22 21 20 19 The UT9Q512 has three control inputs called Enable 1 ( E), Write , ) E X1 Figure 2. UT9Q512 25ns SRAM Pinout (36) W Ground READ CYCLE A combination of W Aeroflex
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet November, 2005 INTRODUCTION , patented shielded package The QCOTSTM UT9Q512 Quantified Commercial Off-theShelf product is a , A14 A15 A16 A17 A3 A4 A5 A6 A7 A8 Row Select A0 A1 A2 E W G Figure 1. UT9Q512 , 31 30 29 28 27 26 25 24 23 22 21 20 19 The UT9Q512 has three control inputs called , X1 Figure 2. UT9Q512 25ns SRAM Pinout (36) W 0 A9 G Ground READ CYCLE A Aeroflex Colorado Springs
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet February, 2003 INTRODUCTION , patented shielded package The QCOTSTM UT9Q512 Quantified Commercial Off-theShelf product is a , A14 A15 A16 A17 A3 A4 A5 A6 A7 A8 Row Select A0 A1 A2 E W G Figure 1. UT9Q512 , 32 31 30 29 28 27 26 25 24 23 22 21 20 19 The UT9Q512 has three control inputs called , packages) E X1 Figure 2. UT9Q512 25ns SRAM Pinout (36) W Ground READ CYCLE A combination Aeroflex UTMC
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet January 21, 2002 FEATURES q , QCOTSTM UT9Q512 Quantified Commercial Off-theShelf product is a high-performance CMOS static RAM , A7 A 8 INTRODUCTION E W G Figure 1. UT9Q512 SRAM Block Diagram DEVICE OPERATION A0 , 21 20 19 The UT9Q512 has three control inputs called Enable 1 ( E), Write Enable ( W), and , . UT9Q512 25ns SRAM Pinout (36) W Ground READ CYCLE A combination of W greater than V IH (min) and Aeroflex
Original
1E-10
Abstract: Standard Products UT9Q512 512K x 8 SRAM Advanced Data Sheet February 7, 2000 FEATURES q 25ns , compliant part Clk. Gen. A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 INTRODUCTION The UT9Q512 is a high-performance , A15 A16 A17 A18 DQ 0 - DQ 7 E W G Figure 1. UT9Q512 SRAM Block Diagram DEVICE OPERATION A0 , A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs called Enable 1 (E1), Write Enable (W , -state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 25ns SRAM Pinout 1 0 PIN UTMC Microelectronic Systems
Original
MIL-PRF-38535
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet March, 2002 FEATURES q 25ns , DQ7 The QCOTSTM UT9Q512 Quantified Commercial Off-theShelf product is a high-performance CMOS , . A 3 A 4 A 5 A 6 A7 A 8 INTRODUCTION E W G Figure 1. UT9Q512 SRAM Block Diagram , 26 25 24 23 22 21 20 19 The UT9Q512 has three control inputs called Enable 1 ( E), Write , ) E X1 Figure 2. UT9Q512 25ns SRAM Pinout (36) W Ground READ CYCLE A combination of W Aeroflex
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet August 19, 2004 FEATURES 20ns , ) Standard Microcircuit Drawing 5962-00536 - QML T and Q compliant part INTRODUCTION The QCOTSTM UT9Q512 , A15 A16 A17 A18 DQ 0 - DQ 7 E W G Figure 1. UT9Q512 SRAM Block Diagram 1 DEVICE OPERATION , A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs called Enable 1 (E), Write Enable (W , -state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 25ns SRAM Pinout (36) (For Aeroflex Colorado Springs
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Preliminary Data Sheet August 1, 2001 , INTRODUCTION The QCOTSTM UT9Q512 Quantified Commercial Off-theShelf product is a high-performance CMOS static , A11 A 12 A 13 A 14 A 15 A 16 A 17 A 18 DQ0 - DQ7 E W G Figure 1. UT9Q512 SRAM Block Diagram , VS S VD D DQ5 DQ4 A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs called Enable 1 ( E , Mode 3-state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 25ns SRAM Aeroflex
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet August, 2002 FEATURES q 25ns , Standard Microcircuit Drawing 5962-00536 - QML T and Q compliant part INTRODUCTION The QCOTSTM UT9Q512 , 13 A 14 A 15 A 16 A 17 A 18 DQ0 - DQ7 E W G Figure 1. UT9Q512 SRAM Block Diagram DEVICE , DQ5 DQ4 A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs called Enable 1 ( E), Write , 3-state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 25ns SRAM Pinout Aeroflex
Original
Abstract: NOTE: This product has been replaced with UT9Q512E. Please use the UT9Q512E for NEW designs. See , Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet August 19, 2004 FEATURES 20ns maximum (5 , Microcircuit Drawing 5962-00536 - QML T and Q compliant part INTRODUCTION The QCOTSTM UT9Q512 Quantified , DQ 0 - DQ 7 E W G Figure 1. UT9Q512 SRAM Block Diagram 2 DEVICE OPERATION A0 A1 A2 A3 A4 E , A10 NC The UT9Q512 has three control inputs called Enable 1 (E), Write Enable (W), and Output Aeroflex Colorado Springs
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet November, 2004 FEATURES 20ns , ) Standard Microcircuit Drawing 5962-00536 - QML T and Q compliant part INTRODUCTION The QCOTSTM UT9Q512 , A15 A16 A17 A18 DQ 0 - DQ 7 E W G Figure 1. UT9Q512 SRAM Block Diagram 1 DEVICE OPERATION , A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs called Enable 1 (E), Write Enable (W , -state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 25ns SRAM Pinout (36) (For Aeroflex Colorado Springs
Original
50krads
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Preliminary Data Sheet November 21, 2001 , A 1 A 2 A 3 A 4 A 5 A 6 A7 A 8 A9 INTRODUCTION The QCOTSTM UT9Q512 Quantified Commercial , Control CLK Gen. A 10 A11 A 12 A 13 A 14 A 15 A 16 A 17 A 18 DQ0 - DQ7 E W G Figure 1. UT9Q512 SRAM , A17 A16 A15 G DQ7 DQ6 VS S VD D DQ5 DQ4 A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs , 0 0 0 I/O Mode 3-state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 Aeroflex
Original
Abstract: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Preliminary Data Sheet December 17, 2001 , Standard Microcircuit Drawing 5962-00536 - QML T and Q compliant part INTRODUCTION The QCOTSTM UT9Q512 , 13 A 14 A 15 A 16 A 17 A 18 DQ0 - DQ7 E W G Figure 1. UT9Q512 SRAM Block Diagram DEVICE , DQ5 DQ4 A14 A13 A12 A11 A10 NC The UT9Q512 has three control inputs called Enable 1 ( E), Write , 3-state Data in 3-state Data out Mode Standby Write Read2 Read Figure 2. UT9Q512 25ns SRAM Pinout Aeroflex
Original
Abstract: Standard Products UT9Q512 512K x 8 SRAM Advanced Data Sheet November 6, 2000 FEATURES q , INTRODUCTION The UT9Q512 is a high-performance CMOS static RAM organized as 524,288 words by 8 bits. Easy , . E W G Figure 1. UT9Q512 SRAM Block Diagram DEVICE OPERATION A0 1 2 3 4 5 6 7 8 9 , A8 A9 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 The UT9Q512 has , and unshielded packages) E X1 Figure 2. UT9Q512 25ns SRAM Pinout (36) W Ground READ Aeroflex
Original
9Q512
Showing first 20 results.