USS-344 MIRQ121 IRQ12 A20MN CLK48STOP XLO/CLK48 MIRQ12I CLK48 30L-15P-BA

June 2001 USS-344 QuadraBusTM Four-Host PCI-to-USB OpenHCI Host Controller Features s 32-bit, 33 MHz PCI interface compliant with

Product Brief, Rev. 2 June 2001 USS-344 USS-344 QuadraBusTM Four-Host PCI-to-USB OpenHCI Host Controller Features s 32-bit, 33 MHz PCI interface compliant with PCI Local Bus Specification Revision 2.2 s Four downstream USB ports s Each USB port dedicated to providing full USB bandwidth to the attached device s Full compliance with Universal Serial Bus Specification Revision 1.1 s OpenHCI Open Host Controller Interface Specification for USB Release 1.0a compatible s Fully compatible with Microsoft Windows ® standard OpenHCI drivers s Fully compatible with Mac ® OS s Integrated dual-speed USB transceivers s 3 V or 5 V switchable PCI signaling s Low-power mode and wake-up compatible with PCI Power Management Interface Specification Revision 1.1 s Supports up to 127 devices per port s Supports peripheral hot swap and wake-up s Support for legacy keyboard and mouse s 128-pin TQFP package s Full 12 Mbits/s bandwidth per port s Evaluation kit: - PCI card - Data sheets s 0.25 µm technology Applications s Seamless integration with 3 V or 5 V PCI-based computer products s Supports all USB compliant devices and hubs s Simultaneous operation of multiple high-performance devices Description The Agere Systems Inc. USS-344 USS-344 QuadraBus provides a single-chip four-host PCI-to-Universal Serial Bus (USB) solution. The USS-344 USS-344 interfaces directly to any 32-bit, 33 MHz PCI bus and is ideal for either onboard applications or add-in card applications. It can easily be configured to communicate in either a 3 V PCI environment or 5 V PCI environment simply by selecting the appropriate communications voltage level on the VIO input pin. The USS-344 USS-344 provides four downstream USB ports for connectivity with any USB compliant device or hub. Fullspeed or low-speed peripherals are supported along with all of the USB transfer types: control, interrupt, bulk, or isochronous. The USS-344 USS-344's OpenHCI compliance offers significant USB performance benefits and reduced CPU overhead compared to other USB UHCI host controllers. In addition, the USS-344 USS-344 offers a significant performance advantage over all other USB host controllers (both UHCI and OHCI) by providing full USB bandwidth to each port rather than sharing the USB bandwidth over all ports. This results in an increase in the number of devices which can feasibly be connected to a computer system as well as ensuring high-bandwidth devices, such as video cameras and audio devices, are always provided with the high bandwidth they need while other USB devices are in use. The USS-344 USS-344 is a multifunction PCI device with one single-port USB host controller per PCI function. There are four PCI functions in the USS-344 USS-344 for a total of four single-port USB host controllers. Each single-port host controller provides the full USB bandwidth (12 Mbits/s) for devices connected downstream of its port. The USS-344 USS-344 is fully compatible with the Microsoft Windows standard OpenHCI drivers. The USS-344 USS-344 pinout is compatible with the future release of the Agere USB 2.0 host controller. The USS-344 USS-344 is a 3.3 V device fabricated in 0.25 µm technology. Integrated dual-speed USB transceivers enable a single-chip PCI-to-USB solution. The USS-344 USS-344 provides full support for legacy PC peripherals as defined in the OpenHCI Open Host Controller Interface Specification for USB Release 1.0a. USS-344 USS-344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller Product Brief, Rev. 2 June 2001 Description (continued) USS-344 USS-344 PCI-TO-USB OpenHCI HOST CONTROLLER ADDRESS DATA HCI SLAVE BLOCK USB STATE CONTROL CONTROL FIFO OHCI ROOT HUB PORT 1 HSIE S/M HCI MASTER BLOCK CONTROL MIRQ121 MIRQ121 KIRQ1I A20I IRQ1 IRQ12 IRQ12 A20MN A20MN SMIN TX LIST PROCESSOR BLOCK DATA ADDRESS/ DATA ROOT HUB AND HOST SIE RX DPLL LEGACY SUPPORT POWER MNGMNT LOGIC CLK48STOP CLK48STOP PMEN POWER MNGMNT PCI BUS PCI CORE 0 AD[31:0] CBE[3:0] REQN GNTN IDSEL FRAMEN IRDYN TRDYN DEVSELN STOPN PERRN SERRN PAR INTA INTB INTC INTD POWER MNGMNT PCI ARBITER PCI CORE 1 POWER MNGMNT PCI CORE 2 POWER MNGMNT PCI CORE 3 LEGACY LOGIC USB HOST CONTROLLER CORE 0 LEGACY LOGIC USB HOST CONTROLLER CORE 1 LEGACY LOGIC USB HOST CONTROLLER CORE 2 LEGACY LOGIC USB HOST CONTROLLER CORE 3 USB USB USB USB 5-7828.r1 Figure 1. USS-344 USS-344 Interconnection Diagram 2 Agere Systems Inc. USS-344 USS-344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller Product Brief, Rev. 2 June 2001 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 AD25 AD26 AD27 AD28 VDD VSS AD29 AD30 AD31 PMEN VDD VSS REQN GNTN VSS CLK VDD RSTN INTDN INTCN INTBN VSS VDD INTAN PWRFLT3N PRTPWR3 Pin Information 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 USS-344 USS-344 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 PWRFLT2N PRTPWR2 VSST VDDT DMNS3 DPLS3 DMNS2 DPLS2 VSST VDDT DMNS1 DPLS1 DMNS0 DPLS0 VSST VDDT RREF VDDA XHI XLO/CLK48 XLO/CLK48 VSSA CLK48STOP CLK48STOP VDD PWRFLT1N PRTPWR1 PWRFLT0N PRTPWR0 SMIN VSS VDD IRQ12 IRQ12 IRQ1 A20MN A20MN A20I KIRQ1I MIRQ12I MIRQ12I VSS VDD VDD VSS AD10 AD9 AD8 C/BEN0 VSS VDD AD7 AD6 AD5 AD4 VSS VDD AD3 AD2 AD1 AD0 VSS VIO VDD VSS TEST0 TEST1 TEST2 TEST3 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 VDD VSS AD24 C/BEN3 IDSEL AD23 AD22 VSS VDD AD21 AD20 AD19 AD18 VSS VDD AD17 AD16 C/BEN2 FRAMEN VDD VSS IRDYN TRDYN DEVSELN STOPN PERRN VSS VDD SERRN PAR C/BEN1 AD15 VDD VSS AD14 AD13 AD12 AD11 5-7830.r7 Figure 2. USS-344 USS-344 Pin Diagram Agere Systems Inc. 3 USS-344 USS-344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller Product Brief, Rev. 2 June 2001 Pin Information (continued) Table 1. Numeric Pin Cross Reference Pin Symbol* Pin Symbol* Pin Symbol* Pin Symbol* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 VDD VSS AD24 C/BEN3 IDSEL AD23 AD22 VSS VDD AD21 AD20 AD19 AD18 VSS VDD AD17 AD16 C/BEN2 FRAMEN VDD VSS IRDYN TRDYN DEVSELN STOPN PERRN VSS VDD SERRN PAR C/BEN1 AD15 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 VDD VSS AD14 AD13 AD12 AD11 VDD VSS AD10 AD9 AD8 C/BEN0 VSS VDD AD7 AD6 AD5 AD4 VSS VDD AD3 AD2 AD1 AD0 VSS VIO VDD VSS TEST0 TEST1 TEST2 TEST3 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 VDD VSS MIRQ12I MIRQ12I KIRQ1I A20I A20MN A20MN IRQ1 IRQ12 IRQ12 VDD VSS SMIN PRTPWR0 PWRFLT0N PRTPWR1 PWRFLT1N VDD CLK48STOP CLK48STOP VSSA XLO/CLK48 XLO/CLK48 XHI VDDA RREF VDDT VSST DPLS0 DMNS0 DPLS1 DMNS1 VDDT VSST DPLS2 DMNS2 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 DPLS3 DMNS3 VDDT VSST PRTPWR2 PWRFLT2N PRTPWR3 PWRFLT3N INTAN VDD VSS INTBN INTCN INTDN RSTN VDD CLK VSS GNTN REQN VSS VDD PMEN AD31 AD30 AD29 VSS VDD AD28 AD27 AD26 AD25 * Pins identified as NC are unused and should be left unconnected. Active-low signals within this document are indicated by an N following the symbol names. 4 Agere Systems Inc. USS-344 USS-344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller Product Brief, Rev. 2 June 2001 Pin Information (continued) Table 2. PCI Signals Pin Symbol* Type Description 111 RSTN Input PCI Reset (Active-Low). 113 CLK Input PCI System Clock (33 MHz). 116 REQN Output/3-State PCI Request (Active-Low). 115 GNTN Input PCI Grant (Active-Low). 120, 121, 122, 125, 126, 127, 128, AD[31:0] Bidir PCI Address and Data. 3, 6, 7, 10, 11, 12, 13, 16, 17, 32, 35, 36, 37, 38, 41, 42, 43, 47, 48, 49, 50, 53, 54, 55, 56 30 PAR Bidir PCI Parity. 4, 18, 31, 44 C/BEN[3:0] Bidir PCI Bus Command and Byte Enables. 19 FRAMEN Bidir PCI Cycle Frame (Active-Low). 22 IRDYN Bidir PCI Initiator Ready (Active-Low). 23 TRDYN Bidir PCI Target Ready (Active-Low). 25 STOPN Bidir PCI Stop (Active-Low). 5 IDSEL Input PCI Initialization Device Select. 24 DEVSELN Bidir PCI Device Select (Active-Low). 26 PERRN Bidir PCI Parity Error (Active-Low). 29 SERRN Output/Open Drain PCI System Error (Active-Low). 105 INTAN Output/Open Drain PCI Interrupt-A (Active-Low). 108 INTBN Output/Open Drain PCI Interrupt-B (Active-Low). 109 INTCN Output/Open Drain PCI Interrupt-C (Active-Low). 110 INTDN Output/Open Drain PCI Interrupt-D (Active-Low). 119 PMEN Output/Open Drain Power Management Event (Active-Low). Power 3.3 V VDD. 1, 9, 15, 20, 28, 33, 39, 46, 52, 59, VDD 65, 73, 80, 106, 112, 118, 124 2, 8, 14, 21, 27, 34, 40, 45, 51, 57, VSS Power VSS. 60, 66, 74, 107, 114, 117, 123 58 VIO Power PCI Environment Selection (3.3 V or 5 V). * An N following the symbol names indicates active-low for the USS-344 USS-344. Table 3. USB Port Signals Pin Symbol* Type 89 90 91 93 95 96 97 98 76 78 101 103 DPLS0 DMNS0 DPLS1 DMNS1 DPLS2 DMNS2 DPLS3 DMNS3 PRTPWR0 PRTPWR1 PRTPWR2 PRTPWR3 Bidir Bidir Bidir Bidir Bidir Bidir Bidir Bidir Bidir Bidir Bidir Bidir Description USB USB USB USB USB USB USB USB USB USB USB USB Port Port Port Port Port Port Port Port Port Port Port Port 0 DPLUS. 0 DMINUS. 1 DPLUS. 1 DMINUS. 2 DPLUS. 2 DMINUS. 3 DPLUS. 3 DMINUS. 0 Power Enable (Active-Low). 1 Power Enable (Active-Low). 2 Power Enable (Active-Low). 3 Power Enable (Active-Low). * An N following the symbol names indicates active-low for the USS-344 USS-344. Agere Systems Inc. 5 USS-344 USS-344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller Product Brief, Rev. 2 June 2001 Pin Information (continued) Table 3. USB Port Signals (continued) Pin Symbol* Type 77 79 102 104 75 81 PWRFLT0N PWRFLT1N PWRFLT2N PWRFLT3N CLK48 CLK48 CLK48STOP CLK48STOP Input Input Input Input Input Output 87, 93, 99 88, 94, 100 86 VDDT VSST RREF Power Power Input 85 VDDA Power 82 VSSA Power 84 XHI Power 83 XLO/CLK48 XLO/CLK48 Power/Input Description USB Port 0 Overcurrent (Active-Low). USB Port 1 Overcurrent (Active-Low). USB Port 2 Overcurrent (Active-Low). USB Port 3 Overcurrent (Active-Low). USB Clock. USB Clock Stop (Optional). Used to stop external 48 MHz clock in PCI power management state D3. USB Transceiver VDD (3.3 V). USB Transceiver VSS. USB 2.0 1 k Precision Resistor Connection. Hi-Z if implementation does not expect upgrade to USB 2.0. USB 2.0 Analog Power. Connect to VDD if implementation does not expect upgrade to USB 2.0. USB 2.0 Analog Power. Connect to VSS if implementation does not expect upgrade to USB 2.0. USB 2.0 Crystal Oscillator XHI Connection. Hi-Z if implementation does not expect upgrade to USB 2.0. USB 2.0 Crystal Oscillator XHI Connection/USB 1.X CLK 48 MHz Input. * An N following the symbol names indicates active-low for the USS-344 USS-344. Table 4. Legacy Support Signals Pin Symbol* Type 68 KIRQ1I Input 67 MIRQ12I MIRQ12I 69 70 71 72 75 A20I A20MN A20MN IRQ1 IRQ12 IRQ12 SMIN Description Legacy Keyboard Controller Interrupt (IRQ1 Input from Keyboard Controller). Input Legacy Mouse Controller Interrupt (IRQ12 IRQ12 Input from Mouse Controller). Input Legacy Gate A20 Input. Output Legacy Gate A20 Output (to Memory Controller). Output/Open Drain System Keyboard Interrupt (Active-High). Output/Open Drain System Mouse Interrupt (Active-High). Output/Open Drain System Management Interrupt (Active-Low). * An N following the symbol names indicates active-low for the USS-344 USS-344. Table 5. Chip Test Signals Pin Symbol* Type 61 62 63 64 TEST0 TEST1 TEST2 TEST3 Input Input Input Input Description Chip Test Chip Test Chip Test Chip Test Signal. Signal. Signal. Signal. * An N following the symbol names indicates active-low for the USS-344 USS-344. 6 Agere Systems Inc. USS-344 USS-344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller Product Brief, Rev. 2 June 2001 System Configuration Figure 3 depicts a standard system configuration using the USS-344 USS-344. The USS-344 USS-344 can interface directly with any 3 Vdc or 5 Vdc, 33 MHz, 32-bit PCI bus with no additional components required. The USS-344 USS-344 is a port powerswitched USB host controller providing the maximum control over USB device power consumption. This feature requires one 5 Vdc-to-5 Vdc power switching regulator per USB port to allow the USS-344 USS-344 to turn power on/off to each USB port under control of the operating system. The USS-344 USS-344 contains four USB transceivers for direct connection of the USB DPLS and DMNS signals to the USB connector. Also included in the USS-344 USS-344 is the legacy PS/2 mouse and keyboard interface as defined in the OpenHCI Open Host Controller Interface Specification for USB Release 1.0a. This legacy interface along with standard USB BIOS drivers allows USB mice and keyboards to operate in MS-DOS ® mode. Legacy support need not be implemented by the system designer if not desired. 5 Vdc 3.3 Vdc CLK48 CLK48 48 MHz OSC PRTPWR0 PWRFLT0N CLK48STOP CLK48STOP 5 Vdc-5 Vdc SWITCHED REGULATOR VBUS = 5 Vdc DPLS0/DMNS0 PRTPWR1 PWRFLT1N 5 Vdc-5 Vdc SWITCHED REGULATOR PCI BUS PCI VIO CPU VBUS = 5 Vdc DPLS1/DMNS1 PCI SIGNALS AGERE USS-344 USS-344 PCI-TO-USB OHCI HOST CONTROLLER 32-bit, 33 MHz PRTPWR2 PWRFLT2N 5 Vdc-5 Vdc SWITCHED REGULATOR USB CONNECTOR USB CONNECTOR VBUS = 5 Vdc DPLS2/DMNS2 USB CONNECTOR PMEN PRTPWR3 PWRFLT3N 5 Vdc-5 Vdc SWITCHED REGULATOR VBUS = 5 Vdc DPLS3/DMNS3 USB CONNECTOR SMI A20MN A20MN 8259 INTERRUPT CONTROLLER IRQ1 IRQ12 IRQ12 KIRQ1I MIRQ12I MIRQ12I A2OI 8042 LEGACY DEVICE CONTROLLER PS/2 MOUSE PS/2 KEYBOARD OPTIONAL LEGACY SUPPORT 5-7829.r3 Figure 3. Standard System Configuration Agere Systems Inc. 7 USS-344 USS-344 QuadraBus Four-Host PCI-to-USB OpenHCI Host Controller Product Brief, Rev. 2 June 2001 Outline Diagram 128-Pin TQFP Dimensions are in inches. 16.00 ± 0.20 14.00 ± 0.20 PIN #1 IDENTIFIER ZONE 128 1.00 REF 103 1 0.25 102 GAGE PLANE SEATING PLANE 0.45/0.75 DETAIL A 20.00 ± 0.20 22.00 ± 0.20 0.106/0.200 0.19/0.27 0.08 65 38 39 DETAIL B 64 DETAIL A DETAIL B M 1.40 ± 0.05 1.60 MAX SEATING PLANE 0.50 TYP 0.08 0.05/0.15 5-4427r.2 The USB-IF logo is a trademark of the Universal Serial Bus Implementers Forum, Inc. Microsoft and Windows are registered trademarks of Microsoft Corporation. Mac is a registered trademark of Apple Computer, Inc. MS-DOS is a registered trademark of Microsoft Corporation. For additional information, contact your Agere Systems Account Manager or the following: INTERNET: http://www.agere.com E-MAIL: docmaster@agere.com N. AMERICA: Agere Systems Inc., 555 Union Boulevard, Room 30L-15P-BA 30L-15P-BA, Allentown, PA 18109-3286 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA: Agere Systems Hong Kong Ltd., Suites 3201 & 3210-12, 32/F, Tower 2, The Gateway, Harbour City, Kowloon Tel. (852) 3129-2000, FAX (852) 3129-2020 CHINA: (86) 21-5047-1212 (Shanghai), (86) 10-6522-5566 (Beijing), (86) 755-695-7224 (Shenzhen) JAPAN: (81) 3-5421-1600 (Tokyo), KOREA: (82) 2-767-1850 (Seoul), SINGAPORE: (65) 6778-8833, TAIWAN: (886) 2-2725-5858 (Taipei) EUROPE: Tel. (44) 7000 624624, FAX (44) 1344 488 045 Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. QuadraBus is a trademark of Agere Systems Inc. Copyright © 2002 Agere Systems Inc. All Rights Reserved June 2001 PB01-114CMPR-2 PB01-114CMPR-2 (Replaces PB01-114CMPR-1 PB01-114CMPR-1)