UCC27423 UCC27424 UCC27425 SLUS545B UCC27423/4/5 UDG-01063 UCC27423D

SLUS545B - NOVEMBER 2002 - REVISED NOVEMBER 2004 DUAL 4A HIGH SPEED LOW-SIDE MOSFET DRIVERS WITH ENABLE FEATURES D

UCC27423 UCC27423, UCC27424 UCC27424, UCC27425 UCC27425 SLUS545B SLUS545B - NOVEMBER 2002 - REVISED NOVEMBER 2004 DUAL 4A HIGH SPEED LOW-SIDE MOSFET DRIVERS WITH ENABLE FEATURES D Industry-Standard Pin-Out D Enable Functions for Each Driver D High Current Drive Capability of ±4 A D Unique BiPolar and CMOS True Drive Output D D D D D D D DESCRIPTION The UCC27423/4/5 UCC27423/4/5 family of high-speed dual MOSFET drivers can deliver large peak currents into capacitive loads.Three standard logic options are offered dual-inverting, dual-noninverting and one-inverting and one-noninverting driver. The thermally enhanced 8-pin PowerPADTM MSOP package (DGN) drastically lowers the thermal resistance to improve long-term reliability. It is also offered in the standard SOIC-8 (D) or PDIP-8 (P) packages. Stage Provides High Current at MOSFET Miller Thresholds TTL/CMOS Compatible Inputs Independent of Supply Voltage 20-ns Typical Rise and 15-ns Typical Fall Times with 1.8-nF Load Typical Propagation Delay Times of 25 ns with Input Falling and 35 ns with Input Rising 4-V to 15-V Supply Voltage Dual Outputs Can Be Paralleled for Higher Drive Current Available in Thermally Enhanced MSOP PowerPADTM Package with 4.7°C/W jc Rated From 40°C to 105°C APPLICATIONS D Switch Mode Power Supplies D DC/DC Converters D Motor Controllers D Line Drivers D Class D Switching Amplifiers Using a design that inherently minimizes shoot-through current, these drivers deliver 4-A of current where it is needed most at the Miller plateau region during the MOSFET switching transition. A unique BiPolar and MOSFET hybrid output stage in parallel also allows efficient current sourcing and sinking at low supply voltages. The UCC27423/4/5 UCC27423/4/5 provides enable (ENBL) functions to have better control of the operation of the driver applications. ENBA and ENBB are implemented on pins 1 and 8 which were previously left unused in the industry standard pin-out. They are internally pulled up to Vdd for active high logic and can be left open for standard operation. BLOCK DIAGRAM 8 ENBB 7 OUTA 6 VDD 5 OUTB ENBA 1 INVERTING INA 2 VDD NON-INVERTING INVERTING GND 3 INB 4 NON-INVERTING UDG-01063 UDG-01063 PowerPADt is a trademark of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2003, Texas Instruments Incorporated www.ti.com 1 UCC27423 UCC27423, UCC27424 UCC27424, UCC27425 UCC27425 SLUS545B SLUS545B - NOVEMBER 2002 - REVISED NOVEMBER 2004 ORDERING INFORMATION OUTPUT CONFIGURATION PACKAGED DEVICES TEMPERATURE RANGE TA = TJ SOIC-8 (D) MSOP-8 PowerPAD (DGN)} PDIP-8 (P) Dual inverting -40°C to +105°C UCC27423D UCC27423D UCC27423DGN UCC27423DGN UCC27423P UCC27423P Dual nonInverting -40°C to +105°C UCC27424D UCC27424D UCC27424DGN UCC27424DGN UCC27424P UCC27424P One inverting, one noninverting -40°C to +105°C UCC27425D UCC27425D UCC27425DGN UCC27425DGN UCC27425P UCC27425P D (SOIC-8) and DGN (PowerPAD-MSOP) packages are available taped and reeled. Add R suffix to device type (e.g. UCC27423DR UCC27423DR, UCC27424DGNR UCC27424DGNR) to order quantities of 2,500 devices per reel for D or 1,000 devices per reel for DGN package. The PowerPAD is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate which is the ground of the device. D, DGN, OR P PACKAGE (TOP VIEW) D, DGN, OR P PACKAGE (TOP VIEW) D, DGN, OR P PACKAGE (TOP VIEW) UCC27425 UCC27425 UCC27424 UCC27424 UCC27423 UCC27423 ENBA 1 8 ENBB ENBA 1 8 ENBB ENBA 1 8 ENBB INA 2 7 OUTA INA 2 7 OUTA INA 2 7 OUTA GND 3 6 VDD INB 4 GND 3 5 OUTB 6 VDD INB 4 (DUAL INVERTING) GND 3 5 OUTB 6 VDD INB 4 (DUAL NON-INVERTING) 5 OUTB (ONE INVERTING AND ONE NON-INVERTING) power dissipation rating table PACKAGE SUFFIX jc (°C/W) ja (°C/W) Power Rating (mW) TA = 70°C See Note 1 Derating Factor Above 70°C (mW/5C) See Note 1 SOIC-8 D 42 84 160} 344-655 See Note 2 6.25 - 11.9 See Note 2 PDIP-8 P 49 110 500 9 MSOP PowerPAD-8 See Note 3 DGN 4.7 50 - 59} 1370 17.1 Notes: 1. 125°C operating junction temperature is used for power rating calculations 2. The range of values indicates the effect of pc-board. These values are intended to give the system designer an indication of the best and worst case conditions. In general, the system designer should attempt to use larger traces on the pc-board where possible in order to spread the heat away form the device more effectively. For information on the PowerPADt package, refer to Technical Brief, PowerPad Thermally Enhanced Package, Texas Instrument s Literature No. SLMA002 SLMA002 and Application Brief, PowerPad Made Easy, Texas Instruments Literature No. SLMA004 SLMA004. 3. The PowerPAD is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate which is the ground of the device. Table 1. Input/Output Table INPUTS (VIN_L, VIN_H) ENBA INA H H H H H UCC27423 UCC27423 UCC27424 UCC27424 INB OUTA OUTB OUTA L L H H L H H L H H L L H H H H L 2 ENBB L X X UCC27425 UCC27425 OUTB OUTA L L H L L H H H H H L L L L L H H L H L L L L L L www.ti.com OUTB UCC27423 UCC27423, UCC27424 UCC27424, UCC27425 UCC27425 SLUS545B SLUS545B - NOVEMBER 2002 - REVISED NOVEMBER 2004 absolute maximum ratings over operating free-air temperature (unless otherwise noted)} Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 16 V Output current (OUTA, OUTB) DC, IOUT_DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 A Pulsed, (0.5 µs), IOUT_PULSED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 A Input voltage (INA, INB), VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5 V to 6 V or VDD+0.3 (whichever is larger) Enable voltage (ENBA, ENBB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 6 V or VDD+0.3 (whichever is larger) Power dissipation at TA = 25°C (DGN package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 W (D package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW (P package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 mW Junction operating temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to 150°C Storage temperature, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C Lead temperature (soldering, 10 sec.), . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. ELECTRICAL CHARACTERISTICS VDD = 4.5 V to 15 V, TA = -40°C to 105°C,TA = TJ, (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNITS Input (INA, INB) VIN_H, logic 1 input threshold 2 V VIN_L, logic 0 input threshold Input current 1 V µA 330 -10 10 450 mV 22 0 V