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DOLPHIN-WUART-REF Texas Instruments Frequency Hopping Spread Spectrum (FHSS) Wireless UART Chipset Reference Design visit Texas Instruments
HA2-5002-5 Intersil Corporation BUFFER AMPLIFIER, MBCY8 visit Intersil
HA4600CH96 Intersil Corporation BUFFER AMPLIFIER, PDSO6 visit Intersil
HFA1110IB Intersil Corporation BUFFER AMPLIFIER, PDSO8 visit Intersil
HFA1113IB Intersil Corporation BUFFER AMPLIFIER, PDSO8 visit Intersil
HFA1412IP Intersil Corporation QUAD BUFFER AMPLIFIER, PDIP14 visit Intersil

UART TTL buffer

Catalog Datasheet MFG & Type PDF Document Tags

FT232R

Abstract: FT232RQ TM Future Technology Devices International Ltd. TTL-232R USB to TTL Serial Converter Cable The TTL-232R is a USB to TTL serial converter cable incorporating FTDI's FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI's range of USB UART interface Integrated Circuit Devices. It is designed to allow for a fast, simple way to connect devices with a TTL level serial , Peripherals to USB Interface Microcontroller UART or I/O to USB Interface FPGA / PLD to USB TTL-232R USB
FTDI
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TTL-232R FT232R ft232r MAX232 TTL232R-3V3 serial port to ttl using max232 ft232r connection to device UART TTL buffer

max232 rts cts

Abstract: TTL-232R-3V3 Peripherals to USB Interface Microcontroller UART or I/O to USB Interface FPGA / PLD to USB TTL , UART interface I/O pins on the TTL-232R-3V3 (RXD, TXD, RTS#, and CTS#) are configured to use the , specifications. The TTL-232R-3V3 has passed FCC and CE testing. Programmable Receive Buffer Timeout - The , TM Future Technology Devices International Ltd. TTL-232R-3V3 USB to TTL Serial Converter Cable The TTL-232R-3V3 is a USB to TTL serial converter cable incorporating FTDI's FT232RQ USB - Serial
FTDI
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TTL-232R-3V3 max232 rts cts cmos 3v3 FT232R USB UART ttl drive MAX232 for level converter

cc2530fx

Abstract: smartrf04eb de-asserted (TTL high). DMA/CPU Allocated source buffer (typically received on RF) UxUCR UART Port , SmartRF® SoC RF RTS RX RS232 TTL TX UART UART protocol USART Evaluation Board Central , (assuming TTL voltage level) which supports the UART protocol, meaning half/full-duplex asynchronous serial , will initiate a single byte DMA transfer from the allocated UART TX source buffer to the UxDBUF , register to the allocated UART RX destination buffer. SWRA222B Page 4 of 28 Design Note DN112
Texas Instruments
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cc2530fx smartrf04eb SmartRF04EB 1.9 CC111xFx CC2430 RS232 SmartRF04EB CC2530 CC111 CC243 CC251 CC253 CC1110F CC1111F

SC11091CV

Abstract: 8096 instruction set 67 57 33 Address lines for UART register select, input, TTL. Chip select, active low, input, TTL. 8-bit data port, input-output, TTL. Data in strobe (PC reads from UART registers), active low, input, TTL. Data out strobe (PC writes into UART registers), active low, input, TTL. Interrupt, output, CMOS , Internal ROM Power Down m ode indicator on PD pin Built-in UART with 80ns data access time in parallel , (UART DATA BUS) BAUD RATE GENERATOR TRANS MITTER UART INTERRUPT CONTROL RECEIVER C = > IO 0 - K >3
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SC11091 SC11054 SC11091CV 8096 instruction set SC11091CQ intel 8096 instruction set SC11091/SC11095 68-PIN SCU011 SC11024 SC11044

T-CON BOARD samsung

Abstract: E804H Trigger Level Input Buffer TTL Level Input Buffer TTL Schmitt Trigger Level Input Buffer with Pull-up , Buffer TTL Schmitt Trigger Level Input with Pull-up Resistor and Tri-State Output with Medium SlewRate , TTL schimitt trigger z > o o > Input bufer Input bufer Input buffer with pull up o1 ,o2,o3,io1 ,io2 , two-channel UART, twochannel DMA, system manager (chip select logic, DRAM controller), three-channel timer , Two-Channel UART - Three-Channel Timer - Interrupt Controller - Tone Generator - I/O ports - Watch
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T-CON BOARD samsung E804H T-CON BOARD samsung pin 5808H ARM SRAM compiler 8004H KS32C6200 IEEE1284 160-TQFP-2424

IMP16C550

Abstract: IMP16C450 (except the Register Buffer, Transmitter Holding and Divisor Latches), and the control logic of the UART , IMP16C550 Data Communications Universal Asynchronous Receiver/Transmitter (UART)with 16 , Tri-State® TTL drive capabilities for bidirectional data bus and control bus Easily interfaces to most , , DTR, RI,and DCD) The IMP16C550 Universal Asynchronous Receiver Transmitter (UART) is a CMOS-VLSI communication device in a single package. The UART performs serial to parallel conversion on data characters
Daily Silver IMP Microelectronics
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16-BYTE IMP16C450 44-PIN 48-PIN IMP16C550CJ44 imp16c550-cj44 IMP16C550-CP40 IMP16C550-CJ44 IMP16C550-A48

IMP16C5

Abstract: 16-BYTE IMP16C550 Data Communications Universal Asynchronous Receiver/Transmitter (UART)with 16 , Tri-State® TTL drive capabilities for bidirectional data bus and control bus Easily interfaces to most , , DTR, RI,and DCD) The IMP16C550 Universal Asynchronous Receiver Transmitter (UART) is a CMOS-VLSI communication device in a single package. The UART performs serial to parallel conversion on data characters , received from the CPU. The CPU can read the complete status of the UART at any time during the functional
IMP
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IMP16C5 imp dms the av

intel 8096

Abstract: STR 11006 lines for UART register select, input, TTL. S6-S0 Interrupt, output, CMOS/TTL. Tristate" 8-bit data port , out strobe (PC writes into UART regis ters), active low, input, TTL. Data in strobe (PC reads from UART registers), active low, input, TTL. Ouput, ready signal for high speed PC-AT interface. RÎ OH , interface to SC11006/024 Pow erful enough to handle M N P5 as w ell as H ayes commands & DSP Built-in UART , bit which switches the UART to bring out the parallel or the serial side of the UART. The MAC receives
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SC11061 SC11011CV SC11061CV 8250B intel 8096 STR 11006 A5 MCR 100-6 temperature control of 8096 74LS04 SC11006

Ei16C550-CP40

Abstract: DS1488 reporting capabilities Tri-State® TTL drive for the data bus and control bus Line break generation and , enhanced version of the Ei16C450 Universal Asynchronous Receiver/ Transmitter (UART). The improved , transfers. The UART performs serial-to-parallel conversion on data characters received from a peripheral , CPU can read the complete status of the UART at any time during the functional operation. Status information reported includes the type and condition of the transfer operations being performed by the UART
EPIC Semiconductor
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Ei16C550-CP40 DS1488 Ei16C550-CJ44 16C550 16C550-A48 16C550-CP40 16C550-CJ44

LM393NE

Abstract: de9s-frs UART Control, Status and Data Signal Traces (TTL levels) RX CD Jumper UART Control and Data , Communication Equipment (DCE) applications. This requires some of the UART's non-data circuits to operate , . This Technical Brief focuses on the Host UART signals from the U2 socket (MCP2150/ MCP2155) to the , Technology Inc. Preliminary DS91059B-page 1 TB059 MCP2150 DEVELOPER'S BOARD UART SIGNALS USING , Figure 2 and Figure 3). Table 1 shows the direction of the MCP2150 and MCP2155 UART signals and the
Microchip Technology
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MAX3238 LM393NE de9s-frs dj005b K D S 11.0592 MHZ HC tfds4500 UA7800KTE MCP2120/MCP2150 DM163008 DS91059B- 11F-3 DK-2750

MCP2155

Abstract: MCP2150 ) MAX3238 (U1) CTS TX RTS DSR DTR UART Control, Status, and Data Signal Traces (TTL levels , the NDM state. TX 7 7 8 I TTL Asynchronous receive; from Host Controller UART , Communication Equipment (DCE) applications. This requires some of the UART's non-data circuits to operate , Figure 1. This Technical Brief focuses on the Host UART signals from the U2 socket (MCP2150/ MCP2155 , Microchip Technology Inc. Preliminary DS91059A-page 1 TB059 MCP2150 DEVELOPER'S BOARD UART
Microchip Technology
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DSR 505 200B DS91059A- D-81739 DS91059A

74hc273

Abstract: SMD CODE list mosfet 6pin Schmitt-Trigger 5 V Dual Bus Buffer/Line Driver;TTL Enabled (3-State) 5 V Triple Inverter;TTL Enabled 5 V , 2-Input NOR Gate;TTL Enabled 5 V Dual 2-Input AND Gate;TTL Enabled 5 V Dual Buffer/Line Driver with Active LOW Output Enable;TTL Enabled (3-State) 5 V Dual Buffer/Line Driver with Active HIGH , Package 74HCT3G07 74HCT3G14 74HCT3G34 5 V Triple Open Drian Buffer;TTL Enabled 5 V Triple Inverting Schmitt Trigger;TTL Enabled 5 V Triple Buffer Gate;TTL Enabled DC DC DC Interface
Philips Semiconductors
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74hc273 SMD CODE list mosfet 6pin k 2129 MOSFET TRANSISTOR SMD CODE PACKAGE SOT363 LPC2129 ARM7TDMI-S programming TRIAC dimmer control I2C PCA9510 PCA9511 PCA9512 PCA9513 PCA9514 74ALVC

SC11091

Abstract: SC11064 ,33 65 59 67 61 Address lines for UART register select, input, TTL. Chip select, active low, input, TTL. 8-bit data port, input-output, TTL. D0-D 7 DIS DÖS Data in strobe (PC reads from UART registers), active low, input, TTL. Data out strobe (PC writes into UART registers), active low, input, TTL , ROM Pow er D ow n m ode indicator on PD pin Built-in UART w ith 80ns data access time in parallel m , patible UART w hich can be configured to provide a serial o r parallel DTE interface. In th e RDY m o d e
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SC11011 SC11064 sw 2604 ic schematic SC11091C GCR2 sw 2604 ic replacement SC11026 SC11095CV 80-PIN GG2355

str w 6554 a

Abstract: str w 6554 for UART register select. INPUT, TTL. Chip select, active low. INPUT-OUTPUT, TTL. 8 -bit data port. > CS D0 -D 7 DÎS DOS INTO RDY > INPUT, TTL. Data in strobe (PC reads from UART registers), active low. INPUT, TTL. Data out strobe (PC writes into UART registers), active low. OUTPUT, CMOS/TTL , internal RAM Power Down mode indicator on PD pin CMOS technology 16C450 compatible UART APPLICATIONS V , UART INTERRUPT CONTROL RECEIVER Figure 1. Rev 1.0 1-271 SC11031/SC11040/SC11041/SC11042
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SC11043CV str w 6554 a str w 6554 ic str 6554 a SC11040 ic str 6554 SC11043 SC11031/SC11040 C11031/SC11040/S C11041/S C11042/ C11043 SC11031/SC11040/SC11041/SC11042/SC11043

OXPCI958

Abstract: AT96C46 Programming Line control (bit 7) SCC UART Data Mnem. Receiver buffer RBR Transmitter , OX16PCI958 DATA SHEET Octal UART with PCI Interface FEATURES · · · · · · · · · · , Driver-facilitated DSR/DTR & Xon/Xoff handshaking 5-,6-,7- & 8-bit data framing 1, 1.5 or 2 stop bits UART , eight-byte programming interface to each UART. The UARTs are fully software-compatible with 16C550 devices , the receive FIFO. The state of the UART can be found at any time by reading status registers, and
Oxford Semiconductor
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OXPCI958 AT96C46 PU5103 at96c at96 63 marking PMDS 16C550/450 C--70 DS-0022 OX16PCI958-PQAG

imo plc cable rs232

Abstract: RS232 TTL self powered -232 Converter . 9 USB to UART cable with TTL level UART signals . , IC is used on the serial UART interface of the CY7C74225 to convert the TTL levels of the CY7C64225 , Document Number: 001-76294 Rev. *B Page 9 of 19 CY7C64225 USB to UART cable with TTL level UART signals This example illustrates a USB to UART cable design with TTL Level UART Signals using CY7C64225. This design is based on bus powered configuration. Figure 7. USB to UART cable with TTL level UART
Cypress Semiconductor
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imo plc cable rs232 RS232 TTL self powered rx1 tx1 android transceiver rs232 driver receiver
Abstract: Transceiver UART Controller Tx Buffer RTS DTR DSR Tx_LED Rx Buffer GND Rx_LED VCFG , -232 Converter . 9 USB to UART cable with TTL level UART signals . , IC is used on the serial UART interface of the CY7C74225 to convert the TTL levels of the CY7C64225 , TTL level UART signals This example illustrates a USB to UART cable design with TTL Level UART , with TTL level UART signals VDD VDD VDD VDD VBUS VBUS D+ 1k GND Rx_LED 560 D Cypress Semiconductor
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ejtag dvb

Abstract: ms-029fa1 141 I TTL input 5V UART 0 receive data line or receive serial data TXD0 142 O , interface CTSN0 144 I TTL input 5V UART 0 clear to send or serial I/O interface clock of the SSI interface UART 0 interface (4 pins) UART 1 and SSI interfaces (4 pins) 137 I TTL , 140 I TTL input 5V UART 1 clear to send or serial input interface clock of the SSI , interface (36.684 MHz) RXD2 135 I TTL input 5V UART 2 receive data line TXD2 136
Philips Semiconductors
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SAA7219 ejtag dvb ms-029fa1 SQFP208 quad video processor DVB smart card rs232 IEEE 1284 Peripheral Interface Controller

TDA50

Abstract: TDA5056 Semiconductors SYMBOL CS_RGN CLK UART 0 interface (4 pins) RXD0 TXD0 RTSN0 CTSN0 141 142 143 144 I O O I TTL input 2 mA output drive 2 mA output drive TTL input 5V 3.3 V 3.3 V 5V UART 0 receive data line or , UART 1 and SSI interfaces (5 pins) RXD1/V34_RXD TXD1/V34_TXD RTSN1/V34_FS 137 138 139 I O I/O TTL input , interface to IEEE 1394 devices (such as Philips PDI 1394 chip-set) · Two UART (RS232) data ports with Direct , front-end · An elementary UART with DMA capabilities, dedicated to front panel devices for instance · Two
Philips Semiconductors
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TDA50 TDA5056 MIPS16

STDM85

Abstract: KS32C5000AA channel 0 receive buffer register Undefined URXBUF1 0xE010 W UART channel 1 receive buffer , Important peripheral functions include two HDLCs, two UART channels, 2-channel GDMA, two 32-bit timers, and , controller · HDLC · GDMA · UART · Timers · Programmable I/O ports · , HDLCs System Manager · · · Four-word depth write buffer · Cost-effective , Programmable I/O UARTs · 18 programmable I/O ports · Two UART (serial I/O) blocks with DMA-based
Samsung Electronics
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KS32C5000A KS32C5000AA STDM85 hdlc KS32C500 60BSC 00BSC 50BSC
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