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Part Manufacturer Description Datasheet BUY
TMS320AV7100APGW Texas Instruments TMS320AV7100 Integrated Set-Top Digital Signal Processor visit Texas Instruments
ISL9491ERZ Intersil Corporation Single Output LNB Supply Voltage Regulator for Satellite Set-Top Box Applications; QFN16; Temp Range: -25° to 85°C visit Intersil Buy
ISL9491ERZ-T Intersil Corporation Single Output LNB Supply Voltage Regulator for Satellite Set-Top Box Applications; QFN16; Temp Range: -25° to 85°C visit Intersil Buy
ISL9491AERZ-T Intersil Corporation Single Output LNB Supply Voltage Regulator for Satellite Set-Top Box Applications; QFN16; Temp Range: -25° to 85°C visit Intersil Buy
ISL9491AERZ Intersil Corporation Single Output LNB Supply Voltage Regulator for Satellite Set-Top Box Applications; QFN16; Temp Range: -25° to 85°C visit Intersil Buy
ISL9492ERZ-T Intersil Corporation Highly Integrated Single Output LNB Regulator with I<sup>2</sup>C Interface for Satellite Set-Top Box Designs; TQFN28; Temp Range: -25° to 85°C visit Intersil Buy

Top marks EB

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: backed by more than 25 years experience with expanded beam (EB) fiber connector technology and are , experience for the development of the HX-1080 Broadcast Series. With world leading single mode EB optical , Sealing ï'§ Worldwide Support Top Left: HX-1080 Plug and bulkhead assembly showing blind mate thumb , detail Top Right: Opto-electrical Pin-out configuration All dimensions are in mm 158 mm 35 mm Auxiliary Electrical Low Voltage Signal EB Optical Technical Specifications Performance Optical Emerson Network Power
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HX1080 1000N 20AWG 24AWG CON06376 CON06366

marking 3A sot-89

Abstract: 3V02 "Green" Packaging Top Marking VN3205P YYWW LLLLLLLLLL Package may or may not include the following marks: Si or Bottom Marking CCCCCCCCCCC AAA TO-92 (N3) VN2LW W = Code for week sealed Package may or may not include the following marks: Si or YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking = "Green" Packaging Package may or may not include the following marks: Si or TO-243AA (SOT-89) (N8
Supertex
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marking 3A sot-89 3V02 SIVN3205 VN3205 VN3205N3-G VN3205P-G VN3205N8-G VN3205ND MS-001

HV5812P

Abstract: 16Strobe Package may or may not include the following marks: Si or 28-Lead PLCC (PJ) Top Marking YYW W HV 5 , referenced to GND. 28-Lead PLCC (PJ) Product Marking Top Marking YYWW HV5812P LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA *May be part of top marking Recommended Operating Conditions Sym , Assembler ID* = "Green" Packaging Package may or may not include the following marks: Si or Parameter , state. 4. Apply VPP. The VPP should not drop below VDD during operation. Top Marking YY = Year
Supertex
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HV5812 16Strobe HV5812PJ 2.65mm A0324 uA78 HVOUT20 MS-013 DSPD-28SOWWG D032409 DSFP-HV5812
Abstract: of top marking Package may or may not include the following marks: Si or 28-Lead PDIP , top marking Package may or may not include the following marks: Si or 28-Lead PLCC YY = Year , Country of Origin* = â'Greenâ' Packaging CCCCCCCCCCC Top Marking YYWW AAA θja 43OC/W 48OC/W , = Assembler ID* = â'Greenâ' Packaging Top Marking Power-up sequence should be the following , . Apply VPP. Package Product Marking YYWW Parameter 28 28-Lead SOW Top Marking Supertex
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C072413 HV5812P-G HV5812PJ-G 500/R D041309

hv5812wg

Abstract: V V °C Package may or may not include the following marks: Si or 28-Lead PDIP (P) Top Marking , YYWW AAA *May be part of top marking Package may or may not include the following marks: Si or , -Lead PDIP (P) 4 1 28 28-Lead SOW (WG) 26 Product Marking Top Marking H V 58 1 2 P YYWW , "Green" Packaging *May be part of top marking Recommended Operating Conditions Sym VDD VPP Tj , * = "Green" Packaging *May be part of top marking Package may or may not include the following
Supertex
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hv5812wg B040811
Abstract: *May be part of top marking AAA Package may or may not include the following marks: Si or 28 , reliability. All voltages are referenced to GND. 28-Lead PLCC (PJ) Product Marking Top Marking YYWW HV5812P LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA *May be part of top marking Recommended , Origin* A = Assembler ID* = â'Greenâ' Packaging Package may or may not include the following marks , operation. Top Marking YY = Year Sealed WW = Week Sealed LLLLLLLLLL L = Lot Number C = Country of Supertex
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C090408 A032409
Abstract: -Lead PLCC (PJ) 28-Lead SOW (WG) 2000mW 1900mW 1700mW 28-Lead PLCC (PJ) Product Marking Top , C = Country of Origin* A = Assembler ID* = â'Greenâ' Packaging *May be part of top marking Package may or may not include the following marks: Si or Recommended Operating Conditions Sym VDD , Top Marking YYWW AAA HV5812PJ Supply voltage 20 80 V LLLLLLLLLL Operating , Country of Origin* = â'Greenâ' Packaging *May be part of top marking Package may or may not include Supertex
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diagram

Abstract: HV5812PJ following marks: Si or 28-Lead PLCC (PJ) Top Marking YYW W A A A HV 5 81 2 WG LLLLLLLLLL , "Green" Packaging *May be part of top marking Package may or may not include the following marks: Si , referenced to GND. 28-Lead PLCC (PJ) Product Marking Top Marking YYWW HV58 12P LLLLLLLLLL , Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks: Si or Recommended Operating Conditions Sym 28-Lead PDIP (P
Supertex
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diagram B0410 A032910

sivn

Abstract: vn2lw 5 YYWW Top Marking YY = Year Sealed WW = Week Sealed = "Green" Packaging YYWW V N3 2 0 5 P LLLLLLLLLL Bottom Marking Package may or may not include the following marks: Si or , -Lead PDIP (P) TO-243AA (SOT-89) (N8) ID ID *May be part of top marking Package may or may not include the following marks: Si or Package may or may not include the following marks: Si or Thermal , D1 b Top View View B View B Seating Plane A2 A A A1 L e eA A
Supertex
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sivn vn2lw seimens DMOS s1 sot-89 marking code 125OC DSPD-14DIPP B041009 DSFP-VN3205 B052109

125OC

Abstract: mosfet array vgs 5v 2A Packaging AAA YYWW *May be part of top marking Package may or may not include the following marks , (NC) (top view) Product Marking Top Marking YY = Year Sealed WW = Week Sealed VN2 222NC , 20 Note 1 (Index Area) E1 E b1 1 b Top View View B View B Seating Plane A L A A1 e eA A eB Side View View A - A Note: 1. A Pin 1 identifier , - - - MAX .200 .070 .022 .065 1.020 .325 .310 eA .300 REF eB
Supertex
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VN2222NC mosfet array vgs 5v 2A MS-015 DSPD-20CDIPCNC DSFP-VN2222NC B042709

B11120

Abstract: 125OC Packaging AAA YYWW *May be part of top marking Package may or may not include the following marks , b Top View View B View B Seating Plane A L A A1 e eA A eB Side , (NC) (top view) Product Marking Top Marking YY = Year Sealed WW = Week Sealed VN2 222NC , 1.020 .325 .310 eA .300 REF eB .300 e .400 .100 BSC L .125 .200 JEDEC
Supertex
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B11120 B111209
Abstract: Country of Origin* A = Assembler ID* = â'Greenâ' Packaging *May be part of top marking Package may or may not include the following marks: Si or 40-Lead PDIP Top Marking YYWW HV518PJ , voltage, VPP 40-Lead PDIP -0.5V to +6.0V -0.5V to +90V Logic input levels (top view) -0.5V , . Typical Thermal Resistance Package 39 C/W 44-Lead PLCC (top view) Product Marking θja 40-Lead PDIP 44-Lead PLCC 37 C/W Top Marking O YYWW H V 518P O LLLLLLLLLL Supertex
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HV518 DSFP-HV518 HVOUT32 HV518P-G HV518PJ-G MS-018
Abstract: top marking Package may or may not include the following marks: Si or 40-Lead PDIP (P) Top , of top marking Package may or may not include the following marks: Si or 44-Lead PLCC (PJ , D1 D1 b Top View View B A View B Seating Plane A A2 A1 L eA eB e A , -Lead PDIP (P) 44-Lead PLCC (PJ) (top view) (top view) Product Markings Top Marking YYWW H V , .100 BSC eA .600 BSC eB L .600* .115 - - .700 .200 JEDEC Registration Supertex
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DSPD-44PLCCPJ F031111 B041111

B0411

Abstract: V518P be part of top marking Package may or may not include the following marks: Si or 40-Lead PDIP (P) Top Marking HV518PJ YYWW LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA YY = Year Sealed , part of top marking Package may or may not include the following marks: Si or 44-Lead PLCC (PJ , 85OC at 20mW/ O C. 40-Lead PDIP (P) (top view) 44-Lead PLCC (PJ) (top view) Product Markings Top Marking H V 518P YYWW LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA Y = Last Digit of Year
Supertex
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B0411 V518P Top marks EB
Abstract: , USB3, etc.) into the 16-lane slot on top, as shown in the example diagram and photo on the following , . â'¢ Target add-in cards for system tests IDT | THE ANALOG + DIGITAL COMPANY 89HT0808P EB , trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and , reserved. IDT | THE ANALOG + DIGITAL COMPANY PB_89HP0808P_REVA0612 89HT0808P EB PRODUCT BRIEF 2 Integrated Device Technology
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89KTT0808P
Abstract: D1 L b Top View View B View B A A A2 Seating Plane A1 eA eB A Side , -Lead PLCC Product Marking Top Marking HV9120NG YWW LLLLLLLL Bottom Marking CCCCCCCCC AAA Y , ID* = â'Greenâ' Packaging *May be part of top marking Package may or may not include the following marks: Si or Power dissipation: 16-Lead SOIC 16-Lead PDIP 20-Lead PLCC 900mW 1000mW , reliability. Voltages are referenced to -VIN. 16-Lead SOIC Top Marking YYWW HV9120P LLLLLLLLLL Supertex
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HV9120 500KH DSPD-20PLCCPJ C031111 DSFP-HV9120 C031314

C0213

Abstract: HV9120NG-G Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks: Si or 16-Lead SOIC (NG) Top Marking HV9120P YYWW LLLLLLLLLL Bottom Marking , Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks: Si or 16-Lead PDIP (P) Top Marking Stresses beyond those listed under "Absolute , -Lead PLCC ja 83OC/W 51OC/W 66 C/W O 20-Lead PLCC (PJ) Product Marking Top Marking YWW HV9120NG
Supertex
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C0213 HV9120NG-G TRANSISTOR PJ 026 transistor 40V embedded package B060412

HV9120

Abstract: C = Country of Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks: Si or 16-Lead SOIC (NG) Top Marking HV9120P YYWW , referenced to -VIN. Package may or may not include the following marks: Si or 16-Lead PDIP (P) Top , +0.3V 2.5mA 150OC -65 to +150OC 20-Lead PLCC (PJ) Product Marking Top Marking YWW HV9120NG , Number C = Country of Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking
Supertex
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A040711

AN-H21

Abstract: HV9123 part of top marking Package may or may not include the following marks: Si or 16-Lead SOIC (NG) Top Marking HV9123P LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA Y = Last Digit of Year Sealed , reliability. Package may or may not include the following marks: Si or 16-Lead PDIP (P) Top Marking , -0.3V to VDD +0.3V 2.5mA 150OC -65OC to +150OC YYWW 20-Lead PLCC (PJ) Product Marking Top , part of top marking Stresses beyond those listed under "Absolute Maximum Ratings" may cause
Supertex
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HV9123 AN-H21 HV9123NG-G PJ 89 MARKING HV9123NG 240VAC DSFP-HV9123

AN-H21

Abstract: HV9123PJ Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks: Si or 16-Lead SOIC (NG) Top Marking HV9123P YYWW LLLLLLLLLL Bottom Marking , include the following marks: Si or 16-Lead PDIP (P) Top Marking Stresses beyond those listed under , *May be part of top marking Package may or may not include the following marks: Si or 20 , ja 83 C/W O O 20-Lead PLCC (PJ) Product Marking Top Marking YWW 51 C/W 66OC/W HV9123NG
Supertex
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HV9123PJ smps design notes
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