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SN74LS32N Texas Instruments Quad 2-input positive-OR gates 14-PDIP 0 to 70
SN74LS32DR Texas Instruments Quad 2-input positive-OR gates 14-SOIC 0 to 70
SN74LS32DRE4 Texas Instruments Quad 2-input positive-OR gates 14-SOIC 0 to 70
SN74LS32DRG4 Texas Instruments Quad 2-input positive-OR gates 14-SOIC 0 to 70
SN74LS32D Texas Instruments Quad 2-input positive-OR gates 14-SOIC 0 to 70
SN74LS32NE4 Texas Instruments Quad 2-input positive-OR gates 14-PDIP 0 to 70

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TTL 74ls32

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: Output Current - High Output Current - Low FAST AND LS TTL DATA 5-43 SN54/74LS32 DC , M O TO R O LA . SN54/74LS32 QUAD 2-INPUT OR GATE QUAD 2-INPUT OR GATE Vcc fu] [7^1 [ÏÏ1 ITTI H [71 [71 LOW POWER SCHOTTKY Lä> Ll I Ll I Ll I Lit Ll I Ll I Ll I G N D r^1 l~ r^ N SUFFIX 1f lP ï ï ï c = D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION , pF FAST AND LS TTL DATA 5-44 -
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74LS32 TTL 74Ls32 truth table 74LS32 Quad 2-Input OR Gate SN54/74LS32 SN54LSXXJ SN74LSXXN SN74LSXXD
Abstract: 8.0 FAST AND LS TTL DATA 5-43 SN54/74LS32 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE , MOTOROLA (g) QUAD 2-INPUT OR GATE Vcc [ïïi ra ra ra ra m m rs LLI [il Iii LU Iii LU Ld GND GUARANTEED OPERATING RANGES SN54/74LS32 QUAD 2-INPUT OR GATE LOW POWER SCHOTTKY J SUFFIX CERAMIC CASE 632-08 N SUFFIX PLASTIC CASE 646-06 D SUFFIX soie CASE 751A-02 ORDERING INFORMATION , 22 ns VCC = 5.0 V tPHL Turn-On Delay, Input to Output 14 22 ns C[_ = 15 pF FAST AND LS TTL DATA -
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motorola 74ls32 74LS32 Or GATE 751A-02
Abstract: 4.0 8.0 mA FAST AND LS TTL DATA 5-1 SN54/74LS32 DC CHARACTERISTICS OVER OPERATING , SN54/74LS32 QUAD 2-INPUT OR GATE QUAD 2-INPUT OR GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING , , Input to Output 14 22 ns FAST AND LS TTL DATA 5-2 Motorola Motorola
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74LS32 Or GATE datasheet 74ls32 datasheet 74LS02
Abstract: lillkililliJliJlilliJliJ GND D20 54/7432, 54S/74S32 54LS/74LS32 ei ei ei m ei iti fi Elfi LlJ liJ LiJ LiJ Iii Iii , ! li! li] li] GND 13-44 FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 , â'" D19 3I,6A,9A OR Gates 17 Quad 2-lnput â'" 54LS/74LS32 ! 54/7432 â'" 54S/74S32 D20 3I -
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CI 74LS08 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 7409 54H/74H08 54S/74S08 54LS/74LS08 54S/74S09 54LS/74LS09 54H/74H21
Abstract: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) c o 5S agic/Conne Diagram Std. TTL 54/74 1 ns/10 mW lig h Speed Schottky 54S/74S ns/19 mW ig h Speed 54H/74H ns/22 mW 9000 Series ns/10 mW ~'c o u c 3 U. D w Power Schottky ILS/74LS ns/2 mW 5 < 0 o (0 £L < D at E a > NOR Gates 1 2 3 4 5 6 7 8 C , /74H11 - - - 54/7421 54H/74H21 OR Gates 17 Quad 2-Input - 54LS/74LS32 54/7432 - 54S , Lil Lil LiJ lü EJ IO GND D20 54/7432, 54S/74S32 54LS/74LS32 Vcc D21 54/7486, 54S/74S86, 54LS -
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Z427 FL 9014 TTL 7486 74ls86 TTL 74s32 74LS11 54LS/74LS02 54S/74S02 54LS/74LS27 54/Z427 54LS/74LS260 54LS/74LS28
Abstract: 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = , * 1.5V for all other TTL families. Test Circuit For 74 Totem-Pole Outputs Input Pulse Definition , mA 0.1 V, - 2.4V Short-circuit output current3 Ic c 74S32 UNIT Min VOH 74LS32 , for 74LS; VM - 1.5V for all other TTL families. Waveform 1. Waveform For Inverting Outputs AC -
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74ls32 equivalent 7432 pin configuration N7432N N74LS32N N74S32N N74LS32D N74S32D F07SB0S
Abstract: Signetics 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPE 7432 74LS32 74S32 TYPICAL PROPAGATION DELAY 12ns 14ns 4ns TYPICAL SUPPLY CURRENT (TOTAL , TEST CIRCUITS AND WAVEFORMS VM - 1,3V lo r 74LS; VM * 1 5V for all other TTL families. Test , Supply current (total) v cc Vcc - MIN, V|H = MIN, 74LS32 Max Min 2.7 0.4 Typ2 3.4 0.35 0.25 -1.5 1.0 , V m 1 3V for 74LS; V m " 1-5V fo r all other TTL families. Waveform 1. Waveform For Inverting -
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ic ttl 7432 IC 7432 ls 7432 IC pin configuration TTL 7432 OR propagation delay 7432 or gate ic 7432 ic
Abstract: 4.0 8.0 mA FAST AND LS TTL DATA 5-83 SN54/74LS32 DC CHARACTERISTICS OVER OPERATING , SN54/74LS32 QUAD 2-INPUT OR GATE QUAD 2-INPUT OR GATE VCC 14 1 LOW POWER SCHOTTKY 13 , ns tPHL Turn-On Delay, Input to Output 14 22 ns FAST AND LS TTL DATA 5-84 Case , 4. 14 G D SEATING PLANE K M FAST AND LS TTL DATA 5-85 MILLIMETERS MIN MAX , ., Hong Kong. FAST AND LS TTL DATA 5-86 Motorola Motorola
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74LS32 NOT gate 74ls32 pin out OF 74LS32 DATA SHEET OF 74LS32 data sheet 74ls32 74ls32 quad 2-input OR gates
Abstract: Signefics I 7432, LS32, S32 Gates Logic Products Quad Two-Input OR Gate Product Specification TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 , 74LS; Vu - 1.5V for all other TTL families. Input Pulse Definition FAMILY INPUT PULSE REQUIREMENTS , CONDITIONS1 7432 74LS32 74S32 UNIT Min Typ2 Max Min Typ2 Max Min Typ2 Max v HIGH-level OH output , lor 74LS; VM - 1.5V lor all other TTL families. Waveform 1. Waveform For Inverting Outputs AC -
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TTL 74ls LS32 7432 TTL pin configuration logic symbol 74LS32 74LS32 specification and configuration 7432 7432 signetics SO-14 LS03510S
Abstract: lillkililliJliJlilliJliJ GND D20 54/7432, 54S/74S32 54LS/74LS32 ei ei ei m ei iti fi Elfi LlJ liJ LiJ LiJ Iii Iii , E82 4L.6B â'¢105XX and 106XX = Military temperature range 9-21 FAIR CHILD DIGITAL TTL SSI , . TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic , 2-lnput â'" 54LS/74LS32 ! 54/7432 â'" 54S/74S32 D20 3I,6A,9A Exclusive OR Gates 18 Quad 2 -
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logic diagram of 7432 CI 7408 7408 s.i 7408 7486 nor l0610 54LS/74LS21 54LS/74LS32 54H/74H11 54S/74S11 54LS/74LS11 54S/74S15
Abstract: Signetics I 7432, LS32, S32 Gates Logic Products Quad Two-Input OR Gate Product Specification TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 , than or equal to the table entries. VM- 1.3V for 74LS; VM - 1.5V lor all other TTL families Input , temperature range unless otherwise noted.) PARAMETER TEST CONDITIONS1 7432 74LS32 74S32 UNIT Min , '" HPHL- VOUT jF V VM - 1.3V for 74LS; Vâ'ž - 1.5V for all other TTL families. Waveform 1. Waveform -
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74LS 7432 pin configuration of 7432 logic symbol 74LS32 IC OR GATE 7432 74LS32 pin configuration pin configuration of 74ls32 LS0S510S
Abstract: Signetics I 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPE 7432 74LS32 74S32 TYPICAL PROPAGATION DELAY 12ns 14ns 4ns TYPICAL SUPPLY CURRENT (TOTAL) 19mA 4.0mA 28mA ORDERING CODE PACKAGES Plastic DIP Plastic S O - 14 COMMERCIAL RANGE Vcc , Supply current (total) Vcc " MIN, V|h " MIN, Ioh - m a x Vcc = MIN, V|L = MAX Io l l0 L 74LS32 Max , FD7S80S V m - 1.3V for 74LS; VM = 1.5V for all other TTL families. Waveform 1. Waveform For -
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or ic 7432 IC 7432 for or gate IC PIN CONFIGURATION OF 74LS32 Fanout value of IC 7432 7432 ic pin configuration 7432 OR gates
Abstract: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' S Tu a SI , 3I,6A,9A OR Gates 17 Quad 2-lnput â'" 54LS/74LS32 ! 54/7432 â'" 54S/74S32 D20 3I,6A,9A -
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74LS33 74LS series logic gates CI 7402 TTL 7408 7408 TTL 7408 and 54LS OC/15 OC/30 54LS/74LS15 54LS/74LS86 54S/74
Abstract: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E £ Function'1' 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' Packages'3' NOR Gates 1 Quad 2-lnput 54LS/74LS02 54/7402 â'" 54S/74S02 D10 3I,6A,9A 2 Quad 2-lnput 9015 â'" â'" â'" â'" D11 4L,6B 3 Triple , 17 Quad 2-lnput j â'" 54LS/74LS32 54/7432 â'" 54S/74S32 D20 3I,6A,9A Exclusive OR Gates 18 -
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IC 7486 7408 ic diagram TTL 74ls08 IC TTL 7402 CI 7407 LS 7408 LS/74LS21 54LS/74LS136 54S/74S135 54LS/74LS386
Abstract: T SANYO SEMICONDUCTOR CORP 1HE D J 7Ti7Q7Li â¡ â¡QSt.47 fl Ì^^iitP 3034A CMOS High-Speed Standard Logic LC74HC Series Quad 2-lnput OR Gate £2099A Features â'¢ The LC74HC32M consists of 4 identical 2-input OR gates. â'¢ Uses CMOS silicon gate process technology to achieve operating speeds similar to LS.TTL (74LS32) with the low power dissipation and high noise margin of standard CMOS , the standard 54LS/74LS TTL logic family. Absolute Maximum Ratings/Ta=25±2°C, Vss=ov unit Maximum -
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LC74HC32 IC 74ls32 pin DIAGRAM OF IC 74ls32 of IC 74LS32 74LS series logic gates 3 input or gate 74LS32 power dissipation 1/4LC74HC32M 3116KI
Abstract: TC74HCT32AP/AF CMOS TC74HCT32AP,TC74HCT32AF Quad 2-Input OR Gate TC74HCT32A CMOS CMOS 2 OR CMOS LSTTL TTL TTL 4 TC74HCT32AP · : tpd = 12 ns () (VCC = 5 V) · : ICC = 1 A () (Ta = 25°C) · TTL : VIL = 0.8 V () · : LSTTL 10 · TC74HCT32AF VIH = 2.0 V () · : |IOH| = IOL = 4 mA () : tpLH tpHL - · LSTTL (74LS32) DIP14-P-300-2.54 : 0.96 g () SOP14-P-300-1.27A : 0.18 g () 1 -
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ic 74LS32 ttl cmos 74ls32 74LS32 OR IC datasheet ic 74LS32 ttl IC 74LS32 - 74ls32 ic
Abstract: ] li] LÌ] li] liJ LJ GND 13-51 FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High , /74LS21 54/7421 54H/74H21 â'" D19 3I,6A,9A OR Gates 17 Quad 2-lnput â'" 54LS/74LS32 ! 54/7432 â -
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TTL 74ls21 7407 connection diagram CI 7413 74LS125 7409 74125 54LS/74LS13 54LS/74LS125 54LS/74LS126 54LS/74LS365 54LS/74LS366 54LS/74LS367
Abstract: (g) ri M OTOROLA SN54/74LS32 fyi rn rn iyi rn ryi L iJ QUAD 2-INPUT OR GATE L J L j l±J Ü J Lü Ü J L J J Suffix - Case 632-08 (Ceramic) N Suffix - Case 646-06 (Plastic) LOW PO W ER SCH O TTKY GUARANTEED OPERATING RANGES S YM B O L V CC ta PARAMETER Supply Voltage Operating Am bient Temperature Range Output Current - High Output Current - Low 54 74 54 74 5 4 ,7 4 54 74 , TEST CONDITIONS V cc = 5 0 V C l = 15 pF FAST AND LS TTL DATA -
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Abstract: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) Logic/Connection Diagram'2' D10 D11 D12 D13 Std. TTL 54/74 1 0 ns/10 mW 9000 Series 8 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW E £ NOR Gates 1 2 3 4 5 6 7 8 ~c o o c S U. L o w Power Schottky 54LS/74LS 5 ns/2 mW 5 'a t 0) o > IS o (0 C L Quad 2-Input Quad 2-Input Triple 3-Input Dual 4-Input w , 17 Quad 2-Input - 54LS/74LS32 54/7432 - 54S/74S32 D20 3I,6A,9A Exclusive OR Gates 18 19 20 21 22 -
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74LS08 Quad 2-Input AND Gates or 2 input 74Ls32 74LS11 and 74LS32 74LS 3-input NOR 74H21
Abstract: converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are compatible with TTL, NMOS and CMOS , Compatible with TTL outputs: Vn H = 2V(Min.) VIL = 0.8V(Max.) Wide Interfacing Ability: LSTTL, NMOS, CMOS , Propagation Delays: tpLH = tpH L Pin and Function Compatible with 74LS32 (T O P V IE W ) 1A I B 1Y 2A 2B 1[ 2 -
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16NS25 74LS32 and gate 36--M TC74HC/HCT
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