NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 4.0 8.0 mA FAST AND LS TTL DATA 5-1 SN54/74LS02 DC CHARACTERISTICS OVER OPERATING , SN54/74LS02 QUAD 2-INPUT NOR GATE QUAD 2-INPUT NOR GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING , Turn-On Delay, Input to Output 10 15 ns FAST AND LS TTL DATA 5-2 ... | Original |
2 pages, |
truth table NOT gate 74 751A-02 74LS02 datasheet 74LS02 TTL 74LS02 74LS02 truth table TTL 74ls02 SN54/74LS02 SN54/74LS02 abstract |
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| Abstract: ® MOTOROLA QUAD 2-INPUT NOR GATE Vcc ra ra ra m ra m m LU LU LU LU LU LU LzJ gnd GUARANTEED OPERATING RANGES SN54/74LS02 QUAD 2-INPUT NOR GATE LOW POWER SCHOTTKY 1 J SUFFIX CERAMIC CASE 632-08 1 N , Current - High 54, 74 -0.4 mA 'OL Output Current - Low 54 4.0 mA 74 8.0 FAST AND LS TTL DATA 5-6 SN54/74LS02 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified , |_= 15 pF 'PHL Turn-On Delay, Input to Output 10 15 ns FAST AND LS TTL DATA 5-7 ... | OCR Scan |
2 pages, |
motorola 74LS02 751A-02 74LS02 74LS02 truth table TTL 74ls02 SN54/74LS02 SN54/74LS02 abstract |
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| Abstract: 4.0 8.0 mA FAST AND LS TTL DATA 5-6 SN54/74LS02 DC CHARACTERISTICS OVER OPERATING , SN54/74LS02 QUAD 2-INPUT NOR GATE QUAD 2-INPUT NOR GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING , 10 15 ns tPHL Turn-On Delay, Input to Output 10 15 ns FAST AND LS TTL DATA ... | Original |
2 pages, |
751A-02 high voltage diodes 4 inputs OR gate truth table 74LS02 ttl 74LS02 truth table 74LS02 datasheet 74LS02 TTL 74ls02 SN54/74LS02 SN54/74LS02 abstract |
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| Abstract: GND D10 54/7402, 54S/74S02 54S/74S02, 54LS/74LS02, 54LS/74LS28 54LS/74LS28 74LS33 74LS33 D11 9015 D12 54/7427, 54LS/74LS27 54LS/74LS27 , Lil GND 13-43 FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 54H/74H 6 ns/22 , Gates 1 Quad 2-lnput - 54LS/74LS02 54/7402 - 54S/74S02 54S/74S02 D10 3I,6A,9A 2 Quad 2-lnput 9015 - - - ... | OCR Scan |
2 pages, |
TTL 7402 TTL 7421 CI 74S02 7408 7408 and LS 7402 CI 74LS32 TTL 74ls02 ls 7408 TTL 7409 ls 7421 ci 7430 74LS27 CI 7408 54H/74H30 54S/74S30 54H/74H30 abstract |
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| Abstract: TC74HCT02AP/AF TC74HCT02AP/AF CMOS TC74HCT02AP TC74HCT02AP,TC74HCT02AF TC74HCT02AF Quad 2-Input NOR Gate TC74HCT02A TC74HCT02A CMOS CMOS 2 NOR CMOS LSTTL TTL TTL 3 TC74HCT02AP TC74HCT02AP · : tpd = 9 ns () (VCC = 5 V) · : ICC = 1 A () (Ta = 25°C) · TTL : VIL = 0.8 V () · : LSTTL 10 · TC74HCT02AF TC74HCT02AF VIH = 2.0 V () · : |IOH| = IOL = 4 mA () : tpLH tpHL - · LSTTL (74LS02) DIP14-P-300-2 DIP14-P-300-2.54 : 0.96 g () SOP14-P-300-1.27A : 0.18 g () 1 ... | Original |
6 pages, |
TC74HCT02AP TC74HCT02AF DIP14-P-300-2 74LS02 IC TTL 74LS02 TTL 74LS02 cmos 74ls02 IC 74LS02 TC74HCT02AP/AF TC74HCT02AP/AF abstract |
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| Abstract: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E £ Function'1' 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' Packages'3' NOR Gates 1 Quad 2-lnput 54LS/74LS02 54/7402 - 54S/74S02 54S/74S02 D10 3I,6A,9A 2 Quad 2-lnput 9015 - - - - D11 4L,6B 3 Triple 3-lnput - 54LS/74LS27 54LS/74LS27 54/7427 - - D12 3I,6A,9A 4 Dual 4-lnput w/Strobe - - 54/7425 - - D13 3I,6A,9A 5 Dual ... | OCR Scan |
1 pages, |
IC 7407 IC 74ls32 CI 7408 LS 7408 TTL 74ls02 CI 7486 TTL 7427 TTL 7421 74LS32 TTL ttl 7432 CI 7407 IC 7432 TTL 74ls08 TTL 7408 54LS/74LS 54H/74H 54LS/74LS abstract |
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| Abstract: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' S Tu a SI ... | OCR Scan |
1 pages, |
74LS32 NOT gate 74LS11 TTL 74LS08 ttl 74LS02 7486 ci 7409 TTL 7408 fairchild 9S41 TTL 74LS11 ci 7432 ttl TTL 74ls08 TTL 7486 ttl 7432 7408 54LS/74LS 54H/74H 54LS/74LS abstract |
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| Abstract: Signetics 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 74S02 , the table entries. VM - 1,3V for 74LS; VM - 1,5V for all other TTL families. Input Pulse Definitions , unless otherwise noted.) PARAMETER TEST CONDITIONS1 7402 74LS02 74S02 74S02 UNIT Min Typ2 Max Min , l-'PLH-j V« wfc7570s VM - 1.3V lor 74LS; VM - 1.5V lor all other TTL families. Waveform 1. Waveform For ... | OCR Scan |
3 pages, |
N74LS02D N74LS02N N74S02D N74S02N of 7402 - TTL TTL 74ls02 TTL 74s02 pin configuration of 7402 74S02 7402 pin configuration 74LS02 7402 quad 2 input not 74502 74LS02 pin configuration 74LS02 74S02 74LS02 abstract |
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| Abstract: Signetics I 7402, LS02, S02 Gates Logic Products Quad Two-Input NOR Gate Product Specification TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 74S02 , for 74LS; VM = 1.5V for ail other TTL families. Input Pulse Definitions FAMILY INPUT PULSE , noted.) PARAMETER TEST CONDITIONS1 7402 74LS02 74S02 74S02 UNIT Min Typ2 Max Min Typ2 Max Min Typ2 , for 74LS, VM - 1.5V for all other TTL families. Waveform 1. Waveform For Inverting Outputs AC ... | OCR Scan |
3 pages, |
7402 nor 7402 signetics 74LS 74LS02 74LS02 pin configuration 1N916 74S02 LS02 N7402N of 7402 - TTL N74S02N N74S02D N74LS02N N74LS02D 74LS02 abstract |
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| Abstract: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D93 54LS/74LS379 54LS/74LS379 1 A 4 5 12 13 | E D0 Di D2 D3 CP Oo Qi Q2 03 lltlfltl 3 2 6 7 11 10 14 15 Vcc = Pin 16 GND = Pin 8 DIGITAL -TTL D94 9386, 74LS266 74LS266 , SR MR Oo Oi 02 03 TT -19 9 8 16 15 14 13 Vcc = Pin 20 GND = Pin 10 13-55 FAIRCHILD DIGITAL TTL , ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 54S/74S 3 ns/19 , /74LS02 54/7402 - 54S/74S02 54S/74S02 D10 3I,6A,9A 2 Quad 2-lnput 9015 - - - - D11 4L,6B 3 Triple 3-lnput - 54LS ... | OCR Scan |
2 pages, |
74LS08 PIN 9S41 7411 pin diagram 7408, 7486, 7432 7408 TTL 8 input HA 7423 7408 fairchild TTL 7409 TTL 7421 7408 74LS08 ttl 7408 TTL 74LS574 CI 7402 54LS/74LS379 54LS/74LS379 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| 3.1 12 SN74LS02 View ACTIVE 5V SUPPLY VOLTAGE,MEDIUM POWER CONSUMPTION 4 ,MEDIUM POWER CONSUMPTION 4.5 to 5.5 TTL TTL -0.4/8 6 2.65 11 SN74LS04 SN74LS04 SN74LS04 SN74LS04 View ACTIVE 5V SUPPLY VOLTAGE,MEDIUM POWER CONSUMPTION 4.75 to 5.25 TTL TTL -0.4/8 6 4 .25 TTL TTL - /8 6 4.5 32 SN74LS06 SN74LS06 SN74LS06 SN74LS06 View ACTIVE 5V SUPPLY VOLTAGE,LOW POWER CONSUMPTION,MEDIUM POWER CONSUMPTION,VERY LOW POWER CONSUMPTION 4.75 to 5.25 TTL TTL - /40 6 www.datasheetarchive.com/files/texas-instruments/data/sc/docs/psheets/diagrams/subsys/sps_sgcn.htm |
Texas Instruments | 08/02/1999 | 24.21 Kb | HTM | sps_sgcn.htm |
| SN74LS02,"5V SUPPLY VOLTAGE,MEDIUM POWER CONSUMPTION",5,4.75 to SRC ,4.75 to SRC ",5,4.75 to SRC ='./././graphics/weblink.gif'> SN74LS33 SN74LS33 SN74LS33 SN74LS33,"5V SUPPLY VOLTAGE,MEDIUM POWER CONSUMPTION",5,4.75 to 5.25,TTL,TTL,- /24,4,8.7,32,http www.datasheetarchive.com/download/430829-883372ZC/nor_gates.csv |
Texas Instruments | 31/01/2000 | 12.63 Kb | CSV | nor_gates.csv |
| SN74LS02,"5V SUPPLY VOLTAGE,MEDIUM POWER CONSUMPTION",5,4.75 to SRC ,4.75 to SRC ",5,4.75 to SRC ='./././graphics/weblink.gif'> SN74LS33 SN74LS33 SN74LS33 SN74LS33,"5V SUPPLY VOLTAGE,MEDIUM POWER CONSUMPTION",5,4.75 to 5.25,TTL,TTL,- /24,4,8.7,32,http www.datasheetarchive.com/download/69241321-890717ZC/nor_ga~1.csv |
Texas Instruments | 31/01/2000 | 12.63 Kb | CSV | nor_ga~1.csv |
| HCT04 HCT04 HCT04 HCT04 D Hex Inverseur K HCTMOS not inv $ENDCMP # $CMP 74LS00 74LS00 74LS00 74LS00 D Quad nand2 K TTL nand2 $ENDCMP # $CMP 74LS01 74LS01 74LS01 74LS01 D Quad nand2 open collect. K TTL nand2 opencol $ENDCMP # $CMP 74LS02 D Quad Nor2 K EESchema-DOCLIB Version 2.0 Date: 10/10/2004-17:10:44 # $CMP 7400 D Quad nand2 K TTL nand2 $ENDCMP # $CMP 7402 D Quad Nor2 K TTL Nor2 $ENDCMP # $CMP 74HC00 74HC00 74HC00 74HC00 D Quad nand2 K HCMOS nand2 74HC74 74HC74 74HC74 74HC74 D Dual D FlipFlop, Set & Reset K TTL DFF F 74xx/74hc_hct74.pdf $ENDCMP # $CMP 74HCT00 74HCT00 74HCT00 74HCT00 D www.datasheetarchive.com/files/kaleidoscope/cad/kicad - kicad/library/74xx.dcm |
Kaleidoscope | 10/10/2004 | 11.88 Kb | DCM | 74xx.dcm |
| COMPATIBLE WITH 54/74LS02 The M54/74HCT02 M54/74HCT02 M54/74HCT02 M54/74HCT02 is a high speed CMOS QUAD 2-INPUT NOR GATE fabricated in silicon (TYP.) AT V CC = 5 V . LOW POWER DISSIPATION I CC = 1 m A (MAX.) AT T A = 25 5C . COMPATIBLE WITH TTL directly interface HSC 2 MOS systems with TTL and NMOS components. They are also plug in replace- ments for www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/2098-v2.htm |
STMicroelectronics | 14/06/1999 | 7.49 Kb | HTM | 2098-v2.htm |
| FUNCTION COMPATIBLE WITH 54/74LS02 The M54/74HCT02 M54/74HCT02 M54/74HCT02 M54/74HCT02 is a high speed CMOS QUAD 2-INPUT NOR GATE fabricated POWER DISSIPATION I CC = 1 m A (MAX.) AT T A = 25 5C . COMPATIBLE WITH TTL OUTPUTS V IH = 2V are designed to directly interface HSC 2 MOS systems with TTL and NMOS components. They are also www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/2098.htm |
STMicroelectronics | 20/10/2000 | 9.79 Kb | HTM | 2098.htm |
| COMPATIBLE WITH 54/74LS02 The M54/74HCT02 M54/74HCT02 M54/74HCT02 M54/74HCT02 is a high speed CMOS QUAD 2-INPUT NOR GATE fabricated in silicon (TYP.) AT V CC = 5 V . LOW POWER DISSIPATION I CC = 1 m A (MAX.) AT T A = 25 5C . COMPATIBLE WITH TTL directly interface HSC 2 MOS systems with TTL and NMOS components. They are also plug in replace- ments for www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/2098-v1.htm |
STMicroelectronics | 02/04/1999 | 7.53 Kb | HTM | 2098-v1.htm |
| AND FUNCTION COMPATIBLE WITH 54/74LS02 The M54/74HCT02 M54/74HCT02 M54/74HCT02 M54/74HCT02 is a high speed CMOS QUAD 2-INPUT NOR DISSIPATION I CC = 1 m A (MAX.) AT T A = 25 5C . COMPATIBLE WITH TTL OUTPUTS V IH = 2V (MIN families. M54/74HCT M54/74HCT M54/74HCT M54/74HCT devices are designed to directly interface HSC 2 MOS systems with TTL and NMOS www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/2098-v3.htm |
STMicroelectronics | 25/05/2000 | 9.28 Kb | HTM | 2098-v3.htm |
| ) .model ls_openc d_open_c(open_delay=1p fall_delay=1p) .ends * * * * input NOR gate *SYM=NOR2 *74LS02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES * .subckt 74LS02 in1 in2 out *FAMILY TTLin TTLin TTLout *pinout N 2 3 1;5 6 4;8 9 10;11 12 13:VCC=14 GND=7 * * * * * *SRC=74LS00 74LS00 74LS00 74LS00;74LS00 74LS00 74LS00 74LS00;TTL;74LSxx;2 input NAND gate *SYM=NAND2 *74LS00 74LS00 74LS00 74LS00 QUADRUPLE 2-INPUT POSITIVE ;74LS01 74LS01 74LS01 74LS01;TTL;74LSxx;2 input NAND gate *SYM=NAND2 *74LS01 74LS01 74LS01 74LS01 QUADRUPLE 2-INPUT POSITIVE-NAND GATES *WITH www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/74ls.lib |
Spice Models | 18/04/2010 | 63.91 Kb | LIB | 74ls.lib |
| ) .ENDS 74HCT02 74HCT02 74HCT02 74HCT02 * - 74LS02 - * Quad 2 /3/94 * .SUBCKT 74LS02 1A 1B 1Y + optional: DPWR=$G_DPWR DGND=$G_DGND + params: MNTYMXDLY=0 IO_LEVEL=0 _LEVEL={IO_LEVEL} .model DLY_LS02 ugate (tplhTY=10ns tplhMX=15ns tphlTY=10ns tphlMX=15ns) .ENDS 74LS02 - * Quad 2-Input Nand Gates * * The TTL Logic Data Book, 1988, TI Pages 2-3 to 2-7 * bss 2 * -74ALS00- -74ALS00- -74ALS00- -74ALS00- * Quadruple 2-Input Positive NAND Gate * Motorola Schottky TTL Data Book,1983 www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/dig000.lib |
Spice Models | 18/04/2010 | 473.91 Kb | LIB | dig000.lib |