TS83102G0BCGL Datasheet, Circuit, PDF, Cross Reference, & Application Note Results |
| Datasheet Search Results | 1 - 2 of about 2 for TS83102G0BCGL | ||||
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TS83102G0BCGL | Atmel Corporation | N/A | 1375.66 Kb, 56 Pages. |  |
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TS83102G0BCGL | Atmel Corporation | ADC 10-bit 2 Gsps. | 230.41 Kb, 12 Pages. | |
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| Fulltext Datasheet Results | 1 - 4 of about 4 for TS83102G0BCGL | ||||
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First line: 10-bit Gsps Evaluation Board TSEV83102G0B Abstract: .. TS83102G0BCGL CBGA 152 “C” grade: 0 C < TC; TJ < 90 C Standard. TS83102G0BVGL TS83102G0BVGL CBGA 152 “V” grade: -20 C < TC; TJ < 110 C Standard. TSEV83102G0BGL TSEV83102G0BGL CBGA 152 Ambient Prototype. Evaluation Board delivered .. Tags: FR4 epoxy dielectric constant 4.4 C30B* C22A C20B b17 zener diode TSEV83102G0B | 997.47 Kb | 33 Pages | Original | |
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First line: schematic diagram cga to vga converter marking codes transistors 2F2 Gsps Sampling Rate Power Consumption: mVpp Differential Single-ended Analog Inputs Differential Single-ended Clock Inputs LVDS Output Compatibility Differential Outputs with Common Mode Dependent Temperature Gain Adjust Sampling De Abstract: .. TS83102G0BCGL CBGA 152. “C” 0 C <Tc; TJ <90 C. Standard product. TS83102G0BVGL TS83102G0BVGL CBGA 152. “V” -20 C .. Tags: marking codes transistors 2F2 schematic diagram cga to vga converter marking P12(RF) Marking D1B TS81102G0 TS83102G0B | 1375.65 Kb | 56 Pages | Original | |
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First line: Gsps Sampling Rate Power Consumption: mVpp Differential Single-ended Analog Inputs Differential Single-ended Clock Inputs LVDS Output Compatibility Differential Outputs with Common Mode Dependent Temperature Gain Adjust Sampling Delay Adjust Offset Control Capability Data Ready Output with Asynchron Abstract: .. TS83102G0BCGL CBGA 152. “C” 0 C <Tc; TJ <90 C. Standard product. TS83102G0BVGL TS83102G0BVGL CBGA 152. “V” -20 C .. Tags: marking P12(RF) Marking D1B 2101A TS81102G0 TS83102G0B | 1428.82 Kb | 55 Pages | Original | |
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First line: Gsps Sampling Rate Power Consumption: mVpp Differential Single-ended Analog Inputs Differential Single-ended Clock Inputs LVDS Output Compatibility Differential Outputs with Common Mode Dependent Temperature Gain Adjust Sampling Delay Adjust Offset Control Capability Data Ready Output with Asynchron Abstract: .. TS83102G0BCGL CBGA 152. “C” 0 C <Tc; TJ <90 C. Standard product. TS83102G0BVGL TS83102G0BVGL CBGA 152. “V” -20 C .. Tags: marking P12(RF) Marking D1B TS81102G0 TS83102G0B | 1345.2 Kb | 56 Pages | Original | |
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