First line: Programmable DMUX Ratio: Data Rate Gsps (8b/10b) 4.3/4.7 (ECL Output) Data Rate Gsps (8b/10b) 6/6.9 (ECL Output) 1:16 With TS8388B TS83102G0 DMUX Parallel Output Mode 8/10-bit Differential Input Data Data Ready Data Ready Input Clock Input Clock Sampling Delay Adjust Single-ended Output Data: AdjustAbstract: .. TS81102G0FS Target Specification. Summary. For more information please contact hotline-bdc@gfo.atmel.com. 2 TS81102G0FS. 5344AS 5344AS –BDC–09/03. Package Description. Table 1. Pin Description. Symbol .. Tags: TS81102G0CTPTS8388B TS83102G0
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First line: TS81102G0FS Programmable DMUX Ratio: Data Rate Msps (8b/10b) 4.3/4.7W (ECL Output) Data Rate Gsps (8b/10b) 6/6.9W (ECL Output) 1:16 with TS8388B TS83102G0 DMUX Parallel Output Mode 8/10-bit Differential Input Data Data Ready Data Ready/2 Input Clock Input Clock Sampling Delay Adjust Single-ended OutAbstract: .. TS81102G0FS. 3. Internal Timing Diagram This diagram is corresponding to an established operation of the DMUX with Synchronous Reset. Figure 3-1. Timing Diagram. Data In. DR In = Fs. DR/2 In = Fs/2 .. Tags: TS81102G0FSdmux 3/8TS8388B TS83102G0
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First line: cqfp package outline TSEV81102G0FS Evaluation BoardAbstract: .. Suitable for high-frequency evaluation of the TS81102G0FS device up to 2.2 GHz Board dimensions are 200 mm x 190 mm. Fully assembled and tested. For optimal understanding and use of this evaluation .. Tags: cqfp package outlineÂTSEV81102G0FS
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First line: 5362b* TSEV81102G0FS Evaluation BoardAbstract: .. ÑSuitable for high-frequency evaluation of the TS81102G0FS device up to 1.5 GHz ÑBoard dimensions are 200 mm x 190 mm. ÑFully assembled and tested. For optimal understanding and use of this evaluation .. Tags: 5362b*TSEV81102G0FS