TR909 ZT/200 28-PIN 1N4448 PBL386 50/1SO 50/1QN 1522-PBL S-164 - Datasheet Archive

 

PBL 386 50/1 Subscriber Line Interface Circuit Description Key Features The PBL 386 50/1 Subscriber Line Interface Circuit (SLIC)

 

October 1998 PBL 386 50/1 Subscriber Line Interface Circuit Description Key Features The PBL 386 50/1 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated circuit for use in Central Office Metering applications and other telecommunications equipment. The PBL 386 50/1 has been optimized for low total line interface cost and a high degree of flexibility in different applications. The PBL 386 50/1 emulates resistive loop feed, programmable between 2x50 and 2x900 , with short loop current limiting adjustable to max 45 mA. In the current limited region the loop feed is nearly constant current with a slight slope corresponding to 2x30k. A second, lower battery voltage may be connected to the device to reduce short loop power dissipation. The SLIC automatically switches between the two battery supply voltages without need for external components or external control. The SLIC incorporates loop current, ground key and ring trip detection functions. The PBL 386 50/1 is compatible with both loop and ground start signaling. Two- to four-wire and four- to two-wire voice frequency (VF) signal conversion is accomplished by the SLIC in conjunction with either a conventional CODEC/filter or with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable two-wire impedance, complex or real, is set by a simple external network. Longitudinal voltages are suppressed by a feedback loop in the SLIC and the longitudinal balance specifications meet Bellcore TR909 TR909 requirements. The PBL 386 50/1 package options are 24-pin SOIC or 28-pin PLCC. · Programmable two-wire signal headroom for 2.2 Vrms metering · High and low battery with automatic switching · Only +5 V feed in addition to battery · Selectable transmit gain (0.5x or 0.25x) · 70 mW on-hook power dissipation in active state · On-hook transmission · Long loop battery feed tracks Vbat for maximum line voltage · No power-up sequence · Tertiary protection arrangement · 43V open loop voltage @ -48V battery feed · Constant loop voltage for line leakage 10 k @ -48V) · Full longitudinal current capability during on-hook state · Analog over temperature protection permits transmission while the protection circuit is active Ring Relay Driver RRLY · Line voltage measurement · Polarity reversal DT C1 Ring Trip Comparator DR TIPX Ground Key Detector RINGX Input Decoder and Control C2 C3 · Ground key detector · Tip open state with ring ground detector DET HP Two-wire Interface POV PSG PLC LP 38 PB 6 L 50 /1 VCC Line Feed Controller and Longitudinal Signal Suppression 50 PLD 38 6 Off-hook Detector REF AGND BGND VTX VF Signal Transmission PTG P B L VBAT /1 VBAT2 RSN 24-pin SOIC, 28-pin PLCC Figure 1. Block diagram. 4-225 PBL 386 50/1 Maximum Ratings Parameter Symbol Min Max Unit Temperature, Humidity Storage temperature range Operating temperature range Operating junction temperature range, Note 1 TStg TAmb TJ -55 -40 -40 +150 +110 +140 °C °C °C Power supply, 0°C TAmb -70°C VCC with respect to A/BGND VBAT2 with respect to A/BGND VBat with respect to A/BGND, continuous VBat with respect to A/BGND, 10 ms VCC VBat2 VBat VBat -0.4 VBat -75 -80 6.5 0.4 0.4 0.4 V V V V Power dissipation Continuous power dissipation at TAmb +70 °C PD 1.5 W 3 V Ground Voltage between AGND and BGND Relay Driver Ring relay supply voltage VG -3 BGND+14 V Ring trip comparator Input voltage Input current VDT, VDR IDT, IDR VBat -5 AGND 5 V mA Digital inputs, outputs (C1, C2, C3, DET) Input voltage VID -0.4 VCC V Output voltage VOD -0.4 VCC V TIPX and RINGX terminals, 0°C < TAmb < -70°C TIPX or RINGX current TIPX or RINGX current, pulse < 10 ms, tRep > 10 s ITIPX, IRINGX ITIPX, IRINGX -100 -2 +100 2 mA A TIPX or RINGX current, pulse < 1 ms, tRep > 10 s ITIPX, IRINGX -5 5 A TIPX or RINGX current, pulse < 10 µs, tRep > 10 s TIPX or RINGX current, pulse < 1 µs, tRep >10 s TIPX or RINGX current, pulse < 250 ns, tRep > 10 s ITIPX, IRINGX ITIPX, IRINGX ITIPX, IRINGX -15 -20 -20 15 20 20 A A A Parameter Symbol Min Max Unit Ambient temperature VCC with respect to AGND VBat with respect to AGND AGND with respect to BGND TAmb VCC VBat VG 0 4.75 -65 -100 +70 5.25 -8 100 °C V V mV Recommended Operating Condition Notes 1. 4-226 The circuit includes thermal protection. Operation at or above 140°C junction temperature may degrade device reliability. PBL 386 50/1 Electrical Characteristics 0 °C TAmb +70 °C, PTG = Open (see pin description), ROV = , VCC= +5V ±5 %, VBat= -58V to -40V, VBat2 = -32V, RLC=32.4 k, IL = 27 mA. RL = 600 , RF1= RF2= RP1= RP2=0, RRef = 49.9 k, CHP = 47 nF, CLP=0.15 µF, RT = 60 k, RSG = 0 k, RRX = 60 k, RR = 11 k unless otherwise specified. Current definition: current is positive if flowing into a pin. Ref fig Parameter Conditions Min Active state, ROV = 0.2 kHz < f < 3.4 kHz 1% THD, Note 1 f16kHz, ZLAC =200, Adj. by ROV Note 2 0 < f < 100 Hz active state Normal polarity: 0.2 kHz < f < 1.0 kHz 1.0 kHz < f < 3.4 kHz Reverse polarity: 0.2 kHz < f < 3.4 kHz Typ Max 2.7 Unit Two-wire port Overhead voltage, VTRO ,ILdc > 18mA On-Hook, ILdc < 5mA Over load level, metering Input impedance, ZTR Longitudinal impedance, ZLoT, ZLoR Longitudinal current limit, ILoT, ILoR Longitudinal to metallic balance, BLM (IEEE standard 455-1985, ZTRX=736) Longitudinal to metallic balance, BLME ELo BLME = 20 · Log VTR Longitudinal to four-wire balance, BLFE BLFE = 20 · Log 2 3 3 Normal polarity: 0.2 kHz < f < 1.0 kHz 1.0 kHz < f < 3.4 kHz Reverse polarity: 0.2 kHz < f < 3.4 kHz 0.2 kHz < f < 3.4 kHz ELo VTX Metallic to longitudinal balance, BMLE ETR BMLE = 20 · Log ; ERX = 0 VLo 4 C Figure 2. Overhead voltage, VTRO, twowire port RL VTRO 1 20 k, 1% THD, Note 4 VTR Typ 0.2 kHz < f < 1.0 kHz 1.0 kHz < f < 3.4 kHz, Note 3 active, IL