TPS62000 TPS62001 TPS62002 TPS62003 TPS62004 TPS62005 TPS62006 TPS62007 - Datasheet Archive

 

TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH-EFFICIENCY STEP-DOWN LOW POWER DC-DC CONVERTER SLVS294B ­ SEPTEMBER

 

TPS62000 TPS62000, TPS62001 TPS62001, TPS62002 TPS62002, TPS62003 TPS62003 TPS62004 TPS62004, TPS62005 TPS62005, TPS62006 TPS62006, TPS62007 TPS62007, TPS62008 TPS62008 HIGH-EFFICIENCY STEP-DOWN LOW POWER DC-DC CONVERTER SLVS294B SLVS294B ­ SEPTEMBER 2000 ­ REVISED JUNE 2002 D features D D D D D D D D D High-Efficiency Synchronous Step-Down Converter With Greater Than 95% Efficiency 2 V to 5.5 V Operating Input Voltage Range Adjustable Output Voltage Range From 0.8 V to VI Fixed Output Voltage Options Available in 0.9 V, 1 V, 1.2 V, 1.5 V, 1.8 V, 1.9 V, 2.5 V, and 3.3 V Synchronizable to External Clock Signal up to 1 MHz Up to 600 mA Output Current Pin-Programmable Current Limit High Efficiency Over a Wide Load Current Range in Power Save Mode 100% Maximum Duty Cycle for Lowest Dropout D D D D Low-Noise Operation Antiringing Switch and PFM/PWM Operation Mode Internal Softstart 50-µA Quiescent Current (TYP) Available in the 10-Pin Microsmall Outline Package (MSOP) Evaluation Module Available applications D D D D D D Low-Power CPUs and DSPs Cellular Phones Organizers, PDAs, and Handheld PCs MP-3 Portable Audio Players Digital Cameras USB-Based DSL Modems and Other Network Interface Cards description The TPS6200x devices are a family of low-noise synchronous step-down dc-dc converters that are ideally suited for systems powered from a 1-cell Li-ion battery or from a 2- to 3-cell NiCd, NiMH, or alkaline battery. The TPS6200x operates typically down to an input voltage of 1.8 V, with a specified minimum input voltage of 2 V. EFFICIENCY vs LOAD CURRENT 100 VI = 2 V to 5.5 V 90 1 VIN L EN FB 9 10 µH VO = 0.8 V to VI 80 10 µF Efficiency ­ % 70 8 SYNC = Low 10 µF TPS6200x 60 6 SYNC = High 50 7 ILIM 40 SYNC GND 30 3 PGND PG FC 10 4 PG 2 0.1 µF 20 VI = 3.6 V, VO = 2.5 V 10 0 5 0.1 1 10 100 IO ­ Load Current ­ mA With VO 1.8 V; Co = 10 µF, VO 50 m See Table 2 for recommended capacitors. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 15 TPS62000 TPS62000, TPS62001 TPS62001, TPS62002 TPS62002, TPS62003 TPS62003 TPS62004 TPS62004, TPS62005 TPS62005, TPS62006 TPS62006, TPS62007 TPS62007, TPS62008 TPS62008 HIGH-EFFICIENCY STEP-DOWN LOW POWER DC-DC CONVERTER SLVS294B SLVS294B ­ SEPTEMBER 2000 ­ REVISED JUNE 2002 APPLICATION INFORMATION output capacitor selection (continued) If an output capacitor is selected with an ESR value 120 m, its RMS ripple current rating always meets the application requirements. Just for completeness, the RMS ripple current is calculated as: I RMS(C ) o V 1­ O V I L + VO 1 2 3 The overall output ripple voltage is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charge and discharging the output capacitor: DVO + VO V 1­ O V I L 8 1 Co ) ESR Where the highest output voltage ripple occurs at the highest input voltage VI. Table 2. Recommended Capacitors CAPACITOR VALUE ESR/m 10 µF 50 Taiyo Yuden JMK316BJ106KL JMK316BJ106KL COMPONENT SUPPLIER Ceramic COMMENTS 47 µF 100 Sanyo 6TPA47M 6TPA47M POSCAP 68 µF 100 Spraque 594D686X0010C2T 594D686X0010C2T Tantalum input capacitor selection Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is required for best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. The input capacitor should have a minimum value of 10 µF and can be increased without any limit for better input voltage filtering. The input capacitor should be rated for the maximum input ripple current calculated as: I RMS + I O(max) V O V I V 1­ O V I The worst case RMS ripple current occurs at D = 0.5 and is calculated as: I RMS O + I2 . Ceramic capacitor show a good performance because of their low ESR value, and they are less sensitive against voltage transients compared to tantalum capacitors. Place the input capacitor as close as possible to the input pin of the IC for best performance. 16 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 TPS62000 TPS62000, TPS62001 TPS62001, TPS62002 TPS62002, TPS62003 TPS62003 TPS62004 TPS62004, TPS62005 TPS62005, TPS62006 TPS62006, TPS62007 TPS62007, TPS62008 TPS62008 HIGH-EFFICIENCY STEP-DOWN LOW POWER DC-DC CONVERTER SLVS294B SLVS294B ­ SEPTEMBER 2000 ­ REVISED JUNE 2002 APPLICATION INFORMATION layout considerations As for all switching power supplies, the layout is an important step in the design especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current paths as indicted in bold in Figure 16. The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output capacitor. Place the bypass capacitor, C3, as close as possible to the FC pin. The analog ground, GND, and the power ground, PGND, need to be separated. Use a common ground node as shown in Figure 16 to minimize the effects of ground noise. 1 VI VIN EN L1 9 L FB VO + 8 Ci R3 5 R1 TPS62000 TPS62000 6 C(ff) 4 ILIM + PG PG Co 7 R2 10 SYNC GND PGND FC 3 C3 2 Figure 16. Layout Diagram typical application VI = 5 V C1 10 µF 1 8 VIN L EN FB 9 7 ILIM SYNC GND 3 VO = 3.3 V/600 mA 5 TPS62007DGS TPS62007DGS 6 L1 22 µH 680 k PGND PG FC C2 10 µF 10 4 Power Good 2 L1: Sumdia CDRH5D28-220 CDRH5D28-220 C1, C2: 10 µF Ceramic Taiyo Yuden JMK316BJ106KL JMK316BJ106KL C3: 0.1 µF Ceramic C3 0.1 µF Figure 17. Standard 5 V to 3.3 V/600 mA Conversion; High Efficiency POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 17 TPS62000 TPS62000, TPS62001 TPS62001, TPS62002 TPS62002, TPS62003 TPS62003 TPS62004 TPS62004, TPS62005 TPS62005, TPS62006 TPS62006, TPS62007 TPS62007, TPS62008 TPS62008 HIGH-EFFICIENCY STEP-DOWN LOW POWER DC-DC CONVERTER SLVS294B SLVS294B ­ SEPTEMBER 2000 ­ REVISED JUNE 2002 APPLICATION INFORMATION typical application (continued) 1 VI = 2.7 V to 4.2 V C1 10 µF 8 VIN L EN FB 9 7 ILIM 470 k PGND SYNC GND 3 VO = 2.5 V/600 mA 5 TPS62006DGS TPS62006DGS 6 L1 10 µH PG FC C2 10 µF 10 4 Power Good L1: C1,C2: 2 C3 0.1 µF C3: Sumdia CDRH5D28-100 CDRH5D28-100 10 µF Ceramic Taiyo Yuden JMK316BJ106KL JMK316BJ106KL 0.1 µF Ceramic Figure 18. Single Li-on to 2.5 V/600 mA Using Ceramic Capacitors Only VI = 2.5 V to 4.2 V C1 10 µF 1 8 VIN L EN FB 9 7 ILIM PGND SYNC GND 3 PG FC VO = 1.8 V/300 mA 5 C2 10 µF TPS62005DGS TPS62005DGS 6 L1 10 µH 10 4 L1: C1,C2: 2 C3 0.1 µF C3: Murata LQH4C100K04 LQH4C100K04 10 µF Ceramic Taiyo Yuden JMK316BJ106KL JMK316BJ106KL 0.1 µF Ceramic NOTE: For low noise operation connect SYNC to VIN Figure 19. Single Li-on to 1.8 V/300 mA; Smallest Solution Size 18 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 TPS62000 TPS62000, TPS62001 TPS62001, TPS62002 TPS62002, TPS62003 TPS62003 TPS62004 TPS62004, TPS62005 TPS62005, TPS62006 TPS62006, TPS62007 TPS62007, TPS62008 TPS62008 HIGH-EFFICIENCY STEP-DOWN LOW POWER DC-DC CONVERTER SLVS294B SLVS294B ­ SEPTEMBER 2000 ­ REVISED JUNE 2002 APPLICATION INFORMATION typical application (continued) 1 VI = 2 V to 3.8 V C1 10 µF 8 VIN 9 L EN L1 10 µH FB VO = 1.2 V/200 mA 5 C2 47 µF TPS62003 TPS62003 6 7 ILIM 10 PGND SYNC GND 4 PG FC 3 + L1: C1: 2 C3 0.1 µF C2: C3: Murata LQH4C100K04 LQH4C100K04 10 µF Ceramic Taiyo Yuden JMK316BJ106KL JMK316BJ106KL Sanyo 6TPA47M 6TPA47M 0.1 µF Ceramic Figure 20. Dual Cell NiMH or NiCd to 1.2 V/200 mA; Smallest Solution Size VI = 2.5 V to 5.5 V C1 10 µF 1 8 VIN L EN FB 9 L1 10 µH R4 5 820 k VO = 1.1 V or 1.5 V/600 mA R1 470 k TPS62000 TPS62000 6 7 ILIM SYNC GND 3 PG PGND FC 4 PG C(ff) 150 pF C2 47 µF + 10 R2 326 k R3 524 k 2 C3 0.1 µF L1: C1: Sumida CDRH5D28-100 CDRH5D28-100 Q1 10 µF Ceramic Taiyo Yuden BSS138 BSS138 JMK316BJ106KL JMK316BJ106KL C2: Sanyo 6TPA47M 6TPA47M C3: 0.1 µF Ceramic Use a small R-C filter to filter wrong reset signals during output voltage transitions. A large value is used for C(ff) to compensate for the parasitic capacitance introduced into the regulation loop by Q1. Logic Input Hi VO = 1.5 V Low VO = 1.1 V Figure 21. Dynamic Output Voltage Programming As Used in Low Power DSP Applications POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 19 TPS62000 TPS62000, TPS62001 TPS62001, TPS62002 TPS62002, TPS62003 TPS62003 TPS62004 TPS62004, TPS62005 TPS62005, TPS62006 TPS62006, TPS62007 TPS62007, TPS62008 TPS62008 HIGH-EFFICIENCY STEP-DOWN LOW POWER DC-DC CONVERTER SLVS294B SLVS294B ­ SEPTEMBER 2000 ­ REVISED JUNE 2002 MECHANICAL DATA DGS (S-PDSO-G10 S-PDSO-G10) PLASTIC SMALL-OUTLINE PACKAGE 0,27 0,17 0,50 10 0,25 M 6 0,15 NOM 3,05 2,95 4,98 4,78 Gage Plane 0,25 1 0°­ 6° 5 3,05 2,95 0,69 0,41 Seating Plane 1,07 MAX 0,15 0,05 0,10 4073272/A 4073272/A 03/98 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. 20 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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