P-DSO-14-3 TLE6389G50-1 SPD09P06PL MBRD360 DO3340P-473 P-DSO-14 G50-1 G33-1

TLE 6389 Target Datasheet Features · · · · Operation from 5V to 60V Input Voltage 100% Maximum Duty

Step-Down DC/DC Controller TLE 6389 Target Datasheet Features · · · · Operation from 5V to 60V Input Voltage 100% Maximum Duty Cycle Efficiency >90% Output Current up to 3A Less than 100µA Quiescent Current 2µA Max Shutdown Current Up to 350kHz Switching Frequency Adjustable and Fixed 5V and VIN 3.3V Output Voltage versions 3% output voltage accuracy (PWM Mode) Current-Mode Control Scheme On Chip Low Battery Detector Ambient operation range -40°C to 125°C R = P-DSO-14-3 P-DSO-14-3, -4, -9, -11 RSENSE= 0.05 CIN1 = 100 µF CBDS= COUT = D1 100 µF 220 nF 11 13 CIN2 = 220nF 14 BDS 12 2 GDRV CS VS 7 RSI2= TLE6389G50-1 TLE6389G50-1 SI SI_GND SI_ENABLE 1 6 100k VOUT IOUT SI1 400k L1 = 47 µH M1 · · · · · · · · ON SYNC GND 5 OFF 3 FB VOUT 9 SO 10 RO M1: Infineon SPD09P06PL SPD09P06PL D1: Motorola MBRD360 MBRD360 L1: Coilcraft DO3340P-473 DO3340P-473 Cin1: TBD Cout: Low ESR Tantalum RD 4 8 CRD =100nF Type Ordering Code Package Description TLE 6389 GV on request P-DSO-14 P-DSO-14 adjustable TLE 6389 G50 on request P-DSO-14 P-DSO-14 5V, Device Enable TLE 6389 G50-1 G50-1 on request P-DSO-14 P-DSO-14 5V, SI GND, SI Enable TLE 6389 G33 on request P-DSO-14 P-DSO-14 3.3V, Device Enable TLE 6389 G33-1 G33-1 on request P-DSO-14 P-DSO-14 3.3V, SI GND, SI Enable Functional description The TLE6389 TLE6389 step-down DC-DC switching controllers provide high efficiency over loads ranging from 1mA up to 3A. A unique PWM/PFM control scheme operates with up to a 100% duty cycle, resulting in very low dropout voltage. This control scheme eliminates minimum load requirements and reduces the supply current under light loads to 100µA. These step-down controllers drive an external P-channel MOSFET, allowing design flexibility for applications up to 3A. A high switching frequency (up to 350kHz) and Target Datasheet Rev. 1.7 1 2001-09-17 TLE 6389 operation in continuous-conduction mode allow the use of tiny surface-mount inductors. Output capacitor requirements are also reduced, minimizing PC board area and system costs. The output voltage is preset at 5V (TLE6389-50 TLE6389-50) or 3.3V (TLE6389-33 TLE6389-33) and adjustable for the TLE6389 TLE6389. Input voltages can be up to 60V. Pin Configuration (top view) ENABLE / 1 SI_EN 14 CS FB 2 13 VS 12 GDRV VOUT 3 GND 4 P-D-SO-14 P-D-SO-14 11 BDS SYNC 5 10 RO SI_GND 6 9 SO SI 7 8 RD Pin Definitions and Functions Pin No SO-14 SO-14 Symbol Function 2 FB Feedback Input. 1. For adjustable-output operation connect to an external voltage divider between the output and GND (see the Setting the Output Voltage section). 2. Sense input for fixed 5V or 3.3V output operation. FB is internally connected to an on-chip voltage divider. 3 VOUT VOUT Input. Input for internal supply. Connect to output if variable version is used. For fixed voltage version connect FB and VOUT. 1 ENABLE Active-Low Enable Input. Device is placed in shutdown when Enable is driven low. In shutdown mode, the reference, output, and external MOSFET are turned off. Connect to logic high for normal operation. (TLE6389G50 TLE6389G50, TLE6389G33 TLE6389G33, TLE6389GV TLE6389GV only) Target Datasheet Rev. 1.7 2 2001-09-17 TLE 6389 Pin No SO-14 SO-14 Symbol Function 1 SI_ENA BLE SI Enable Input. SI_GND is switched to high impedance when SI_Enable is low. High level at SI_Enable connects SI_GND to GND via a low impedance path. SO is undefined when SI_Enable is low. (TLE6389G501 TLE6389G501, TLE6389G33-1 TLE6389G33-1 only) 13 VS Supply Input. Bypass with 0.47µF. 4 GND Ground. Analog signal ground. 6 SI_GND SI Ground. Ground connection for SI comparator resistor devider. 11 BDS Buck Driver Supply Input. Connect ceramic capacitor between BDS and VS to generate clamped gate-source voltage to drive the PMOS power stage. 14 CS Current-Sense Input. Connect current-sense resistor between VS and CS. External MOSFET is turned off when the voltage across the resistor equals the current-limit trip level. 12 GDRV Gate Drive Output for External P-Channel MOSFET. GDRV swings between VS and BDS. 10 RO Reset Output. Open drain output from reset comparator with an internal pull up resistor. 8 RD Reset Delay. Connect a capacitor to ground for delay time adjustment. 9 SO Sense Output Comparator. Open drain output from SI comparator with an internal pull up resistor. 7 SI Sense Input Comparator. Input to the Low-Battery Comparator. This input is compared to an internal 1.25V reference. 5 SYNC Input for external synchronization. An external clock signal connected to this pin allows for GDRV switching synchronization. Target Datasheet Rev. 1.7 3 2001-09-17 TLE 6389 1 Item Absolute Maximum Ratings Parameter Symbol Limit Values Unit min. Remarks max. Supply Input 1.0.1 Voltage VS -0.3 60 V 1.0.2 Current IS Current Sense Input 1.0.3 Voltage VCS -0.3 60 V 1.0.4 Current ICS Gate Drive Output 1.0.5 Voltage VGDRV 0.3 6.8 V |VS VGDRV|