TLC254 TLC254A TLC254B TLC254Y TLC25L4 TLC25L4A TLC25L4B TLC25L4Y TLC25M4 - Datasheet Archive

 

TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G ­ JUNE 1983 ­ REVISED MARCH

 

TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 D D D D D D A-Suffix Versions Offer 5-mV VIO B-Suffix Versions Offer 2-mV VIO Wide Range of Supply Voltages 1.4 V to 16 V True Single-Supply Operation Common-Mode Input Voltage Includes the Negative Rail Low Noise . . . 25 nV/Hz Typ at f = 1 kHz (High-Bias Version) D, N, OR PW PACKAGE (TOP VIEW) 1OUT 1IN ­ 1IN + VDD 2IN + 2IN ­ 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN ­ 4IN + VDD ­ /GND 3IN + 2IN ­ 3OUT description symbol (each amplifier) The TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC25L4 TLC25L4, TLC254L4A TLC254L4A, TLC254L4B TLC254L4B, TLC25M4 TLC25M4, TLC25M4A TLC25M4A + IN + and TL25M4B TL25M4B are low-cost, low-power quad OUT operational amplifiers designed to operate with IN ­ ­ single or dual supplies. These devices utilize the Texas Instruments silicon gate LinCMOS process, giving them stable input-offset voltages that are available in selected grades of 2, 5, or 10 mV maximum, very high input impedances, and extremely low input offset and bias currents. Because the input common-mode range extends to the negative rail and the power consumption is extremely low, this series is ideally suited for battery-powered or energy-conserving applications. The series offers operation down to a 1.4-V supply, is stable at unity gain, and has excellent noise characteristics. These devices have internal electrostatic-discharge (ESD) protection circuits that prevent catastrophic failures at voltages up to 2000 V as tested under MIL-STD-883C MIL-STD-883C, Method 3015.1. However, care should be exercised in handling these devices as exposure to ESD may result in degradation of the device parametric performance. Because of the extremely high input impedance and low input bias and offset currents, applications for these devices include many areas that have previously been limited to BIFET and NFET product types. Any circuit using high-impedance elements and requiring small offset errors is a good candidate for cost-effective use of these devices. Many features associated with bipolar technology are available with LinCMOS operational amplifiers without the power penalties of traditional bipolar devices. Available options TA VIOmax AT 25°C PACKAGED DEVICES SMALL OUTLINE (D) PLASTIC DIP (N) TSSOP (PW) CHIP FORM (Y) 10 mV 5 mV 2 mV TLC254CN TLC254CN TLC254ACN TLC254ACN TLC254BCN TLC254BCN TLC254CPW TLC254CPW - - TLC254Y TLC254Y - - 10 mV 5 mV 2 mV TLC25L4CD TLC25L4CD TLC25L4ACD TLC25L4ACD TLC25L2BCD TLC25L2BCD TLC25L4CN TLC25L4CN TLC25L4ACN TLC25L4ACN TLC25L4BCN TLC25L4BCN TLC25L4CPW TLC25L4CPW - - TLC25L4Y TLC25L4Y - - 10 mV 5 mV 2 mV 0°C to 70°C TLC254CD TLC254CD TLC254ACD TLC254ACD TLC254BCD TLC254BCD TLC25M4CD TLC25M4CD TLC25M4ACD TLC25M4ACD TLC25M4BCD TLC25M4BCD TLC25M4CN TLC25M4CN TLC25M4ACN TLC25M4ACN TLC25M4BCN TLC25M4BCN TLC25M4CPW TLC25M4CPW - - TLC25M4Y TLC25M4Y - - The D package is available taped and reeled. Add the suffix R to the device type (e.g., TLC254CDR TLC254CDR). Chips are tested at 25°C. LinCMOS is a trademark of Texas Instruments. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 description (continued) General applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are all easily designed with these devices. Remote and inaccessible equipment applications are possible using their low-voltage and low-power capabilities. These devices are well suited to solve the difficult problems associated with single-battery and solar-cell-powered applications. This series includes devices that are characterized for the commercial temperature range and are available in 14-pin plastic dip and the small-outline packages. The device is also available in chip form. These devices are characterized for operation from 0°C to 70°C. DEVICE FEATURES TLC25L4 TLC25L4_C (LOW BIAS) PARAMETER TLC25M4 TLC25M4_C (MEDIUM BIAS) TLC254 TLC254_C (HIGH BIAS) 40 µA 600 µA 4000 µA 0.04 V/µA 0.6 V/µA 4.5 V/µA 10 mV 5 mV 2 mV 10 mV 5 mV 2 mV 10 mV 5 mV 2 mV 0.1 µV/month 0.1 µV/month 0.1 µV/month 0.7 µV/°C 2 µV/°C 5 µV/°C 1 pA 1 pA 1 pA Input offset current (Typ) 1 pA The long-term drift value applies after the first month. 1 pA 1 pA Supply current (Typ) Slew rate (Typ) Input offset voltage (Max) TLC254C TLC254C, TLC25L4C TLC25L4C, TLC25M4C TLC25M4C TLC254AC TLC254AC, TLC25L4AC TLC25L4AC, TLC25M4AC TLC25M4AC TLC254BC TLC254BC, TLC25L4BC TLC25L4BC, TLC25M4BC TLC25M4BC Offset voltage drift (Typ) Offset voltage temperature coefficient (Typ) Input bias current (Typ) equivalent schematic (each amplifier) VDD IN + ESDProtective Network IN ­ ESDProtective Network OUT VDD ­ /GND 2 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 chip information These chips, when properly assembled, display characteristics similar to the TLC25 TLC25_4C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS VDD (4) (3) + 1IN + 1IN ­ (14) (13) (12) (11) (10) (9) (1) 1OUT (2) ­ (8) (5) + (7) 2OUT (10) 3IN + 2IN ­ (8) ­ 3IN ­ 4OUT ­ + 2IN + 3OUT (9) 68 (6) + (14) ­ (12) (13) 4IN + 4IN ­ (11) VDD­ /GND (1) (2) (3) (4) (5) (6) (7) CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM 108 TJmax = 150°C TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 3 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential input voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Input voltage range (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 0.3 V to 18 V Duration of short-circuit at (or below) 25°C free-air temperature (see Note 3) . . . . . . . . . . . . . . . . . . unlimited Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to VDD ­ /GND. 2. Differential voltages are at IN+, with respect to IN ­. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE TA 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING D 725 mW 5.8 mW/°C 464 mW N 1050 mW 9.2 mW/°C 736 mW PW 700 mW 5.6 mW/°C 448 mW recommended operating conditions MIN Common-mode Common mode input voltage VIC voltage, VDD = 1.4 V VDD = 5 V 16 0 ­ 0.2 · DALLAS, TEXAS 75265 70 V 14 0 POST OFFICE BOX 655303 9 ­ 0.2 VDD = 10 V VDD = 16 V 4 UNIT 0.2 ­ 0.2 Operating free-air temperature, TA 4 MAX 1.4 Supply voltage, VDD V °C electrical characteristics at specified free-air temperature, VDD = 1.4 V (unless otherwise noted) Input offset voltage TLC25 TLC25_4AC TLC25 TLC25 4AC TA MIN TYP TLC25L4 TLC25L4_C MAX MIN TYP TLC25M4 TLC25M4_C MAX MIN TYP MAX 25°C 10 10 12 12 12 IIO POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 aVIO Average temperature coefficient of g input offset voltage Input offset current VO = 0 2 V 0.2 IIB Input bias current VO = 0 2 V 0.2 VICR Common-mode input voltage range VOM Peak output voltage swing AVD Large-signal differential voltage amplification CMRR Common-mode rejection ratio 25°C 5 5 6.5 6.5 2 2 2 3 3 3 0°C to 70°C 25°C to 70°C 1 25°C 1 0°C to 70°C 25°C 1 1 25°C 450 25°C 1 450 60 1 60 60 600 0 to 0.2 700 450 pA pA V 77 60 700 mV 20 20 77 60 300 600 10 60 60 0 to 0.2 700 µV/°C 1 300 60 0 to 0.2 25°C 1 600 25°C VO = 0.2 V, VIC = VICRmin VO = 0.2 V, No load 60 300 0°C to 70°C VID = 100 mV VO = 100 to 300 mV, RS = 50 1 mV V/mV 77 dB IDD Supply current 25°C 600 750 50 68 400 500 µA All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Unless otherwise noted, an output load resistor is connected from the output to ground and has the following value: for low bias, RL = 1 M, for medium bias RL = 100 k, and for high bias RL = 10 k. The output swings to the potential of VDD ­ /GND. PARAMETER SR TEST CONDITIONS See Figure 1 Unity-gain bandwidth AV = 40 dB, RS = 50 , Overshoot factor B1 Slew rate at unity gain See Figure 1 TLC254 TLC254_C MIN TYP TLC25L4 TLC25L4_C MAX MIN TYP TLC25M4 TLC25M4_C MAX MIN TYP MAX UNIT 0.1 CL = 10 pF, See Figure 1 0.001 0.01 V/µs 12 12 12 kHz 30% 35% 35% SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 operating characteristics, VDD = 1.4 V, TA = 25°C TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOSTM QUAD OPERATIONAL AMPLIFIERS TLC25 TLC25 4BC TLC25 TLC25_4BC 5 0°C to 70°C RS = 50 6.5 25°C VO = 0 2 V 0.2 V, UNIT 10 0°C to 70°C TLC25 TLC25_4C TLC25 TLC25 4C VIO TLC254 TLC254_C TEST CONDITIONS PARAMETER 5 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC254 TLC254, TLC254AC TLC254AC, TLC254BC TLC254BC MIN TLC254C TLC254C VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 10 k Input offset voltage 12 25°C TLC254AC TLC254AC VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 10 k VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 10 k 0.9 Full range Full range VIO Average temperature coefficient of input g offset voltage IIO Input offset current (see Note 4) VO = 2 5 V 2.5 V, VIC = 2 5 V 2.5 IIB Input bias current (see Note 4) VO = 2 5 V 2.5 V, VIC = 2 5 V 2.5 0.34 3 18 1.8 25°C 0.1 60 70°C 7 300 25°C 0.6 60 70°C 40 600 Common-mode input voltage range g g (see Note 5) ­ 0.2 to 4 RL = 10 k 3 3.2 3.8 3 3.8 V 0°C Low-level output voltage VID = ­ 100 mV, IOL = 0 0 50 25°C 0 50 70°C VOL 0 50 0°C AVD Large-signal differential voltage L i l diff ti l lt am lification amplification VO = 0.25 V to 2 V, RL = 10 k 4 65 80 60 85 60 94 25°C 65 95 70°C VO = 1.4 V 84 0°C Supply-voltage rejection ratio (VDD/VIO) VDD = 5 V to 10 V, 20 60 60 V/mV 23 4 70°C kSVR 5 25°C VIC = VICRmin 25°C 0°C Common-mode rejection ratio 96 dB dB 0°C Supply current (four amplifiers) VO = 2 5 V 2.5 V, No load VIC = 2 5 V 2.5 V, 3.1 7.2 25°C 2.7 6.4 70°C IDD 2.3 5.2 Full range is 0°C to 70°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 6 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 mV 27 70°C CMRR pA 3.8 25°C pA V ­ 0.2 to 3.5 70°C VID = 100 mV, µV/°C ­ 0.3 to 4.2 0°C High-level output voltage mV 2 25°C to 70°C Full range VOH 5 6.5 25°C 25°C VICR 10 Full range TLC254BC TLC254BC VIO UNIT MAX 1.1 25°C TYP mA TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC254C TLC254C, TLC254AC TLC254AC, TLC254BC TLC254BC MIN VO = 1.4 V, , RS = 50 , TLC254C TLC254C VIC = 0, , RL = 10 k Input offset voltage 12 25°C TLC254AC TLC254AC VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 10 k VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 10 k 0.9 Full range Full range VIO Average temperature coefficient of input g offset voltage IIO Input offset current (see Note 4) VO = 5 V V, VIC = 5 V IIB Input bias current (see Note 4) VO = 5 V V, VIC = 5 V 25°C 0.39 25°C to 70°C 0.1 60 70°C 7 300 25°C 0.7 60 70°C 50 600 ­ 0.2 to 9 ­ 0.3 to 9.2 ­ 0.2 to 8.5 RL = 10 k 7.8 8 8.4 V 0°C Low-level output voltage VID = ­ 100 mV, IOL = 0 0 50 25°C 0 50 70°C VOL 0 50 0°C Large-signal differential voltage L i l diff ti l lt am lification amplification VO = 1 V to 6 V, RL = 10 k 7.5 10 36 7.5 32 0°C kSVR Supply-voltage rejection ratio S l lt j ti ti (VDD/VIO) VDD = 5 V to 10 V, VO = 1.4 V 85 60 88 60 94 25°C 65 95 60 V/mV 88 65 70°C VIC = VICRmin 60 0°C Common-mode rejection ratio 25°C 70°C CMRR mV 42 25°C 70°C AVD pA V 8.5 7.8 pA 8.5 25°C 70°C VID = 100 mV, µV/°C 2 0°C High-level output voltage 2 25°C Common-mode input voltage range g g (see Note 5) mV 3 Full range VOH 5 6.5 25°C VICR 10 Full range TLC254BC TLC254BC VIO UNIT MAX 1.1 25°C TYP dB dB 96 0°C 4.5 8.8 25°C 3.8 8 70°C 3.2 Full range is 0°C to 70°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 6.8 IDD Supply current (four amplifiers) VO = 5 V V, No load POST OFFICE BOX 655303 VIC = 5 V, V · DALLAS, TEXAS 75265 mA 7 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC254C TLC254C, TLC254AC TLC254AC, TLC254BC TLC254BC MIN TYP Slew rate at unity gain RL = 10 k, , See Figure 1 CL = 20 pF, , VI(PP) = 2.5 V ( ) Vn Maximum output-swing bandwidth f = 1 kHz, RS = 20 , VO = VOH, See Figure 1 CL = 20 pF, F See Figure 2 25°C 3.6 70°C 3 3.1 25°C 2.9 2.5 RL = 10 k, k 25°C 340 VI = 10 mV, CL = 20 pF, See Figure 1 2 Phase margin 1.3 47° 25°C MHz 1.7 46° 70°C m CL = 20 pF, pF 25°C 0°C f = B1, kHz 260 70°C VI = 10 mV, mV See Figure 3 nV/Hz 320 0°C Unity-gain bandwidth 25°C 70°C B1 V/µs 25 0°C BOM Equivalent input noise voltage 4 70°C SR VI(PP) = 1 V 0°C 0°C VI(PP) = 1 V UNIT MAX 43° operating characteristics, VDD = 10 V PARAMETER TEST CONDITIONS TA TLC254C TLC254C, TLC254AC TLC254AC, TLC254BC TLC254BC MIN TYP 0°C Slew rate at unity gain RL = 10 k, , See Figure 1 VI(PP) = 5.5 V ( ) Vn Maximum output-swing bandwidth f = 1 kHz, RS = 20 , VO = VOH, See Figure 1 CL = 20 pF, F See Figure 2 5.1 25°C 4.6 3.8 RL = 10 k, k 25°C 25 0°C BOM Equivalent input noise voltage 4.3 0°C CL = 20 pF, , 5.3 70°C SR 5.9 25°C 70°C VI(PP) = 1 V ( ) VI = 10 mV, CL = 20 pF, See Figure 1 25°C 200 8 Phase margin POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2.2 1.8 50° 25°C 49° 70°C m CL = 20 pF, pF 25°C 0°C f = B1, kHz 2.5 70°C VI = 10 mV, mV See Figure 3 nV/Hz 140 0°C Unity-gain bandwidth V/µs 220 70°C B1 UNIT MAX 46° MHz TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC25L4C TLC25L4C TLC25L4AC TLC25L4AC TLC25L4BC TLC25L4BC MIN Input offset voltage VIC = 0, , RL = 1 M TLC25L4AC TLC25L4AC VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 1 M VIC = 0, , RL = 1 M VIO Average temperature coefficient of input g offset voltage IIO Input offset current (see Note 4) VO = 2 5 V 2.5 V, VIC = 2 5 V 2.5 IIB Input bias current (see Note 4) VO = 2 5 V 2.5 V, VIC = 2 5 V 2.5 12 25°C 0.9 25°C 0.24 Full range 3 1.1 11 25°C 0.1 60 70°C 7 300 25°C 0.6 60 70°C 40 600 ­ 0.2 to 4 ­ 0.3 to 4.2 RL = 1 M 3 V 3.2 4.1 3 4.2 V 0°C VOL Low-level output voltage VID = ­ 100 mV, IOL = 0 0 50 25°C 0 50 0 50 70°C 0°C kSVR S l lt j ti ti Supply-voltage rejection ratio (VDD/VIO) VO = 1.4 V 50 380 60 95 65 94 60 95 60 97 25°C 70 98 70°C VDD = 5 V to 10 V, 520 25°C VIC = VICRmin 50 0°C Common-mode rejection ratio RL = 1 M 25°C 70°C CMRR VO = 0.25 V to 2 V, 60 mV 680 0°C Large-signal differential voltage L i l diff ti l lt am lification amplification 50 70°C AVD pA 4.1 25°C 70°C VID = 100 mV, pA V 0°C High-level output voltage µV/°C ­ 0.2 to 3.5 Common-mode input voltage range g g (see Note 5) mV 2 25°C to 70°C Full range VOH 5 6.5 25°C VICR 10 Full range VO = 1.4 V, , RS = 50 , MAX Full range TLC25L4BC TLC25L4BC VIO VO = 1.4 V, , RS = 50 , TYP 1.1 25°C TLC25L4C TLC25L4C UNIT 97 V/mV dB dB 0°C 48 84 25°C 40 68 70°C 31 Full range is 0°C to 70°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 56 IDD Supply current (four amplifiers) VO = 2 5 V 2.5 V, No load POST OFFICE BOX 655303 VIC = 2 5 V 2.5 V, · DALLAS, TEXAS 75265 µA 9 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC25L4C TLC25L4C TLC25L4AC TLC25L4AC TLC25L4BC TLC25L4BC MIN Input offset voltage VIC = 0, , RL = 1 M TLC25L4AC TLC25L4AC VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 1 M VIC = 0, , RL = 1 M VIO Average temperature coefficient of g input offset voltage IIO Input offset current (see Note 4) VO = 5 V V, VIC = 5 V IIB Input bias current (see Note 4) VO = 5 V V, VIC = 5 V =.5 12 25°C 0.9 25°C 0.26 Full range 60 70°C 7 300 25°C 0.7 60 70°C 50 600 ­ 0.2 to 9 ­ 0.3 to 9.2 ­ 0.2 to 8.5 RL = 1 M 7.8 8.9 25°C 8 8.9 7.8 8.9 V VID = ­ 100 mV, IOL = 0 0 50 25°C 0 50 70°C Low-level output voltage 0 50 0°C Common-mode rejection ratio 50 870 50 660 60 97 25°C VIC = VICRmin 25°C 65 97 70°C CMRR RL = 1 M 60 97 0°C kSVR VDD = 5 V to 10 V, Supply current (four amplifiers) VO = 5 V V, No load VO = 1.4 V 60 70 dB 97 60 V/mV 97 25°C 70°C S l lt j ti ti Supply-voltage rejection ratio (VDD/VIO) 98 dB 0°C VIC = 5 V, V 72 132 25°C 57 92 70°C IDD 44 80 Full range is 0°C to 70°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 10 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 mV 1025 0°C VO = 1 V to 6 V, 50 70°C AVD Large-signal diff L i l differential voltage ti l lt am lification amplification pA V 0°C VOL pA V 70°C VID = 100 mV, µV/°C 1 0.1 0°C High-level output voltage 2 25°C Common-mode input voltage range ( g g (see Note 5) mV 3 25°C to 70°C Full range VOH 5 6.5 25°C VICR 10 Full range VO = 1.4 V, , RS = 50 , MAX Full range TLC25L4BC TLC25L4BC VIO VO = 1.4 V, , RS = 50 , TYP 1.1 25°C TLC25L4C TLC25L4C UNIT µA TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC25L4C TLC25L4C TLC25L4AC TLC25L4AC TLC25L4BC TLC25L4BC MIN TYP 0°C SR Slew rate at unity gain RL = 1 M, , See Figure 1 VI(PP) = 2.5 V ( ) 0.03 0.03 0°C CL = 20 pF, , 25°C 0.03 25°C MAX 0.04 70°C VI(PP) = 1 V ( ) UNIT 0.03 70°C 0.02 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 25°C 70 0°C 6 BOM Maximum output-swing bandwidth VO = VOH, See Figure 1 CL = 20 pF, F RL = 1 M, M 25°C V/µs 5 70°C B1 Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 100 25°C 85 70°C VI = 10 mV, mV See Figure 3 f = B1, CL = 20 pF pF, 36° 25°C 34° 70°C Phase margin kHz 65 0°C m kHz 4.5 0°C nV/Hz 30° operating characteristics, VDD = 10 V PARAMETER TEST CONDITIONS TA TLC25L4C TLC25L4C TLC25L4AC TLC25L4AC TLC25L4BC TLC25L4BC MIN TYP 0°C SR Slew rate at unity gain RL = 1 M, , See Figure 1 VI(PP) = 5.5 V ( ) 0.05 0.04 0°C CL = 20 pF, , 0.05 25°C MAX 0.05 25°C 70°C VI(PP) = 1 V ( ) UNIT 0.04 70°C 0.04 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 25°C 70 0°C 1.3 BOM Maximum output-swing bandwidth VO = VOH, See Figure 1 CL = 20 pF, F RL = 1 M, M 25°C 1 70°C V/µs 0.9 0°C Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 110 90 0°C m Phase margin f = B1, POST OFFICE BOX 655303 CL = 20 pF pF, · DALLAS, TEXAS 75265 kHz 40° 25°C 38° 70°C VI = 10 mV, mV See Figure 3 kHz 125 25°C 70°C B1 nV/Hz 34° 11 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC25M4C TLC25M4C TLC25M4AC TLC25M4AC TLC25M4BC TLC25M4BC MIN Input offset voltage VIC = 0, , RL = 100 k TLC25M4AC TLC25M4AC VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 100 k VIC = 0, , RL = 100 k VIO Average temperature coefficient of g input offset voltage IIO Input offset current (see Note 4) VO = 2 5 V 2.5 V, VIC = 2 5 V 2.5 IIB Input bias current (see Note 4) VO = 2 5 V 2.5 V, VIC = 2 5 V 2.5 12 25°C 0.9 25°C 0.25 Full range 3 1.7 17 25°C 0.1 60 70°C 7 300 25°C 0.6 60 70°C 40 600 ­ 0.2 t0 4 ­ 0.3 to 4.2 RL = 100 k 3 V 25°C 3.2 3.9 3 4 V 0°C Low-level output voltage VID = ­ 100 mV, IOL = 0 0 50 25°C 0 50 70°C VOL 0 50 0°C AVD Large-signal differential voltage L i l diff ti l lt am lification amplification VO = 0.25 V to 2 V, RL = 100 k 15 25 140 60 91 65 91 70°C 60 92 0°C kSVR VDD = 5 V to 10 V, Supply current (four amplifiers) VO = 2 5 V 2.5 V, No load VO = 1.4 V 60 70 93 60 dB 92 25°C 70°C S l lt j ti ti Supply-voltage rejection ratio (VDD/VIO) V/mV 170 15 25°C VIC = VICRmin 25°C 0°C Common-mode rejection ratio 94 dB 0°C VIC = 2 5 V 2.5 V, 500 1280 25°C 420 1120 70°C IDD 340 880 Full range is 0°C to 70°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 12 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 mV 200 70°C CMRR pA 3.9 70°C VID = 100 mV, pA V 0°C High-level output voltage µV/°C ­ 0.2 to 3.5 Common-mode input voltage range g g (see Note 5) mV 2 25°C to 70°C Full range VOH 5 6.5 25°C VICR 10 Full range VO = 1.4 V, , RS = 50 , MAX Full range TLC25M4BC TLC25M4BC VIO VO = 1.4 V, , RS = 50 , TYP 1.1 25°C TLC25M4C TLC25M4C UNIT µA TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TLC25M4C TLC25M4C TLC25M4AC TLC25M4AC TLC25M4BC TLC25M4BC MIN Input offset voltage VIC = 0, , RL = 100 k TLC25M4AC TLC25M4AC VO = 1.4 V, , RS = 50 , VIC = 0, , RL = 100 k VIC = 0, , RL = 100 k VIO Average temperature coefficient of input g offset voltage IIO Input offset current (see Note 4) VO = 5 V V, VIC = 5 V IIB Input bias current (see Note 4) VO = 5 V V, VIC = 5 V 12 25°C 0.9 25°C 0.26 Full range 3 2.1 21 25°C 0.1 60 70°C 7 300 25°C 0.7 60 70°C 50 600 ­ 0.2 to 9 0°C ­ 0.3 to 9.2 VID = 100 mV, RL = 100 k 7.8 8.7 25°C 8 8.7 7.8 8.7 V VID = ­ 100 mV, IOL = 0 0 50 25°C 0 50 70°C Low-level output voltage 0 50 0°C AVD Large-signal differential voltage L i l diff ti l lt am lification amplification VO = 1 V to 6 V, RL = 100 k 15 25 230 60 94 65 94 70°C 60 94 0°C Supply-voltage rejection ratio (VDD/VIO) VDD = 5 V to 10 V, VO = 1.4 V 60 70 93 60 dB 92 25°C 70°C kSVR V/mV 275 15 25°C VIC = VICRmin 25°C 0°C Common-mode rejection ratio 94 dB 0°C Supply current (four amplifiers) VO = 5 V V, No load VIC = 5 V, V 690 1600 25°C 570 1200 70°C IDD mV 320 70°C CMRR pA V 0°C VOL pA V 70°C High-level output voltage µV/°C ­ 0.2 to 8.5 Common-mode input voltage range ( g g (see Note 5) mV 2 25°C to 70°C Full range VOH 5 6.5 25°C VICR 10 Full range VO = 1.4 V, , RS = 50 , MAX Full range TLC25M4BC TLC25M4BC VIO VO = 1.4 V, , RS = 50 , TYP 1.1 25°C TLC25M4C TLC25M4C UNIT 440 1120 µA Full range is 0°C to 70°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 13 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC25M4C TLC25M4C TLC25M4AC TLC25M4AC TLC25M4BC TLC25M4BC MIN TYP UNIT MAX 0°C SR Slew rate at unity gain RL = 100 k, , See Figure 1 VI(PP) = 2.5 V ( ) 0.43 V/µs 0.36 0°C CL = 20 pF, , V/µs 25°C 70°C VI(PP) = 1 V 0.46 0.43 25°C 0.40 70°C 0.34 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 25°C 32 0°C 60 BOM Maximum output-swing bandwidth VO = VOH, See Figure 1 CL = 20 pF, F RL = 100 k, k 25°C V/µs 55 70°C Phase margin CL = 20 pF, VI = 10 mV, mV See Figure 3 f = B1, See Figure 1 CL = 20 pF, pF 525 400 41° 25°C 40° 70°C m VI = 10 mV, 25°C 0°C Unity-gain bandwidth 610 70°C B1 kHz 50 0°C nV/Hz 39° kHz operating characteristics, VDD = 10 V PARAMETER TEST CONDITIONS TA TLC25M4C TLC25M4C TLC25M4AC TLC25M4AC TLC25M4BC TLC25M4BC MIN TYP 0°C SR Slew rate at unity gain RL = 100 k, , See Figure 1 VI(PP) = 5.5 V ( ) 0.62 0.51 0°C CL = 20 pF, , 0.61 25°C MAX 0.67 25°C 70°C VI(PP) = 1 V ( ) UNIT 0.56 70°C 0.46 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 , See Figure 2 25°C 32 0°C 40 BOM Maximum output-swing bandwidth VO = VOH, See Figure 1 CL = 20 pF, F RL = 100 k, k 25°C 35 70°C V/µs 30 0°C Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 635 510 0°C 14 Phase margin VI = 10 mV, mV See Figure 3 f = B1, POST OFFICE BOX 655303 CL = 20 pF, pF · DALLAS, TEXAS 75265 44° 25°C 43° 70°C m kHz 710 25°C 70°C B1 nV/Hz 42° kHz TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 electrical characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted) TEST CONDITIONS PARAMETER TLC254Y TLC254Y MIN TLC25L4Y TLC25L4Y TYP 1.1 VO = 1.4 V, VIC = 0 V, RS = 50 , See Note 6 MAX MIN 10 TLC25M4Y TLC25M4Y TYP MAX 1.1 MIN 10 TYP MAX 1.1 10 UNIT VIO Input offset voltage VIO Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = VDD/2, VIC = VDD/2 0.1 60 0.1 60 0.1 60 pA IIB Input bias current (see Note 4) VO = VDD/2, VIC = VDD/2 0.6 60 0.6 60 0.6 60 pA VICR Common-mode input voltage range (see Note 5) VOH High-level output voltage VOL Low-level output voltage AVD Large-signal differential voltage amplification VO = 0.25 V, See Note 6 CMRR Common-mode rejection ratio kSVR IDD 1.8 1.1 mV µV/°C 1.7 ­ 0.2 to 4 VID = 100 mV, RL = 100 k VID = ­ 100 mV, IOL = 0 ­ 0.3 to 4.2 ­ 0.2 to 4 ­ 0.3 to 4.2 ­ 0.2 to 4 ­ 0.3 to 4.2 V 3.2 3.8 3.2 4.1 3.2 3.9 V 0 50 0 50 0 50 mV 5 23 50 520 25 170 V/mV VIC = VICRmin 65 80 65 94 65 91 dB Supply-voltage rejection ratio (VDD/VIO) VDD = 5 V to 10 V, VO = 1.4 V 65 95 70 97 70 93 dB Supply current VO = VDD/2, VIC = VDD/2, No load 2.7 6.4 0.04 0.068 0.42 1.12 mA NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 6. For low-bias mode, RL = 1 M, for medium-bias mode, RL = 100 k, and for high-bias mode, RL = 10 k. operating characteristics, VDD = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TLC254Y TLC254Y MIN TYP TLC25L4Y TLC25L4Y MAX MIN TYP TLC25M4Y TLC25M4Y MAX MIN TYP MAX UNIT SR Slew rate at unity gain CL = 20 pF, , See Note 6 VI(PP) = 1 V VI(PP) = 2.5 V 3.6 0.03 0.43 2.9 0.03 0.40 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 2.5 70 32 nV/Hz BOM Maximum output-swing bandwidth VO = VOH, RL = 10 k CL = 20 pF, 320 5 55 kHz B1 Unity-gain bandwidth VI = 10 mV, CL = 20 pF 1.7 0.085 0.525 MHz m Phase margin f = B1, CL = 20 pF VI = 10 mV, 46° 34° 40° V/µs NOTE 6: For low-bias mode, RL = 1 M, for medium-bias mode, RL = 100 k, and for high-bias mode, RL = 10 k. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 15 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 PARAMETER MEASUREMENT INFORMATION single-supply versus split-supply test circuits Because the TLC25 TLC25_4, TLC25 TLC25_4A, and TLC25 TLC25_4B are optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives the same result. VDD VDD + ­ VO + VI CL ­ VO + VI CL RL RL VDD ­ (b) SPLIT-SUPPLY (a) SINGLE-SUPPLY Figure 1. Unity-Gain Amplifier 2 k 2 k VDD + VDD 20 ­ 1/2 VDD ­ VO + + VO 20 20 20 VDD ­ (a) SINGLE-SUPPLY (b) SPLIT-SUPPLY Figure 2. Noise-Test Circuit 10 k 10 k VDD + VDD 100 VI ­ 1/2 VDD + VO VI 100 ­ + CL CL VDD ­ (a) SINGLE-SUPPLY (b) SPLIT-SUPPLY Figure 3. Gain-of-100 Inverting Amplifier 16 POST OFFICE BOX 655303 VO · DALLAS, TEXAS 75265 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE vs Supply voltage y g vs Free-air temperature vs Frequency 6 vs Frequency 7 High bias vs Frequency 8 Low bias vs Frequency 6 Medium bias vs Frequency 7 High bias Large-signal differential voltage amplification Medium bias vs Frequency 8 Supply current AVD 4 5 Low bias IDD Phase shift SUPPLY CURRENT vs FREE-AIR TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 10000 10000 High-Bias Versions High-Bias Versions xA IICC ­ Supply Current ­ µ A DD xA IICC ­ Supply Current ­ µ A DD VO = VIC = 0.2 VDD No Load TA = 25°C 1000 Medium-Bias Versions 100 Low-Bias Versions 10 VDD = 10 V VIC = 0 VO = 2 V No Load 1000 Medium-Bias Versions 100 Low-Bias Versions 10 0 0 0 2 4 6 8 10 12 14 16 VDD ­ Supply Voltage ­ V 18 20 0 10 20 30 40 50 60 TA ­ Free-Air Temperature ­ °C 70 80 Figure 5 Figure 4 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 17 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 TYPICAL CHARACTERISTICS LOW-BIAS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY VDD = 10 V RL = 1 M TA = 25°C 106 105 0° 30° AVD (left scale) 104 60° 103 102 90° Phase Shift (right scale) Phase Shift AVD ­ Low-Bias Large-Signal Differential AVD Voltage Amplification 107 120° 101 150° 1 180° 0.1 0.1 1 10 100 1k 10 k 100 k Frequency ­ Hz ÁÁ ÁÁ ÁÁ Figure 6 MEDIUM-BIAS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY VDD = 10 V RL = 100 k TA = 25°C 106 105 30° AVD (left scale) 104 60° 103 102 90° Phase Shift (right scale) 120° 101 150° 1 180° 0.1 1 10 100 1k 10 k Frequency ­ Hz 100 k ÁÁ ÁÁ Figure 7 18 0° POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1M Phase Shift AVD ­ Medium-Bias Large-Signal Differential AVD Voltage Amplification 107 TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 TYPICAL CHARACTERISTICS HIGH-BIAS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY VDD = 10 V RL = 10 k TA = 25°C 106 105 0° 30° 104 60° Phase Shift (right scale) 103 90° AVD (left scale) 102 120° 101 150° 1 Phase Shift AVD ­ High-Bias Large-Signal Differential AVD Voltage Amplification 107 180° 0.1 10 100 1k 10 k 100 k 1M 10 M Frequency ­ Hz Figure 8 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 19 ÁÁ ÁÁ TLC254 TLC254, TLC254A TLC254A, TLC254B TLC254B, TLC254Y TLC254Y, TLC25L4 TLC25L4, TLC25L4A TLC25L4A, TLC25L4B TLC25L4B TLC25L4Y TLC25L4Y, TLC25M4 TLC25M4, TLC25M4A TLC25M4A, TLC25M4B TLC25M4B, TLC25M4Y TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS SLOS003G SLOS003G ­ JUNE 1983 ­ REVISED MARCH 2001 APPLICATION INFORMATION latch-up avoidance Junction-isolated CMOS circuits have an inherent parasitic PNPN structure that can function as an SCR. Under certain conditions, this SCR may be triggered into a low-impedance state, resulting in excessive supply current. To avoid such conditions, no voltage greater than 0.3 V beyond the supply rails should be applied to any pin. In general, the operational amplifiers supplies should be established simultaneously with, or before, application of any input signals. output stage considerations The amplifier's output stage consists of a source-follower-connected pullup transistor and an open-drain pulldown transistor. The high-level output voltage (VOH) is virtually independent of the IDD selection and increases with higher values of VDD and reduced output loading. The low-level output voltage (VOL) decreases with reduced output current and higher input common-mode voltage. With no load, VOL is essentially equal to the potential of VDD ­ /GND. supply configurations Even though the TLC25 TLC25_4C series is are characterized for single-supply operation, they can be used effectively in a split-supply configuration if the input common-mode voltage (VICR), output swing (VOL and VOH), and supply voltage limits are not exceeded. circuit layout precautions Whenever extremely high circuit impedances are used, care must be exercised in layout, construction, board cleanliness, and supply filtering to avoid hum and noise pickup as well as excessive dc leakages. 20 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 24-Feb-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLC254ACD TLC254ACD ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU TLC254ACN TLC254ACN ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC254ACNE4 TLC254ACNE4 ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC254BCD TLC254BCD ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU TLC254BCN TLC254BCN ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC254BCNE4 TLC254BCNE4 ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC254CD TLC254CD ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU TLC254CN TLC254CN ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC254CNE4 TLC254CNE4 ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC254ID TLC254ID ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU TLC25L4ACN TLC25L4ACN ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC25L4ACNE4 TLC25L4ACNE4 ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC25L4BCD TLC25L4BCD ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU TLC25L4BCN TLC25L4BCN ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC25L4BCNE4 TLC25L4BCNE4 ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC25L4CD TLC25L4CD ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU TLC25L4CDB TLC25L4CDB OBSOLETE SSOP DB 14 TBD Call TI TLC25L4CN TLC25L4CN ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC25L4CNE4 TLC25L4CNE4 ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC25M4ACDR TLC25M4ACDR PREVIEW SOIC D 14 TBD Call TI Call TI TLC25M4ACN TLC25M4ACN OBSOLETE PDIP N 14 TBD Call TI Call TI TLC25M4BCD TLC25M4BCD OBSOLETE SOIC D 14 TBD Call TI Call TI TLC25M4BCN TLC25M4BCN ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC25M4BCNE4 TLC25M4BCNE4 ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type TLC25M4CD TLC25M4CD ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25M4CDR TLC25M4CDR ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC25M4CN TLC25M4CN ACTIVE PDIP N 14 Pb-Free CU NIPD Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com 24-Feb-2006 Orderable Device Status (1) Package Type Package Drawing TLC25M4CNE4 TLC25M4CNE4 ACTIVE PDIP N Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) (RoHS) 14 Pb-Free (RoHS) CU NIPD N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MSSO002E MSSO002E ­ JANUARY 1995 ­ REVISED DECEMBER 2001 DB (R-PDSO-G*) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°­8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS * 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 MO-150 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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