TEA1110A TEA1110AUH DIP14 TEA1110AT MGG736 MGG735 MGG737 MGD176 MBE783 MBE792 - Datasheet Archive

 

DATA SHEET TEA1110A Low voltage versatile telephone transmission circuit with dialler interface Product specification Supersedes

 

INTEGRATED CIRCUITS DATA SHEET TEA1110A TEA1110A Low voltage versatile telephone transmission circuit with dialler interface Product specification Supersedes data of 1997 Apr 22 File under Integrated Circuits, IC03 2000 Feb 15 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A FEATURES APPLICATION · Low DC line voltage; operates down to 1.6 V (excluding voltage drop over external polarity guard) · Line powered telephone sets, cordless telephones, fax machines, answering machines. · Voltage regulator with adjustable DC voltage · Provides a supply for external circuits GENERAL DESCRIPTION · Symmetrical high impedance inputs (64 k) for dynamic, magnetic or piezo-electric microphones The TEA1110A TEA1110A is a bipolar integrated circuit that performs all speech and line interface functions required in fully electronic telephone sets. It performs electronic switching between speech and dialling. The IC operates at a line voltage down to 1.6 V DC (with reduced performance) to facilitate the use of telephone sets connected in parallel. · Asymmetrical high impedance input (32 k) for electret microphones · DTMF input with confidence tone · MUTE input for pulse or DTMF dialling All statements and values refer to all versions unless otherwise specified. · Receiving amplifier for dynamic, magnetic or piezo-electric earpieces · AGC line loss compensation for microphone and earpiece amplifiers. QUICK REFERENCE DATA Iline = 15 mA; VEE = 0 V; RSLPE = 20 ; AGC pin connected to VEE; Zline = 600 ; f = 1 kHz; Tamb = 25 °C for TEA1110A TEA1110A(T); Tj = 25 °C for TEA1110AUH TEA1110AUH; unless otherwise specified. SYMBOL Iline PARAMETER CONDITIONS MIN. MAX. UNIT normal operation - 140 mA - 11 mA 3.35 line current operating range 3.65 3.95 V 11 with reduced performance 1 VLN TYP. DC line voltage ICC internal current consumption VCC = 2.9 V - 1.1 1.4 mA VCC supply voltage for peripherals IP = 0 mA - 2.9 - V Gvtrx typical voltage gain microphone amplifier (not adjustable) VMIC = 4 mV (RMS) - 43.7 - dB receiving amplifier range VIR = 4 mV (RMS) 19 - 33 dB Gvtrx gain control range for microphone and Iline = 85 mA receiving amplifiers with respect to Iline = 15 mA - 5.9 - dB Gvtrxm gain reduction for microphone and receiving amplifiers - 80 - dB MUTE = LOW ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TEA1110A TEA1110A DIP14 DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 TEA1110AT TEA1110AT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 TEA1110AUH TEA1110AUH 2000 Feb 15 - - bare die; on foil 2 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A BLOCK DIAGRAM GAR handbook, full pagewidth QR 13 IR 7 V 5 DTMF 6 I 14 VCC 1 LN ATT. CURRENT REFERENCE V MIC+ 12 I V MUTE I V I 10 3 REG 9 MIC- AGC CIRCUIT LOW VOLTAGE CIRCUIT 11 8 TEA1110A TEA1110A(T) 2 SLPE VEE AGC MGG736 MGG736 Fig.1 Block diagram. 2000 Feb 15 3 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A PINNING PIN PAD TEA1110A TEA1110A(T) TEA1110AUH TEA1110AUH LN 1 1 positive line terminal SLPE 2 2 slope (DC resistance) adjustment REG 3 3 line voltage regulator decoupling n.c. 4 4 not connected DTMF 5 5 dual-tone multi-frequency input SYMBOL DESCRIPTION MUTE 6 6 mute input to select speech or dialling mode (active LOW) IR 7 7 receiving amplifier input AGC 8 8 automatic gain control/ line loss compensation MIC- 9 9 inverting microphone amplifier input MIC+ 10 10 non-inverting microphone amplifier input VEE 11 11 negative line terminal QR 12 12 earpiece amplifier output GAR 13 13 earpiece amplifier gain adjustment VCC 14 14 supply voltage for internal circuit handbook, halfpage LN 1 14 VCC SLPE 2 13 GAR REG 3 12 QR n.c. 4 TEA1110A TEA1110A(T) 11 VEE DTMF 5 10 MIC+ MUTE 6 9 IR 7 8 AGC MIC- MGG735 MGG735 Fig.2 Pin configuration. 2000 Feb 15 4 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A FUNCTIONAL DESCRIPTION The voltage at pin LN is: All data given in this chapter are typical values, except when otherwise specified. V LN = V ref + R SLPE × I SLPE I SLPE = I line ­ I CC ­ I P ­ I Supply (pins LN, SLPE, VCC and REG) Where: The supply for the TEA1110A TEA1110A and its peripherals is obtained from the telephone line; see Fig.3. Iline = line current ICC = current consumption of the IC The IC generates a stabilized reference voltage (Vref) between pins LN and SLPE. Vref is temperature compensated and can be adjusted by means of an external resistor (RVA). Vref equals 3.35 V and can be increased by connecting RVA between pins REG and SLPE (see Fig.4), or decreased by connecting RVA between pins REG and LN. The voltage at pin REG is used by the internal regulator to generate Vref and is decoupled by CREG, which is connected to VEE. This capacitor, converted into an equivalent inductance (see Section "Set impedance"), realizes the set impedance conversion from its DC value (RSLPE) to its AC value (RCC in the audio-frequency range). The voltage at pin SLPE is proportional to the line current. handbook, full pagewidth Rline IP = supply current for peripheral circuits I* = current consumed between LN and VEE. The preferred value for RSLPE is 20 . Changing RSLPE will affect more than the DC characteristics; it also influences the microphone and DTMF gains, the gain control characteristics, the sidetone level and the maximum output swing on the line. RCC 619 Iline VCC LN 1 14 IP from pre amp Rexch ICC Ish I* CVCC 100 µF peripheral circuits Vd Vexch TEA1110A TEA1110A 2 ISLPE 3 11 SLPE REG VEE CREG RSLPE 20 4.7 µF MGG737 MGG737 Fig.3 Supply configuration. 2000 Feb 15 5 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A Set impedance The internal circuitry of the TEA1110A TEA1110A is supplied from pin VCC. This voltage supply is derived from the line voltage by means of a resistor (RCC) and must be decoupled by a capacitor CVCC. It may also be used to supply peripheral circuits such as dialling or control circuits. The VCC voltage depends on the current consumed by the IC and the peripheral circuits as shown by the formula: V CC = V CC0 ­ R CCint × ( I P ­ I rec ) In the audio frequency range, the dynamic impedance is mainly determined by the RCC resistor. The equivalent impedance of the circuit is illustrated in Fig.7. Microphone amplifier (pins MIC+ and MIC-) The TEA1110A TEA1110A has symmetrical microphone inputs. The input impedance between pins MIC+ and MIC- is 64 k (2 × 32 k). The voltage gain from pins MIC+/MIC- to pin LN is set at 43.7 dB (typ). V CC0 = V LN ­ R CC × I CC (see also Figs 5 and 6). RCCint is the internal equivalent resistance of the voltage supply, and Irec is the current consumed by the output stage of the earpiece amplifier. Automatic gain control is provided on this amplifier for line loss compensation. The DC line current flowing into the set is determined by the exchange supply voltage (Vexch), the feeding bridge resistance (Rexch), the DC resistance of the telephone line (Rline) and the reference voltage (Vref). With line currents below 7.5 mA, the internal reference voltage (generating Vref) is automatically adjusted to a lower value. This means that more sets can operate in parallel with DC line voltages (excluding the polarity guard) down to an absolute minimum voltage of 1.6 V. At currents below 7.5 mA, the circuit has limited sending and receiving levels. This is called the low voltage area. Receiving amplifier (pins IR, GAR and QR) The receiving amplifier has one input (IR) and one output (QR). The input impedance between pin IR and pin VEE is 20 k. The voltage gain from pin IR to pin QR is set at 33 dB (typ). The gain can be decreased by connecting an external resistor RGAR between pins GAR and QR; the adjustment range is 14 dB. Two external capacitors CGAR (connected between GAR and QR) and CGARS (connected between GAR and VEE) ensure stability. The CGAR capacitor provides a first-order low-pass filter. The cut-off frequency corresponds to the time constant CGAR × (RGARint // RGAR). RGARint is the internal resistor which sets the gain with a typical value of 125 k. The condition CGARS = 10 × CGAR must be fulfilled to ensure stability. MGD176 MGD176 6.0 handbook, halfpage The output voltage of the receiving amplifier is specified for continuous wave drive. The maximum output swing depends on the DC line voltage, the RCC resistor, the ICC current consumption of the circuit, the IP current consumption of the peripheral circuits and the load impedance. Vref (V) 5.0 Automatic gain control is provided on this amplifier for line loss compensation. 4.0 Automatic gain control (pin AGC) (1) The TEA1110A TEA1110A performs automatic line loss compensation. The automatic gain control varies the gain of the microphone amplifier and the gain of the receiving amplifier in accordance with the DC line current. The control range is 5.9 dB (which corresponds approximately to a line length of 5 km for a 0.5 mm diameter twisted-pair copper cable with a DC resistance of 176 /km and an average attenuation of 1.2 dB/km). The IC can be used with different configurations of feeding bridge (supply voltage and bridge resistance) by connecting an external resistor RAGC between pins AGC and VEE. (2) 3.0 104 105 106 RVA () 107 (1) Influence of RVA on Vref. (2) Vref without influence of RVA. Fig.4 Reference voltage adjustment by RVA. 2000 Feb 15 6 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface This resistor enables the Istart and Istop line currents to be increased (the ratio between Istart and Istop is not affected by the resistor). The AGC function is disabled when pin AGC is left open-circuit. TEA1110A TEA1110A MBE783 MBE783 2.5 handbook, halfpage IP (mA) 2 Mute function (pin MUTE) The mute function performs the switching between the speech mode and the dialling mode. When MUTE is LOW, the DTMF input is enabled and the microphone and receiving amplifiers inputs are disabled. When MUTE is HIGH, the microphone and receiving amplifiers inputs are enabled while the DTMF input is disabled. A pull-up resistor is included at the input. 1.5 1 (2) 0.5 (1) DTMF amplifier (pin DTMF) When the DTMF amplifier is enabled, dialling tones may be sent on line. These tones can be heard in the earpiece at a low level (confidence tone). 0 0 The TEA1110A TEA1110A has an asymmetrical DTMF input. The input impedance between DTMF and VEE is 20 k. The voltage gain from pin DTMF to pin LN is 25.3 dB. RCCint 2 3 VCC (V) Fig.5 Typical current IP available from VCC for peripheral circuits at Iline = 15 mA. handbook, halfpage LN VCC RP RCC 619 REG VCC RSLPE CREG 20 4.7 µF CVCC 100 µF LEQ VCCO Irec PERIPHERAL CIRCUIT 4 (1) With RVA resistor. (2) Without RVA resistor. The automatic gain control has no effect on the DTMF amplifier. handbook, halfpage 1 Vref IP SLPE MBE792 MBE792 VEE VEE MBE788 MBE788 Leq = CREG × RSLPE × RP. RP = internal resistance. RP = 15.5 k. Fig.7 Fig.6 VCC supply voltage for peripherals. 2000 Feb 15 7 Equivalent impedance between LN and VEE. Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A The anti-sidetone network for the TEA1110A TEA1110A (as shown in Fig.13) attenuates the receiving signal from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. SIDETONE SUPPRESSION The TEA1110A TEA1110A anti-sidetone network comprising RCC//Zline, Rast1, Rast2, Rast3, RSLPE and Zbal (see Fig.8 ) suppresses the transmitted signal in the earpiece. Maximum compensation is obtained when the following conditions are fulfilled: A Wheatstone bridge configuration (see Fig.9) may also be used. R SLPE × R ast1 = R CC × ( R ast2 + R ast3 ) More information on the balancing of an anti-sidetone bridge can be obtained in our publication "Applications Handbook for Wired Telecom Systems, IC03b", order number 9397 750 00811. ( R ast2 × ( R ast3 + R SLPE ) ) k = -( R ast1 × R SLPE ) Z bal = k × Z line The scale factor k is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zbal. In practice, Zline varies considerably with the line type and the line length. Therefore, the value of Zbal should be for an average line length which gives satisfactory sidetone suppression with short and long lines. The suppression also depends on the accuracy of the match between Zbal and the impedance of the average line. LN handbook, full pagewidth Zline RCC Rast1 Im VEE IR Zir Rast2 RSLPE Rast3 SLPE Zbal MBE787 MBE787 Fig.8 Equivalent circuit of TEA1110A TEA1110A family anti-sidetone bridge. 2000 Feb 15 8 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface handbook, full pagewidth TEA1110A TEA1110A LN Zline RCC Zbal Im VEE RSLPE IR Zir Rast1 RA SLPE MBE786 MBE786 Fig.9 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration. 2000 Feb 15 9 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT positive continuous line voltage VEE - 0.4 12 V repetitive line voltage during switch-on or line interruption VLN VEE - 0.4 13.2 V VEE - 0.4 Vn(max) maximum voltage on all pins Iline line current RSLPE = 20 ; - see Figs 10 and 11 Ptot total power dissipation VCC + 0.4 V 140 mA Tamb = 75 °C; see Figs 10 and 11 - 588 mW TEA1110AT TEA1110AT - 384 mW TEA1110AUH TEA1110AUH; note 1 - - mW TEA1110A TEA1110A Tstg storage temperature -40 +125 °C Tamb operating ambient temperature -25 +75 °C Tj junction temperature - +125 °C Note 1. Mostly dependent on the maximum required ambient temperature, on the voltage between LN and SLPE and on the thermal resistance between die ambient temperature. This thermal resistance depends on the application board layout and on the materials used. Figure 12 shows the safe operating area versus this thermal resistance for ambient temperature Tamb = 75 °C HANDLING This device meets class 2 ESD test requirements [Human Body Model (HBM)], in accordance with "MIL STD 883C - method 3015". THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient; mounted on epoxy board 40.1 × 19.1 × 1.5 mm CONDITIONS VALUE UNIT in free air TEA1110A TEA1110A 85 K/W TEA1110AT TEA1110AT 130 K/W tbf by customer in application K/W TEA1110AUH TEA1110AUH 2000 Feb 15 10 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A MBH275 MBH275 150 handbook, halfpage I line (mA) 130 110 (1) 90 (2) (3) 70 (4) 50 30 2 4 6 8 10 12 V LN V SLPE (V) (1) Tamb = 45 °C; Ptot = 0.615 W. (2) Tamb = 55 °C; Ptot = 0.538 W. (3) Tamb = 65 °C; Ptot = 0.461 W. (4) Tamb = 75 °C; Ptot = 0.384 W. Fig.10 SO14 Safe operating area (TEA1110AT TEA1110AT). MGD859 MGD859 150 line (mA) 130 handbook, halfpage I (1) 110 (2) (3) 90 (4) 70 (5) 50 30 2 (1) (2) (3) (4) (5) 4 6 8 Tamb = 35 °C; Ptot = 1.058 W. Tamb = 45 °C; Ptot = 0.941 W. Tamb = 55 °C; Ptot = 0.823 W. Tamb = 65 °C; Ptot = 0.705 W. Tamb = 75 °C; Ptot = 0.588 W. 10 12 VLN_VSLPE(V) Fig.11 DIP14 DIP14 Safe operating area (TEA1110A TEA1110A). 2000 Feb 15 11 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A FCA160 FCA160 160 handbook, full pagewidth I line (mA) (1) 120 (2) (3) (4) 80 (5) (6) (7) 40 0 2 4 6 8 10 12 VSLPE (V) LINE Rth(j-a) (K/W) (1) 40 (2) 50 (3) 60 (4) 75 (5) 90 (6) 105 (7) 130 Fig.12 Safe operating area at Tamb = 75 °C (TEA1110AUH TEA1110AUH). 2000 Feb 15 12 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A CHARACTERISTICS Iline = 15 mA; VEE = 0 V; RSLPE = 20 ; AGC pin connected to VEE; Zline = 600 ; f = 1 kHz; Tamb = 25 °C for TEA1110A TEA1110A(T); Tj = 25 °C for TEA1110AUH TEA1110AUH; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies (pins VLN, VCC, SLPE and REG) Vref stabilized voltage between LN and SLPE VLN DC line voltage 3.1 3.35 3.6 V Iline = 1 mA - 1.6 - V Iline = 4 mA - 2.3 - V Iline = 15 mA 3.35 3.65 3.95 V Iline = 140 mA - - 6.9 V VLN(exR) DC line voltage with an external resistor RVA RVA(SLPE-REG) = 27 k - 4.4 - V VLN(T) DC line voltage variation with temperature referred to 25 °C Tamb = -25 to +75 °C - ±30 - mV ICC internal current consumption VCC = 2.9 V - 1.1 1.4 mA VCC supply voltage for peripherals IP = 0 mA - 2.9 - V RCCint equivalent supply voltage resistance IP = 0.5 mA - 550 620 differential between pins MIC+ and MIC- - 64 - k single-ended between pins MIC+/MIC- and VEE - 32 - k Microphone amplifier (pins MIC+ and MIC-) Zi input impedance Gvtx voltage gain from MIC+/MIC- to LN VMIC = 4 mV (RMS) 42.7 43.7 44.7 dB Gvtx(f) gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz - ±0.2 - dB Gvtx(T) gain variation with temperature referred to 25 °C Tamb = -25 to +75 °C - ±0.3 - dB CMRR common mode rejection ratio VLN(max)(rms) maximum sending signal (RMS value) Vnotx - 80 - dB Iline = 15 mA; THD = 2% 1.4 1.7 - V Iline = 4 mA, THD = 10% - 0.8 - V - -78.5 - noise output voltage at pin LN; pins psophometrically MIC+/MIC- shorted through 200 weighted (P53 curve) dBmp Receiving amplifier (pins IR, QR and GAR) Zi input impedance - 20 - k Gvrx voltage gain from IR to QR VIR = 4 mV (RMS) 32 33 34 dB Gvrx(f) gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz - ±0.2 - dB Gvrx(T) gain variation with temperature referred to 25 °C Tamb = -25 to +75 °C - ±0.3 - dB 2000 Feb 15 13 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface SYMBOL PARAMETER TEA1110A TEA1110A CONDITIONS Gvrxr gain voltage reduction range external resistor connected between GAR and QR Vo(rms) maximum receiving signal (RMS value) MIN. MAX. UNIT noise output voltage at pin QR (RMS value) - 14 dB IP = 0 mA sine wave drive; - RL = 150 ; THD = 2% 0.25 - V IP = 0 mA sine wave drive; - RL = 450 ; THD = 2% Vnorx(rms) - TYP. 0.35 - V Gvrx = 33 dB; IR open-circuit; RL = 150 ; psophometrically weighted (P53 curve) - -87 - dBVp Iline = 85 mA - 5.9 - dB Automatic gain control (pin AGC) Gvtrx gain control range for microphone and receiving amplifiers with respect to Iline = 15 mA Istart highest line current for maximum gain - 23 - mA Istop lowest line current for minimum gain - 56 - mA - 20 - k DTMF amplifier (pin DTMF) Zi input impedance Gvdtmf voltage gain from DTMF to LN VDTMF = 20 mV (RMS); MUTE = LOW 24.1 25.3 26.5 dB Gvdtmf(f) gain variation with frequency referred to 1 kHz f = 300 to 3400 Hz - ±0.2 - dB Gvdtmf(T) gain variation with temperature referred to 25 °C Tamb = -25 to +75 °C - ±0.4 - dB Gvct voltage gain from DTMF to QR (confidence tone) VDTMF = 20 mV (RMS); RL = 150 - -15 - dB Mute function (pin MUTE) VIL VEE - 0.4 - LOW level input voltage VEE + 0.3 V VIH HIGH level input voltage VEE + 1.5 - VCC + 0.4 V IMUTE input current - 1.5 - µA Gvtrxm gain reduction for microphone and receiving amplifiers - 80 - dB 2000 Feb 15 MUTE = LOW 14 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be . a/b VDR 95 V CIR IR 4× BAS11 BAS11 RCC 619 LN QR telephone line Rast2 3.92 k CGAR 100 pF GAR TEA1110A TEA1110A(T) DTMF MIC+ CGARS b/a MUTE SLPE Rast3 15 390 Zbal signal from dial and control circuits MIC- 1 nF BZX79C10 BZX79C10 VCC RSLPE 20 REG AGC VEE CREG 4.7 µF CVCC 100 µF Rpd4 Rpd5 470 k BC558 BC558 470 k supply for peripheral circuits Rpd6 BC547 BC547 BF473 BF473 68 k PD input Philips Semiconductors Rast1 130 k Low voltage versatile telephone transmission circuit with dialler interface APPLICATION INFORMATION handbook, full pagewidth 2000 Feb 15 Rprotect 10 Rpd1 BSN254 BSN254 470 k BC547 BC547 Rlimit BZX79C10 BZX79C10 Rpd2 470 k Rpd3 1 M 3.9 MGG738 MGG738 Product specification TEA1110A TEA1110A Fig.13 Typical application of the TEA1110A TEA1110A in sets with Pulse Dialling or Flash facilities. Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A BONDING PAD LOCATIONS FOR TEA1110AUH TEA1110AUH All x/y coordinates represent the position of the centre of the pad (in µm) with respect to the origin (x/y = 0/0) of the die (see Fig.14). The size of all pads is 80 µm × 80 µm. COORDINATES SYMBOL PAD x y LN 1 123 782 SLPE 2 251 459 REG 3 490.2 459 n.c. 4 685 459 DTMF 5 1174 459 MUTE 6 1450 459 IR 7 1449 664 AGC 8 1449.2 1006.8 MIC- 9 1297 1200 MIC+ 10 1108 1200 VEE 11 678 1200 QR 12 318.2 1200.2 GAR 13 123 1201 VCC 14 123 1017.8 GAR QR VEE 13 handbook, full pagewidth 12 11 VCC MIC- 10 9 14 LN MIC+ 1 8 AGC 7 IR 2 3 4 5 6 SLPE REG n.c. DTMF MUTE x 0,0 y Fig.14 TEA1110AUH TEA1110AUH bonding pad locations. 2000 Feb 15 16 FCA157 FCA157 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A PACKAGE OUTLINES DIP14 DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.2 inches 0.17 0.020 0.13 0.068 0.044 0.021 0.015 0.014 0.009 0.77 0.73 0.26 0.24 0.10 0.30 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC EIAJ SOT27-1 050G04 050G04 MO-001 MO-001 SC-501-14 SC-501-14 2000 Feb 15 17 EUROPEAN PROJECTION ISSUE DATE 95-03-11 99-12-27 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index Lp 1 L 7 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.050 0.028 0.024 0.01 0.01 0.004 0.028 0.012 inches 0.069 0.244 0.039 0.041 0.228 0.016 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 076E06 MS-012 MS-012 2000 Feb 15 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 18 o 8 0o Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. SOLDERING Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). WAVE SOLDERING Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: · Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. Through-hole mount packages SOLDERING BY DIPPING OR BY SOLDER WAVE · For packages with leads on two sides and a pitch (e): The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. ­ larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; ­ smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. The footprint must incorporate solder thieves at the downstream end. · For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Surface mount packages REFLOW SOLDERING Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. MANUAL SOLDERING Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. 2000 Feb 15 TEA1110A TEA1110A 19 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Suitability of IC packages for wave, reflow and dipping soldering methods SOLDERING METHOD MOUNTING PACKAGE WAVE suitable(2) Through-hole mount DBS, DIP, HDIP, SDIP, SIL REFLOW(1) DIPPING - suitable BGA, LFBGA, SQFP, TFBGA not suitable suitable - HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable(3) suitable - PLCC(4), SO, SOJ Surface mount suitable suitable - suitable - suitable - recommended(4)(5) LQFP, QFP, TQFP not SSOP, TSSOP, VSO not recommended(6) Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Feb 15 20 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface TEA1110A TEA1110A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. BARE DIE DISCLAIMER All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There is no post waffle pack testing performed on individual die. Although the most modern processes are utilized for wafer sawing and die pick and place into waffle pack carriers, Philips Semiconductors has no control of third party procedures in the handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. 2000 Feb 15 21 Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface NOTES 2000 Feb 15 22 TEA1110A TEA1110A Philips Semiconductors Product specification Low voltage versatile telephone transmission circuit with dialler interface NOTES 2000 Feb 15 23 TEA1110A TEA1110A Philips Semiconductors ­ a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 403502/03/pp24 Date of release: 2000 Feb 15 Document order number: 9397 750 06724