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TB2173FTG B2173G ICCQ10 - Datasheet Archive
TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic TB2173FTG 2-Source Stereo Headphone Amplifier The TB2173FTG is a stereo
TB2173FTG TB2173FTG TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic TB2173FTG TB2173FTG 2-Source Stereo Headphone Amplifier The TB2173FTG TB2173FTG is a stereo headphone amplifier IC that can accept two sources, developed for portable audio systems. It is particularly ideal for digital portable audio systems having built-in tuners. Features · Accepts headphone amplifier inputs from two sources · Selectable headphone amplifier output: Output coupling or OCL · Incorporates beep circuit Weight: 0.05 g (typ.) · Incorporates power switch (controlled using port or command) · Supports power muting (controlled using port or command) Product indication: B2173G B2173G · Features with single source only (tuner mode): · Electronic volume Provides logic reset feature · Low-frequency boost (with AGC) · Two port expansion circuits · Operating supply voltage range: Ta = 25°C VDD (opr) = 1.8 to 4.5 V VCC1 (opr) = 1.8 to 4.5 V VCC2 (opr) = 0.9 to 4.5 V Note: Use the device with VCC1 greater than or equal to VCC2. · Handle the product with great care because its surge resistance is low. · Ensure that the product is mounted correctly. Otherwise, the product or connected equipment may get damaged or degrade. 1 2005-08-22 TB2173FTG TB2173FTG Block Diagram (OCL Type) Tuner IN Music IN VDD C-Cup OCL VOL PRE PRE VOL PRE C-SW GND IN2A OUTA INA INB OUTB IN2B IN1A IN1B GND 33 32 31 30 29 28 27 26 25 24 23 VDD 36 RESET MCU 37 CK 38 DATA VOL VOL ATT 22 MODE TC ATT 21 MUTE TC BEEP VOL, SW, PORT CONT 34 MUTE SW ON 35 PW SW MODE SW ON 20 BEEP IN 19 VCC1 BIAS 39 STB 18 BIAS IN 17 OUT ADJ 40 VDD BIAS OUT 41 PRE NFA 42 PRE NFB 43 P1 15 BIAS OUT 44 P2 14 LPF1 13 BST NF PORT BIAS OUT 16 RF BST AGC BIAS OUT 12 LPF2 9 10 11 1 2 3 4 5 6 7 8 BEEP OUTA OUTC PW OUTB BEEP VCC2 BST AGC AGC BST OUTA GND OUTB TC DET IN OUT RL RL Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purpose. 2 2005-08-22 TB2173FTG TB2173FTG Pin Functions Pin voltages: Typical quiescent pin voltages in test circuit, VDD = VCC1 = 2.1 V, VCC2 = 1.2 V, Ta = 25°C The equivalent circuit diagrams are intended as an aid for describing circuits; they may be shown in abbreviated or simplified format. Pin No. and Name 1 Function Pin Voltage (V) Internal Equivalent Circuit BEEP OUTA VCC1 Beep signal output 6 1 BEEP OUTB 20 BEEP IN 20 6 Beep signal input VCC2 2 7 OUTA PWA 2 Power amplifier output 0.6 4 5 OUTB 15 k 10 k BIAS OUT 10 k BST2 4 PW GND 11 Power drive stage ground 0 10 k 30 k 7 VCC2 Power drive stage VCC BIAS OUT 10 k 10 k 1.2 BIAS OUT 15 k PWB 5 11 BST OUT Boost amplifier output 0.6 3 2005-08-22 TB2173FTG TB2173FTG Pin No. and Name 3 OUTC Function Pin Voltage (V) Internal Equivalent Circuit 33 Center amplifier output 3 BIAS OUT 33 C-SW 0.6 VCC2 Output application select switch VDD : OCL GND : Output coupling 0.6 PW GND VCC1 8 8 BST TC Pin for reducing boost ON/OFF pop noise to BST SW to BST Amp. 9 10 k VCC1 AGC DET Boost AGC detection 10 AGC IN Boost AGC input The level of the input signal to the BST amplifier is varied according to the input level at this pin. Input impedance: 37 k (typ.) 5 k 9 10 4 BIAS OUT 0.6 32 k 2005-08-22 TB2173FTG TB2173FTG Pin No. and Name Function Internal Equivalent Circuit Pin Voltage (V) BIAS OUT Boost filter pin 2 Cutoff frequency setting 2 for low-frequency boost 20 k 12 LPF2 0.6 12 k Boost amplifier NF Boost filter pin 1 Cutoff frequency setting 1 for low-frequency boost 13 12 50 k 29 BIAS OUT 500 BIAS OUT 0.6 0.6 20 k 14 LPF1 2 k 13 BST NF 60 k to PWA 10 pF 20 k 28 PRE INB 16 k 0.6 5 k Tuner mode: Power amplifier input 41 500 to PWB 41 PRE NFA 10 pF Tuner mode: Power amplifier NF 42 PRE NFB 20 k 28 BIAS OUT 20 k 50 k 29 PRE INA 0.6 16 k 5 k 42 BIAS OUT 14 5 2005-08-22 TB2173FTG TB2173FTG 15 BIAS OUT Function Bias circuit output Ripple filter pin 17 OUT ADJ Output DC voltage adjustment The output bias voltage is set to an optimum value according to the voltage applied to VCC2. 16 VCC1 17 0.6 19 18 Bias circuit input 19 VCC1 1.1 15 VCC other 2 than VDD and VCC2 124 k 18 BIAS IN 0.6 VCC2 94 k 16 RF Pin Voltage (V) Internal Equivalent Circuit 30 k Pin No. and Name 2.1 21 MUTE TC Mute smoothing 34 MUTE SW VCC1 50 k 21 24 k Power mute switch Mute switch for power amplifier. When controlling MUTE SW using a port, specify "0" in a command. In that case, the IC operates as follows according to the port state: High: Mute ON Low: Mute OFF When controlling MUTE SW using a command, drive the port low. 0.6 34 to BUS VCC1 22 Pin for reducing mode change 22 MODE TC pop noise 23 PRE GND to BUS Ground for circuits other than logic and power drive stage 100 k 6 0 2005-08-22 TB2173FTG TB2173FTG Pin No. and Name Function Pin Voltage (V) Internal Equivalent Circuit VCC1 24 IN1B 10 k to ADD OUT 25 25 IN1A BIAS OUT 31 IN2A 27 Input pin 2 The input signal is supplied to the power amplifier through the electronic volume circuit and preamplifier. BIAS OUT 31 0 30 20 k 26 IN2B VOL OUTB Volume output IN2 electronic volume output 30 0.6 1 k 20 k Input pin 1 Input pin with GV = 8dB 0 VOL OUTA 32 GND 35 PW SW Logic ground Power switch IC ON/OFF switch. The switch does not, however, control the electronic volume circuit. When controlling PW SW using a port, specify "1" in a command. In that case, the IC operates as follows according to the port state: High: IC ON Low: IC OFF When controlling PW SW using a command, drive the port high. 2 k 35 to BUS Command reset This pin resets the bus data. High: No reset Low: Reset 40 36 40 VDD VDD 2.1 50 k 36 RESET 0 Logic power supply 200 2.1 7 2005-08-22 TB2173FTG TB2173FTG Pin No. and Name Function 37 CK Data input VDD Clock input 38 DATA 39 STB Pin Voltage (V) Internal Equivalent Circuit 37 200 Strobe input VDD 43 P1 to BUS Port expansion 41 44 P2 8 2005-08-22 TB2173FTG TB2173FTG Functional Description Bus Data Timing Charts 1. Serial Data Specification (initial data is not set.) CK DATA1 Ach DATA2 MODE Bch D1 D2 BST PW SW MUTE D3 D4 P1 D5 P2 D6 NONE NONE AD AD STB l/fck twcH twcL ts th tp Characteristics twl Symbol Min Typ. Max Unit fck 1.0 MHz High-level pulse width twcH 500 nSec Low-level pulse width twcL 500 nSec Data setup time ts 100 nSec Data hold time th 100 nSec Clock frequency STB setup time tp 150 nSec STB pulse width twl1 0.80 µSec (1) Ach/Bch control data: 2 bits (Ach, Bch) Ach Bch Operation 0 0 No volume data set 1 0 Volume data set for Ach only 0 1 Volume data set for Bch only 1 1 Volume data sets for both channels 9 2005-08-22 TB2173FTG TB2173FTG (2) Volume data: 6 bits (D1 to D6) Volume Value D1 D2 D3 D4 D5 D6 Volume Value D1 D2 D3 D4 D5 D6 1 -0.1dB 0 0 0 0 0 0 33 -34.3 0 0 0 0 0 1 2 -2.1 1 0 0 0 0 0 34 -34.7 1 0 0 0 0 1 3 -4.0 0 1 0 0 0 0 35 -35.1 0 1 0 0 0 1 4 -5.5 1 1 0 0 0 0 36 -35.5 1 1 0 0 0 1 5 -6.9 0 0 1 0 0 0 37 -36.0 0 0 1 0 0 1 6 -8.2 1 0 1 0 0 0 38 -36.5 1 0 1 0 0 1 7 -9.6 0 1 1 0 0 0 39 -37.0 0 1 1 0 0 1 8 -10.9 1 1 1 0 0 0 40 -37.6 1 1 1 0 0 1 9 -12.3 0 0 0 1 0 0 41 -38.2 0 0 0 1 0 1 10 -13.6 1 0 0 1 0 0 42 -38.9 1 0 0 1 0 1 11 -14.9 0 1 0 1 0 0 43 -39.6 0 1 0 1 0 1 12 -16.3 1 1 0 1 0 0 44 -40.4 1 1 0 1 0 1 13 -17.6 0 0 1 1 0 0 45 -41.5 0 0 1 1 0 1 14 -19.0 1 0 1 1 0 0 46 -42.7 1 0 1 1 0 1 15 -20.3 0 1 1 1 0 0 47 -43.3 0 1 1 1 0 1 16 -22.1 1 1 1 1 0 0 48 -43.9 1 1 1 1 0 1 17 -23.7 0 0 0 0 1 0 49 -44.7 0 0 0 0 1 1 18 -25.1 1 0 0 0 1 0 50 -45.3 1 0 0 0 1 1 19 -26.6 0 1 0 0 1 0 51 -46.1 0 1 0 0 1 1 20 -27.9 1 1 0 0 1 0 52 -46.9 1 1 0 0 1 1 21 -28.5 0 0 1 0 1 0 53 -47.7 0 0 1 0 1 1 22 -29.1 1 0 1 0 1 0 54 -48.7 1 0 1 0 1 1 23 -29.3 0 1 1 0 1 0 55 -49.9 0 1 1 0 1 1 24 -29.8 1 1 1 0 1 0 56 -51.1 1 1 1 0 1 1 25 -30.5 0 0 0 1 1 0 57 -52.5 0 0 0 1 1 1 26 -30.8 1 0 0 1 1 0 58 -54.4 1 0 0 1 1 1 27 -31.3 0 1 0 1 1 0 59 -56.1 0 1 0 1 1 1 28 -31.7 1 1 0 1 1 0 60 -57.8 1 1 0 1 1 1 29 -32.2 0 0 1 1 1 0 61 -60.0 0 0 1 1 1 1 30 -32.8 1 0 1 1 1 0 62 -63.5 1 0 1 1 1 1 31 -33.2 0 1 1 1 1 0 63 -68.9 0 1 1 1 1 1 32 -33.9 1 1 1 1 1 0 64 -90.0 1 1 1 1 1 1 (3) Identification data: 1 bit (AD) AD Operation 0 (4) Recognized as DATA1 1 Recognized as DATA2 MODE SW data: 1 bit (MODE) MODE Operation 0 Outputs the input signal components for IN2 (tuner mode). 1 Outputs the input signal components for IN1 (music mode). 10 2005-08-22 TB2173FTG TB2173FTG (5) BST SW data: 1 bit (BST) BST Operation 0 (6) Boost OFF 1 Boost ON PW SW: 1 bit (PW SW) PW SW can be controlled using either a command or port, with the following truth table: Port Command 0 (OFF) 0 (OFF) 0 (IC OFF) 0 (OFF) 1 (ON) 0 (IC OFF) 1 (ON) 0 (OFF) 0 (IC OFF) 1 (ON) 1 (ON) 1 (IC ON) (7) Operation MUTE SW: 1 bit (MUTE) MUTE SW can be controlled using either a command or port, with the following truth table: Port Command 0 (OFF) 0 (OFF) 0 (MUTE OFF) 0 (OFF) 1 (ON) 1 (MUTE ON) 1 (ON) 0 (OFF) 1 (MUTE ON) 1 (ON) 1 (ON) 1 (MUTE ON) (8) Operation Power expansion: 1 bit (P1/P2) P1/P2 Operation 0 1 (9) Port Low Port High NONE An invalid bit (10) Strobe data (STB) STB Operation 0 No data write 1 Data write (11) Initial command upon command reset DATA1 Ach Bch D1 D2 D3 D4 D5 D6 AD Initial value 1 1 1 1 1 1 1 1 0 DATA2 MODE BST PW SW MUTE P1 P2 Invalid Invalid AD Initial value 0 0 0 1 1 0 Bit 9 specifies the address. The initial address selected upon a reset is DATA1. Command data is maintained over a power cycle. 11 2005-08-22 TB2173FTG TB2173FTG 2. IC Settings According to Supply Voltage (1) Connecting power supplies The TB2173FTG TB2173FTG supports an end product that uses either one or two batteries. Connect the power supply pins according to the number of batteries, as follows: Microcontroller power supply Battery power supply Single battery VDD, VCC1 VCC2 Two batteries VDD VCC1, VCC2 Note: Use the device with VCC1 greater than or equal to VCC2. (2) Handling the OUT ADJ pin (pin 17) When using a single battery: Jumper OUT ADJ (pin 17) and BIAS IN (pin 18). When using two batteries: Leave OUT ADJ (pin 17) open. Maximum Ratings (Ta = 25°C) Characteristics Symbol VDD DC supply voltage Rating Unit 5.0 V 4.5 V 100 mA VCC VDD Operating supply voltage VCC Power block output current IO (Note 1) Power dissipation PD 350 (Note 2) 1200 mW Operating temperature Topr -25 to 75 °C Storage temperature Tstg -55 to 150 °C Note 1: IC alone: When the IC is used at 25°C or higher, reduce 2.8 mW per 1°C. Note 2: When mounted on Toshiba standard board: When the IC is used at 25°C or higher, reduce 9.6 mW per 1°C. The absolute maximum ratings of a semiconductor device are a set of specified parameter values which must not be exceeded during operation, even for an instant. Exposure to conditions beyond those listed above may cause permanent damage to the device or affect device reliability, which could increase potential risks of personal injury due to IC blowup and/or burning. The equipment manufacturer should design so that no maximum rating value is exceeded with respect to current, voltage, power dissipation, temperature, etc. Ensuring that the parameter values remain within these specified ranges during device operation will help to ensure that the integrity of the device is not compromised. 12 2005-08-22 TB2173FTG TB2173FTG Electrical Characteristics (VDD = VCC1 = 2.1 V, VCC2 = 1.2 V, Rg = 600 , RL = 16 , f = 1 kHz, OCL mode, Ta = 25°C, SW3: b, SW4: a, unless otherwise specified) Music mode Input: IN1, Output: OUT, SW1: a Tuner mode Input: PRE IN, Output: OUT, SW2: a Electronic volume Input: IN2, Output: VOL OUT Characteristics Symbol Test Condition Min Typ. Max Unit ICCQ1 5 µA Standby (VCC1, VCC2) 5 µA ICCQ3 Mute ON: Music mode (VCC1), SW3: a 0.6 1.0 mA ICCQ4 Mute ON: Music mode (VCC2), SW3: a 0.3 0.6 mA ICCQ5 Mute ON: Music mode (VCC1), SW3: a 0.6 1.0 mA ICCQ6 Mute ON: Music mode (VCC2), SW3: a 0.3 0.6 mA ICCQ7 No signal: Music mode (VCC1) 0.9 1.4 mA ICCQ8 No signal: Music mode (VCC2) 0.7 1.4 mA ICCQ9 No signal: Music mode (VCC1) 0.9 1.4 mA ICCQ10 ICCQ10 No signal: Music mode (VCC2) 0.8 1.6 mA ICCD1 0.1 mW2ch/16 (VCC1) 1.0 mA ICCD2 Driving current ICCQ2 Quiescent current Standby (VDD), SW4: b 0.1 mW2ch/16 (VCC2) 4.5 mA 8 9.5 dB GV1 Vo = -20dBV 6.5 Channel balance CB1 Vo = -20dBV -1.5 0 +1.5 dB Output power Music mode Voltage gain Po1 THD = 10% 7 9.5 mW Total harmonics distortion THD1 Po = 1 mW 0.2 0.5 % Output noise voltage Vno1 Rg = 600 , IHF-A, SW1: b -98 -92 dBV Interchannel crosstalk CT1 Vo = -20dBV -32 -38 dB Intermode crosstalk CT2 Vo = -20dBV, monitor: music -45 -51 dB RR1 fr = 100Hz, Vr = -20dBV, injected to VCC1 -70 -85 dB Ripple rejection ratio RR2 fr = 100Hz, Vr = -20dBV, injected to VCC2 -60 -75 dB Mute attenuation ATT1 Vo = -20dBV, SW3: b a -100 -120 dB Voltage gain GV2 Vo = -20dBV 22.5 24 25.5 dB Channel balance CB2 Vo = -20dBV -1.5 0 +1.5 dB Po2 THD = 10% 7 9.5 mW Total harmonics distortion THD2 Po = 1 mW 0.2 0.5 % Output noise voltage Vno2 Rg = 600 , IHF-A, SW2: b -90 -84 dBV Interchannel crosstalk CT3 Vo = -20dBV -27 -33 dB Intermode crosstalk CT4 Vo = -20dBV, monitor: tuner -39 -45 dB RR3 fr = 100 Hz, Vr = -20dBV, injected to VCC1 -58 -73 dB Tuner mode Output power Ripple rejection ratio RR4 Boost fr = 100 Hz, Vr = -20dBV, injected to VCC2 -43 -58 dB ATT2 Vo = -20dBV -95 -115 dB BST1 Mute attenuation f = 100 Hz, Vo = -20dBV 1.5 4.5 7.5 dB BST2 f = 100 Hz, Vo = -30dBV 8.5 11.5 14.5 dB BST3 f = 100 Hz, Vo = -50dBV 9.5 12.5 15.5 dB 13 2005-08-22 TB2173FTG TB2173FTG Characteristics Symbol Test Condition Min Typ. Max Unit 250 320 mVrms ATT Vo = -10dBV -3.0 0 +3.0 dB Channel balance CB3 Vo = -10dBV -1.5 0 +1.5 dB Maximum attenuation ATT Vo = -10dBV -80 -90 dB Bus operating frequency Electronic volume THD = 1% Attenuation error fopr 1 MHz Maximum input level Vim VIH CK, DATA, STB, and RESET input pins VDD × 0.75 VDD V Low level VIL CK, DATA, STB, and RESET input pins 0 VDD × 0.25 V Input leakage current ILI VIH: VDD, VIL: 0 V ±1 µA Port expansion driving current Logic High level IOL VOL: 0.3 V 1.0 mA IOH VOH: VDD-0.3 V -1.0 mA Input voltage Beep output level VBEEP -55 SW3: a -50 -45 dBV VDD V PW SW pin ON voltage V35 (ON) VDD × 0.8 PW SW pin OFF voltage V35 (OFF) 0 VDD × 0.2 V MUTE SW pin ON voltage V34(ON) VDD × 0.8 VDD V MUTE SW pin OFF voltage V34 (OFF) 0 VDD × 0.2 V 14 2005-08-22 TB2173FTG TB2173FTG (a) SW4 620 1 µF 26 IN2B 1 µF 27 VOL OUTB Rg = 620 28 PRE INB 1 µF 29 PRE INA 620 Rg = 620 Rg = 620 620 0.47 µF 50 k 34 MUTE SW 31 30 IN2A VOL OUTA (a) (b) (b) SW1b SW1a 25 IN1A 24 IN1B 23 PRE GND MODE TC 22 35 PW SW MUTE TC 21 36 RESET BEEP 20 37 CK (b) VCC1 19 MCU 38 DATA BIAS IN 18 TB2173FTG TB2173FTG 2.2 µF RF 16 4.7 µF 41 PRE NFA BIAS OUT 15 10 µF 42 PRE NFB LPF1 14 0.22 µF BST NF 13 2.2 µF 43 P1 44 P2 BEEP OUTA OUTA OUTC 1 2 3 RL PW GND 4 BEEP OUTB OUTB VCC2 5 6 7 RL 15 BST TC AGC DET AGC IN 8 9 BIAS OUT LPF2 12 0.22 µF BST OUT 10 0.47 µF 4.7 µF 40 VDD 1 µF 4.7 µF 0.22 µF OUT ADJ 17 10 µF BIAS OUT 10 µF 39 STB BIAS OUT 0.47 µF 10 µF (b) 0.47 µF (a) SW3 32 GND (a) 0.47 µF 33 C-SW VDD 1 µF VDD (a) (b) (b) SW2b SW2a 50 k 0.47 µF Rg = 620 (a) 620 Rg = 620 Rg = 620 Test Circuit Diagram 11 1 µF 2005-08-22 TB2173FTG TB2173FTG Example Application Circuit 1 (1.5-V OCL) 32 GND 34 MUTE SW 31 30 IN2A VOL OUTA 29 PRE INA 0.47 µF 28 PRE INB 27 VOL OUTB 1 µF 33 C-SW VDD 0.47 µF 1 µF VDD Music IN 1 µF 1 µF Tuner IN 26 IN2B 25 IN1A 24 IN1B 23 PRE GND MODE TC 22 MUTE TC 21 36 RESET BEEP 20 37 CK VCC1 19 MCU 38 DATA BIAS IN 18 TB2173FTG TB2173FTG RF 16 4.7 µF 41 PRE NFA BIAS OUT 15 10 µF 42 PRE NFB LPF1 14 0.22 µF BST NF 13 2.2 µF 43 P1 44 P2 BEEP OUTA OUTA OUTC 1 2 3 RL PW GND 4 BEEP OUTB OUTB VCC2 5 6 7 RL 16 BST TC AGC DET AGC IN 8 9 BIAS OUT LPF2 12 0.22 µF BST OUT 10 0.47 µF 4.7 µF 40 VDD 1 µF BIAS OUT 4.7 µF 2.2 µF OUT ADJ 17 10 µF BIAS OUT 10 µF 39 STB 0.22 µF 10 µF 35 PW SW 0.47 µF 11 1 µF 2005-08-22 TB2173FTG TB2173FTG Example Application Circuit 2 (3-V output coupling, without low-frequency boost) 34 MUTE SW 31 30 IN2A VOL OUTA 29 PRE INA 28 PRE INB 27 VOL OUTB 1 µF 32 GND 0.47 µF 1 µF 33 C-SW VDD 0.47 µF Music IN 1 µF 1 µF Tuner IN 26 IN2B 25 IN1A 24 IN1B 23 PRE GND MODE TC 22 MUTE TC 21 36 RESET BEEP 20 37 CK VCC1 19 MCU 38 DATA BIAS IN 18 TB2173FTG TB2173FTG 4.7 µF 41 PRE NFA BIAS OUT 15 10 µF 42 PRE NFB LPF1 14 43 P1 BST NF 13 44 P2 BEEP OUTA OUTA OUTC 1 2 RL 3 PW GND 4 BEEP OUTB OUTB VCC2 5 6 7 10 µF 4.7 µF RF 16 220 µF BIAS OUT 4.7 µF 2.2 µF OUT ADJ 17 40 VDD 220 µF BIAS OUT 10 µF 39 STB 0.22 µF 10 µF 35 PW SW 0.47 µF BST TC AGC DET AGC IN 8 9 10 BIAS OUT LPF2 12 BST OUT 11 BIAS OUT RL 17 2005-08-22 TB2173FTG TB2173FTG Package Dimensions Weight: 0.05 g (typ.) 18 2005-08-22 TB2173FTG TB2173FTG 19 2005-08-22