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Part Manufacturer Description Datasheet BUY
LTC1290DCSW#TR Linear Technology LTC1290 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy
LTC1294BCSW Linear Technology LTC1294 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy
LTC1290DISW Linear Technology LTC1290 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC1290BISW#PBF Linear Technology LTC1290 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC1290DCSW#TRPBF Linear Technology LTC1290 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy
LTC1293DCSW#PBF Linear Technology LTC1293 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 16; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy

TA11 chip

Catalog Datasheet MFG & Type PDF Document Tags

DTC30LM35

Abstract: TD13 Support VGA, SVGA, XGA, SXGA, SXGA+ and QXGA On Chip Input Jitter Filtering Up to 1.05Gbytes/sec bandwidth , /Single-out, Distribution Off, MODE=HH, MODE2=L) LVDS Output Data TA10 TA11 TA12 TA13 TA14 TA15 TA16 , /Single-out, Distribution On, MODE=HH, MODE2=H) LVDS Output Data (1'st Link) TA10 TA11 TA12 TA13 TA14 , >=HL, MODE2=H or L, MODE3=H or Open, SWAP=L) LVDS Output Data (1'st Link) TA10 TA11 TA12 TA13 TA14 , >=HL, MODE2=H or L, MODE3=L, SWAP=L) LVDS Output Data (1'st Link) TA10 TA11 TA12 TA13 TA14 TA15 TA16
DOESTEK
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TA141

Abstract: diode td13 ) Power down mode. 6) Package TQFP100V Applications Flat Plane Display Precaution This chip is not , -1 TA13-1 TA12-1 TA11-1 TA10-1 TA16 TA15 TA14 TA13 TA12 TA11 TA10 TA16+1 TB1+/- , Data LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 , Link LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 , Link 1st Pixel Data LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12
ROHM
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BU7988KVT TA141 diode td13 TD-101 g171 TA22 12057EAT05 150MH 112MH 224MH 4150MH

TA141

Abstract: TB-141 ) Power down mode. 6) Package TQFP100V Applications Flat Plane Display Precaution This chip is not , -1 TA13-1 TA12-1 TA11-1 TA10-1 TA16 TA15 TA14 TA13 TA12 TA11 TA10 TA16+1 TB1+/- , Data LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 , Link LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 , Link 1st Pixel Data LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12
ROHM
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TB-141 HSYNC, VSYNC, DE 8112MH R1120A

BU7988KVT

Abstract: DIODE B12 51 . Package TQFP100V Applications Flat Plane Display Precaution This chip is not designed to protect , MAP=L Input Pin Name TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 , Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 TC10 , +1 TA11 R13 R11 TA21 R13+1 R11+1 TA12 R14 R12 TA22 R14+1 R12+1 TA13 , R10 TA11 R13 R11 TA12 R14 R12 TA13 R15 R13 TA14 R16 R14 TA15
ROHM
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DIODE B12 51 TQFP100V Package diode b22 B12 68 diode TA10 TA12 R20R27 B20B27 G20G27 B10B17 G10G17 R10R17

diode td15

Abstract: DIODE B12 51 TQFP100V Applications Flat Plane Display Precaution This chip is not designed to protect from , Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 TC10 , ) (Input Pin Name) (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 , Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 TC10 TC11 TC12 TC13 , Link LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14
ROHM
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diode td15

ACM-C

Abstract: ACMC High Enable Byte Low Enable Write Output Enable Chip Select DLE GND 1 3 5 7 9 1 1 13 , TA10 TA11 Target Ground TA12 TA13 TA14 TA15 TA16 TA17 TA18 TA19 TA20 TA21 TA22 TA23 1
TechTools
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ACM-C ACMC JP13 JP15 TA11 chip TA8-TA

schottky barrier diode b22

Abstract: g17g TQFP100V Applications Flat Plane Display Precaution This chip is not designed to protect from , Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 TC10 , ) (Input Pin Name) (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 , Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 TC10 TC11 TC12 TC13 , Link LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14
ROHM
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schottky barrier diode b22 g17g R1010A

b26 diode

Abstract: Diode Mark B14 TQFP100V Applications Flat Plane Display Precaution This chip is not designed to protect from , Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 TC10 , ) (Input Pin Name) (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 , Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 TC10 TC11 TC12 TC13 , Link LVDS Output Data (1st Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14
ROHM
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b26 diode Diode Mark B14

DIODE B12 51

Abstract: diode td15 . Package TQFP100V Applications Flat Plane Display Precaution This chip is not designed to protect , MAP=L Input Pin Name TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 , Pixel Data) TA10 TA11 TA12 TA13 TA14 TA15 TA16 TB10 TB11 TB12 TB13 TB14 TB15 TB16 TC10 , +1 TA11 R13 R11 TA21 R13+1 R11+1 TA12 R14 R12 TA22 R14+1 R12+1 TA13 , R10 TA11 R13 R11 TA12 R14 R12 TA13 R15 R13 TA14 R16 R14 TA15
ROHM
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LVDS Serializer B10B20 B12 2N DIODE Diode Mark ON B14 b12 diode DIODE B12

VL82C483

Abstract: intel 16k 8bit RAM chip CYM7450 CYM7451 PRELIMINARY 128K/256K Cache Module for VLSI VL82C483 Chip Set Features D D D D D D D D Functional Description 128 Kbyte (CYM7450 ) or 256 Kbyte (CYM7451 , VLSI VL82C483 chip set Zerowaitstate operations at 33 MHz Constructed using costeffective CMOS , function as the secondary cache in Intel 486based systems with the VLSI VL82C483 chip set. Each module , TA9 TA10 54 118 TA11 TA12 55 119 TA13 TA14 56 120 TA15 TA16
Cypress Semiconductor
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CYM7450PB-20C intel 16k 8bit RAM chip TA17- 04 VL82C48 TDQ3 ea3a ca3a CYM7451PB-20C 38-M-00066

msp430x5

Abstract: 696-8 from a single cell SR60 battery. The capability to correct the on chip high frequency oscillator output , / ACTSEN/CMP 2 I/O VSS/GND P3.4/TA0.1/TA1.1/TA1.0/TA1.CCI2A2 3 4 Power I/O P3.5/TA0.1/TA1.1 , .1N/TA0.2N/ TA1.CCI1A3/ TA1.1/BOR/ACTSEN/LFOSC/CP18OK 7 I/O P3.7/ TA0.0/TA0.1/TA0.2/TA0.0N/TA0.1N/TA0.2N/ TA1.CCI2A1/HFOSC/LCDCPCLK/ LCDFCLK/ 1KCLK/LCDCMP 8 I/O VDDIO TCK/P2.0/TA1.2/TA1.1 , digital I/O Timer0_A3 Out2 output Timer1_A3 Out2 output ACLK output Analog Test Multiplexer Out SPI Chip
Texas Instruments
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MSP430L110 msp430x5 696-8 diode SR60 SLAU321 SLAS839

msp430x5

Abstract: SLLSE48 capability to correct the on chip high frequency oscillator output facilitates the generation and measurement , /GND P3.4/TA0.1/TA1.1/TA1.0/TA1.CCI2A2 3 4 Power I/O P3.5/TA0.1/TA1.1/TA1.0/TA1.CCI2A3 5 I/O RST/NMI/SVMOUT 6 I/O P3.6/ TA0.0/TA0.1/TA0.2/TA0.0N/TA0.1N/TA0.2N/ TA1.CCI1A3/ TA1.1 , /LCDCPCLK/ LCDFCLK/ 1KCLK/LCDCMP 8 I/O VDDIO TCK/P2.0/TA1.2/TA1.1/CxOUT 9 10 Power I/O (1 , Out2 output ACLK output Analog Test Multiplexer Out SPI Chip Select General-purpose digital I/O
Texas Instruments
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AFE4110 SLLSE48 TA-02N

GD404

Abstract: intel bios chip 8 pin detail V NOVEMBER 1991 AT(ISA) Bus Master Interface Chip for Intel 82596 Ethernet Controller ^ -5 ^ -3 3 , SECTION 1 Table of Contents Section 1 Introduction General Description Chip Block Diagram (Fig. 2 , adapters that use the Intel 82596 Ethernet Controller Chip. Adapters which use the AT 9020 and the 82596 , FUNCTIONS The AT 9020 is a 128 pin plastic QFP CMOS bus master interface chip. AT 9020 major functions include: 1. Master Control Signal Protocol Converter. The chip converts all the handshakes of the 82596 to
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OCR Scan
GD404 intel bios chip 8 pin detail A23-A17 9020 AT9020

82385

Abstract: intel 80386 block diagram Cache Schemes â  Two WE and two OE control pins â  Two BE pins for byte control â  Chip Enable , and 128KB cache schemes. With 128K-bit memory density and built-in Chip Enable, four V63C330 chips can , the on-chip address logic as follows: MODE = 0, A0-A12 same as chip address inputs MODE = 1, A12 always grounded, others same as chip address inputs Two V63C330 chips may be used to provide 32KB of , the chip. Address A12 is not latched with ALEN, allowing it to be used as the unlatched least
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OCR Scan
82385 intel 80386 block diagram pin configuration of intel 80386 intel 82385 INTEL 80386 25 cache memory OF intel 80386 128K-
Abstract: 3 CA15 CA17 NC GND TA05 TA07 TA09 TA11 TA13 TA15 TA17 NC GND TD1 TD3 TD5 TD7 Vcc , Chip Enable (CE) Access Time Output Enable (OE) Access Time Output Hold from Address Change Chip Enable to Output in Low Z Chip Disable to Output in High Z Output Enable to Output in Low Z Output Disable to Output in High Z Chip Enable to Power Up lime Chip Disable to Power Down Time lRC lAA , , Ta = 0 to +70°C) Parameter Write Cycle Time Chip Enable to Write End Address Set-up to Write End -
OCR Scan
AS7M32D256 128/256KB CA3ACA04-17 CD08-15 TA04-17

M30624FGAFP

Abstract: M30833FJFP devices can either use only the address lines or combine them with 4 chip select signals to access external memory. An important point to note for this issue is, that the locations of the chip select , 48; Port4.6 Pin 49; Port4.5 Pin 50; Port4.4 Table 2: Chip select signal differences Compared , INT1IC INT2IC TBSR TA11 TA21 TA41 INVC0 INVC1 IDB0 IDB1 Deleted Changed M32C/83 Bits , INT1IC INT2IC TBSR TA11 TA21 TA41 INVC0 INVC1 IDB0 IDB1 X Deleted Changed C C C C C
Mitsubishi
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M30624FGAFP M30833FJFP M32C EWM16C ocm32 KD308 M16C/62A EDEC-MCU-02-002-01

M30624FGAFP

Abstract: M30833FJFP devices can either use only the address lines or combine them with 4 chip select signals to access external memory. An important point to note for this issue is, that the locations of the chip select , 48; Port4.6 Pin 49; Port4.5 Pin 50; Port4.4 Table 2: Chip select signal differences Compared , INT1IC INT2IC TBSR TA11 TA21 TA41 INVC0 INVC1 IDB0 IDB1 Deleted Changed M32C/83 Bits , INT1IC INT2IC TBSR TA11 TA21 TA41 INVC0 INVC1 IDB0 IDB1 X Deleted Changed C C C C C
Mitsubishi
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USART code examples

TA2025

Abstract: TA17- 04 PF1046-01 E0C37120 Multifunction Buffer IC s DESCRIPTION The E0C37120 is a multifunction buffer IC suitable for use as a PCMCIA interface buffer and 3.3V5V conversion level shifter. Because it enables a multi-chip buffer IC to be integrated into a single chip, this product helps you miniaturize your system. The E0C37120 is designed to be particularly effective when it is used with the E0C37109 , TA6 TA7 TA8 TA9 TA10 TA11 TA12 TA13 TA14 TA15 TA16 TA17 TA18 TVcc Vss TA19 TA20 TA21
Seiko Epson
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TA2025 sa2025 IC a210 SD015 SA20 TA20 QFP15-100
Abstract: TAOS TA07 TA09 TA11 TA13 TA1S NC NC GND TD1 TD3 TD5 TD7 Vcc AS7M32D128 A , Time Chip Enable (CE) Access Time Output Enable (OE) Access lim e Output Hold from Address Change Chip Enable to Output in Low Z -2 0 Cache Tag Cache Min Max Min Max Min Max Min Max â , '" 3 â'" 3 â'" Chip Disable to Output in High Z Output Enable to Output in Low Z tcHZ Output Disable to Output in High Z Chip Enable to Power Up Time Chip Disable to Power Down Time tOHZ -
OCR Scan
AS7M32DI28 CA02-I TA04-16-

IDT7MP6122

Abstract: 7MP6121 Address Inputs Cache Data Inputs/Outputs Bank A Byte Chip Select Inputs Bank B Byte Chip Select Inputs , Dirty Bit Input/Output Tag/Dirty Chip Select Input T a g W rite E n a b le In p u t TA6 TAB T A 10 TA 1 2 TA 14 TA7 TA9 TA11 TA13 TA15 T A 17 Dirty Bit Write Enable Input Presence Detect Pins
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OCR Scan
IDT7MP6122 7MP6121 intel I486 processor D5PF7 128KB/256KB 486TM IDT7MP6121 IDT7MP6121/22
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