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Vishay Siliconix N-Channel 30-V (D-S) MOSFET with Schottky Diode CHARACTERISTICS · N-Channel Vertical DMOS · Macro
SPICE Device Model Si4638DY Si4638DY Vishay Siliconix N-Channel 30-V (D-S) MOSFET with Schottky Diode CHARACTERISTICS · N-Channel Vertical DMOS · Macro Model (Subcircuit Model) · Level 3 MOS · Apply for both Linear and Switching Application · Accurate over the - 55 °C to 125 °C Temperature Range · Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics DESCRIPTION The attached spice model describes the typical electrical characteristics of the N-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C to 125 °C temperature ranges under the pulsed 0 V to 10 V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 64355 S-82172 S-82172 Rev. A, 15-Sep-08 www.vishay.com 1 SPICE Device Model Si4638DY Si4638DY Vishay Siliconix SPECIFICATIONS (TJ = 25 °C UNLESS OTHERWISE NOTED) Symbol Test Condition Simulated Data Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 A 1.9 Drain-Source On-State Resistancea RDS(on) VGS = 10 V, ID = 15 A 0.0056 0.0054 VGS = 4.5 V, ID = 10 A 0.0069 0.0065 Parameter Measured Data Unit Static V Forward Transconductancea gfs VDS = 15 V, ID = 15 A 76 74 S Body Diode Voltage VSD IS = 2 A 0.41 0.42 V 4110 4190 622 620 b Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance VDS = 15 V, VGS = 0 V, f = 1 MHz Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd 214 225 VDS = 15 V, VGS = 10 V, ID = 10 A 58 66.5 28 27.5 VDS = 15 V, VGS = 4.5 V, ID = 10 A 11.5 11.5 7 pF 7 nC Notes a. Pulse test; pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. www.vishay.com 2 Document Number: 64355 S-82172-Rev. A, 15-Sep-08 SPICE Device Model Si4638DY Si4638DY Vishay Siliconix COMPARISON OF MODEL WITH MEASURED DATA (TJ = 25 °C UNLESS OTHERWISE NOTED) Document Number: 64355 S-82172 S-82172 Rev. A, 15-Sep-08 www.vishay.com 3 SPICE Device Model Si4638DY Si4638DY Vishay Siliconix COMPARISON OF MODEL WITH MEASURED DATA (TJ = 25 °C UNLESS OTHERWISE NOTED) www.vishay.com 4 Document Number: 64355 S-82172-Rev. A, 15-Sep-08