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STS-12 Datasheet

Part Manufacturer Description PDF Type
STS121PC Tyco Electronics SLIDE SWITCH SPDT TOP SLIDER 300mA 125VAC Original
STS121PC (5-1437577-8) Tyco Electronics Slide Switches; STS121PC=4261210 ( Alcoswitch ) Original
STS121PC (5-1437577-8) Tyco Electronics Slide Switches; STS121PC=4261210 ( Alcoswitch ) Scan
STS121RA Tyco Electronics Slide Switches, Switches, SWITCH SLIDE 2POS R/A BLACK T/H Original
STS121RA (5-1437577-9) Tyco Electronics Slide Switches; STS121RA=4261211 ( Alcoswitch ) Original
STS121RA (5-1437577-9) Tyco Electronics Slide Switches; STS121RA=4261211 ( Alcoswitch ) Scan
STS123 AUK NPN Silicon Transistor Original
STS124 AUK TRANS GP BJT PNP 12V 1A 3TO-92 Original
STS12CFRM Altera SONET-SDH STS-12c-STM-4 Framer MegaCore Function (STS12CFRM) Original
STS12CFRM Altera SONET-SDH STS-12c-STM-4 Framer MegaCore Function (STS12CFRM) Data Sheet Original
STS12N3LLH5 STMicroelectronics FETs - Single, Discrete Semiconductor Products, MOSFET N-CH 30V 12A 8-SOIC Original
STS12NF30L STMicroelectronics FETs - Single, Discrete Semiconductor Products, MOSFET N-CH 30V 12A 8-SOIC Original
STS12NF30L STMicroelectronics N-CHANNEL 30V - 0.008 ? - 12A SO-8 STRIPFET II POWER MOSFET Original
STS12NF30L STMicroelectronics N-Channel 30 V - 0.008 ohm - 12 A SO-8 STripFET II Power MOSFET Original
STS12NF30L STMicroelectronics N - CHANNEL 30V - 0.0085Ohm - 12A SO-8 STripFET POWER MOSFET Original
STS12NF30L STMicroelectronics N-channel 30V - 0.008ohm - 12A SO-8 STripFET II Power MOSFET Original
STS12NH3LL STMicroelectronics N-channel 30 V - 0.008 O- 12 A - SO-8 ultra low gate charge STripFET Power MOSFET Original
STS12NH3LL STMicroelectronics N-channel 30V - 0.008ohm - 12A - SO-8 Ultra low gate charge STripFET TM Power MOSFET Original
STS12NH3LL STMicroelectronics N-CHANNEL 30 V - 0.008 ? - 12 A SO-8 ULTRA LOW GATE CHARGE STripFET MOSFET Original

STS-12

Catalog Datasheet MFG & Type PDF Document Tags

8 pin ic a817

Abstract: q819 XRT94L43FAQ Frequently Asked Questions regarding the XRT94L43 12Channel DS3/E3/STS-1 to STS-12/STM , /E3/STS-1 TO STS-12/STM-4 MAPPER IC 1 XRT94L43FAQ Frequently Asked Questions regarding the XRT94L43 12Channel DS3/E3/STS-1 to STS-12/STM-4 Mapper IC Preliminary August 15, 2006 Table of , XRT94L43FAQ Frequently Asked Questions regarding the XRT94L43 12Channel DS3/E3/STS-1 to STS-12/STM-4 Mapper , ? . 46 Q3.14: How are the individual DS3, E3 or STS-1 Channels mapped into an STS-12 signal
Exar
Original
8 pin ic a817 q819 GR-253-CORE q817 a88 die he no t6270 STS-12/STM-4 12-CHANNEL REFCLK34 REFCLK45 REFCLK51 368MH

91L31

Abstract: XRT91L31 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER OCTOBER 2007 REV. 1.0.0 GENERAL DESCRIPTION The XRT91L31 is a fully integrated SONET/SDH transceiver for SONET/SDH 622.08 Mbps STS-12/ STM , Switch/Routers · DSLAMS · SONET/SDH Test Equipment · DWDM Termination Equipment STS-12/STM-4 or STS , Road, Fremont CA, 94538 · (510) 668-7000 · FAX (510) 668-7017 · www.exar.com STS-12/STS-3 CDRREFSEL PIO_CTRL RLOOPS DLOOP ALOOP Reset XRT91L31 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH
Exar
Original
91L31 STS-12/
Abstract: XRT91L31 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER JULY 2008 REV. 1.0.2 GENERAL DESCRIPTION The XRT91L31 is a fully integrated SONET/SDH transceiver for SONET/SDH 622.08 Mbps STS-12/ STM , Switch/Routers · DSLAMS · SONET/SDH Test Equipment · DWDM Termination Equipment STS-12/STM-4 or STS , CA, 94538 · (510) 668-7000 · FAX (510) 668-7017 · www.exar.com STS-12/STS-3 CDRREFSEL LOOPTIME PIO_CTRL RLOOPS DLOOP ALOOP Reset XRT91L31 STS-12/STM-4 OR STS-3/STM-1 SONET Exar
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OC-12/3 XRT91L31IQ-F XRT91L31IQ QFP64

91L31

Abstract: capacitor 102 STM xr XRT91L31 Preliminary STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER DEC 2006 REV , 622.08 Mbps STS-12/ STM-4 or 155.52 Mbps STS-3/STM-1 applications. The transceiver includes an on-chip , DIAGRAM OF XRT91L31 STS-12/STM-4 or STS-3/STM-1 TRANSCEIVER PISO (Parallel Input Serial Output , CMUFREQSEL LOSEXT DLOSDIS Clock Control OOF FRAMEPULSE LOOPTIME Reset STS-12/STS , www.exar.com XRT91L31 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER xr REV. 1.0.2 FEATURES ·
Exar
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capacitor 102 STM GR-253 P1596

VSC8115

Abstract: and data recovery for 622.08Mb/s (STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1) NRZ data · , Data is Retimed at the Output · Active High Signal Detect LVPECL Input STS-12/STS-3 Multi Rate Clock , 622.08Mb/s (STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1). After the clock is recovered, the data is , or LVPECL signals to facilitate a low-jitter and low power interface. VSC8115 Block Diagram STS12 , SEMICONDUCTOR CORPORATION STS-12/STS-3 Multi Rate Clock and Data Recovery Unit Target Specification
Vitesse Semiconductor
Original
STS-12/OC-12/STM-4 STS-12/STS-3 G52272-0 VSC8115YA VSC8115YA1 VSC8115YA2

GR-1400-CORE

Abstract: cdr 03a .5 Groups within 4 x STS-12 Backplane Signals Column Aligning Path Termination and Generation of STS-1 Traffic Performance Monitoring 4 x 622 Mb/s STS-12 LVDS Backplane Interface Inputs with Integrated CDR and Realignment Interface to a Large-scale VT1.5 Crossconnect. Two 4 x 622 Mb/s STS-12 LVDS , VSC9188 receives four serial STS-12 622 Mb/s signals from a VSC9186 10Gb/s Pointer Processor or VSC9182 , crossconnect. The four processed serial STS-12 622 Mb/s signals are duplicated on working and protection STS-12
Vitesse Semiconductor
Original
GR-1400-CORE VSC9187 cdr 03a DS12O DS12I DL12O GR-1400

TO-48C

Abstract: 2.5G DWDm mix of sixteen STS-12/STM-4 and STS-3/STM-1 MUX/DEMUX with full framer functionality including , demultiplex ingress direction, TethysTM 448 accepts either sixteen STS-48/ STM-16, or a mix of sixteen STS-12 , Test Equipment TethysTM 448 Features Provides serial STS-48/STM-16, STS-12/STM-4 or STS-3/STM , STS-2c, 3c, 4c, . to 48c Supports auto-detection of concatenation streams STS-3c/STM-1, STS-12c , ­ P-FCHBGA-1397 TOH/POH Drop STS-48 #1 - #4 STS-12 #1 - #4 Alarm Drop 4 x STS
Infineon Technologies
Original
TO-48C 2.5G DWDm to48c 2.5G PEB1756E STM-12/STM-4

GR-253

Abstract: XRT9 block diagram of the XRT91L33A. FIGURE 1. BLOCK DIAGRAM OF XRT91L33A STS12_MODE REFCK 19.44 MHz , 6 STS12_MODE SIGD 15 7 REFCK RXDOP 14 8 LCKTOREFN RXDON 13 9 , the VCO has drifted away from the local reference clock, REFCK, by more than +/- 500 ppm STS12_MODE , PLL operating frequency corresponding to the desired data rate. For 622.08 Mbps signal STS12_MODE is set HIGH and for 155.52 Mbps, STS12_MODE is set LOW. 2.5 Signal Detection XRT91L33A has two
Exar
Original
XRT9 OC-12/STS-12

50033a

Abstract: TAN-9130 xr XRT91L32 PRELIMINARY STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER NOVEMBER 2006 , /SDH 622.08 Mbps STS-12/ STM-4 or 155.52 Mbps STS-3/STM-1 applications. The transceiver includes an , DIAGRAM OF XRT91L32 XRT91L32 STS-12/STM-4 or STS-3/STM-1 TRANSCEIVER PISO (Parallel Input Serial , Reset STS-12/STS-3 CAP2N CAP2P CAP1N CAP1P PIO_CTRL Clock Control Loop Filters , ) 668-7017 · www.exar.com XRT91L32 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER xr REV. 1.0.2
Exar
Original
50033a TAN-9130 STM-430 Stm-1 d15180 XRT91L32IQ-F

OTU1

Abstract: VSC9180 Quad STS-12/STM-4 Outputs Operating at 622 Mb/s (Interleave Mode) 4Clear Channel Non-SONET/SDH , Serial 2.5GHz Output 4Parallel Loopback also Allows Quad STS-12/STM-4 Retime, Realign, and Loopback Output 4Retimes Four Serial STS-12/STM-4 Inputs and Deskews up to +/- 3 Bytes of Skew using the A1/A2 , STS-12/STM-4 Inputs to Create an STS-48 like Signal 4Onboard Discrete CMU and CRU to Accommodate , . (Non Interleave mode). Alternatively it can recover four serial It is designed to serialize four STS-12
Vitesse Semiconductor
Original
VSC9180 VSC918X OTU1 155MH 622MH 416-B

STM-1e

Abstract: Selection Guide . 7 2.2 STS-12/STM-4 to/from DS0/E0 Application . 8 2.3 STS-12/STM-4 to/from DS1/E1 Application . 9 2.4 STS-12/STM-4 to/from DS3/E3 Application . 10 2.5 STS-12/STM-4 to/from DSE/E3 TransMUX Application , . 17 2.12 STS-12/STM-4 Transport (Mixed DS3/E3 and DS1/E1) Application
Agere Systems
Original
STM-1e Selection Guide TSOT042G TFRA84J131BL-21 TMXA846221BL-21 TMXF846221BL-21 DS03-188MPIC-1 DS03-188MPIC

TAN-9132

Abstract: capacitor 102 STM xr XRT91L32 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER JUNE 2007 REV. 1.0.3 , STS-12/ STM-4 or 155.52 Mbps STS-3/STM-1 applications. The transceiver includes an on-chip Clock , DIAGRAM OF XRT91L32 XRT91L32 STS-12/STM-4 or STS-3/STM-1 TRANSCEIVER PISO (Parallel Input Serial , Reset STS-12/STS-3 CAP2N CAP2P CAP1N CAP1P CDRDIS Clock Control Loop Filters , ) 668-7017 · www.exar.com XRT91L32 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER xr REV. 1.0.3
Exar
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TAN-9132

XRT91L30IQ

Abstract: GR-253 XRT91L30 JUNE 2007 Rev. 1.0.2 STS-12/STM-4 or STS-3/STM-1 SONET/SDH TRANSCEIVER Network & Transmission Products XRT91L30 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER NOTES: II REV. 1.0.2 XRT91L30 REV. 1.0.2 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER TABLE OF CONTENTS , . 12 1.1 STS-12/STM-4 AND STS-3/STM-1 MODE OF OPERATION , . 14 TABLE 4: RECEIVE HIGH-SPEED SERIAL DATA INPUT TIMING (STS-12/STM-4 OPERATION
Exar
Original
XRT91L30IQ optical receiver datasheet STM 1 optical transceiver datasheet STM 1 serial to parallel data converter of 23 pins Cross Reference to Exar
Abstract: clock HiPerClockSâ"¢ signal from a NRZ-coded STM-4 (OC-12/STS-12) or STM-1 (OC-3/STS-3) input data , . â'¢ Clock recovery for STM-4 (OC-12/STS-12) and STM-1 (OC-3/STS-3) â'¢ â'¢ Input: NRZ , CAP VDDA DATA_IN nDATA_IN GND_PLL LOCK_DET STS12 REF_CLK nCAP DATA_IN Pulldown , nCLK_OUT ICS894D115I-04 DATA_OUT 0 nDATA_OUT REF_CLK Pulldown 1 CLK_OUT STS12 Pulldown , STM-4 (OC-12/STS-12) or STM-1 (OC-3/STS-3) input data signals. The output signals are the recovered Integrated Device Technology
Original
OC-12/STM-4 ICS894D115I-01 ICS894D115AGI-04

VSC8115

Abstract: VSC8115YA2 VITESSE SEMICONDUCTOR CORPORATION Target Specification STS-12/STS-3 Multi Rate Clock and Data Recovery Unit VSC8115 Features · Performs clock and data recovery for 622.08Mb/s (STS-12/OC , NRZ data operating at 622.08Mb/s (STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1). After the , interface. VSC8115 Block Diagram STS12 Divider CAP+ CAPVCO Phase/ BYPASS DATAIN+/- 2 , STS-12/STS-3 Multi Rate Clock and Data Recovery Unit Target Specification VSC8115 Functional
Vitesse Semiconductor
Original

24C024

Abstract: RD237 . 67 3.9.1.3 Example 3: 8 bit × 77.76 MHz STM-4/STS-12 DROP Bus Carrying AU-4-4c/STS-12c , . 73 3.9.2.3 Example 3: 8 bit × 77.76 MHz STM-4/STS-12 ADD Bus Carrying AU-4-4c/STS-12c , Intel® WB1510 SDH/SONET 2 × STM-4/STS-12 or STM-1/STS-3 Framer Datasheet Order Number , -4/STS-12 or STM-1/STS-3 Framer may contain design defects or errors known as errata which may cause the , .22 3.1.1 STM-4/STS-12 LVDS Termination
Intel
Original
24C024 RD237 298029 STM-4/STS-12 5/99-064R2 5/99-066R1 5/00-126R2 5/00-129R1

FM TRANSMITTER CIRCUIT DIAGRAM

Abstract: ML53301 Optical Network (SONET) processing standard. The physical layer supports the STS-12/STS-12c 622 Mbps SONET/SDH format. The STS-12 mode of operation supports four separate STS-3c (155 Mbps) channels. STS-12c , a frame scrambler. The transmit framer generates the actual STS-12 or STS-12c frame from ATM cells , enabled in STS-12 mode. Only one processor is enabled in STS-12c mode. The processor delineates data , bytes) H1 Pointer STS-12 mode: First four bytes are 0x62. Remaining 8 bytes = 0x93. STS-12c mode
-
OCR Scan
FM TRANSMITTER CIRCUIT DIAGRAM ML53301 atm header-error-check multiple bit cell broadband single LOAD CELL UTOPIA-11 ML53301-98-08-12 STS-12/12
Abstract: xr XRT91L30 PRELIMINARY STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER OCTOBER 2005 , SONET/SDH 622.08 Mbps STS-12/ STM-4 or 155.52 Mbps STS-3/STM-1 applications. The transceiver includes , Termination Equipment FIGURE 1. BLOCK DIAGRAM OF XRT91L30 STS-12/STM-4 or STS-3/STM-1 TRANSCEIVER 8x9 , OOF FRAMEPULSE ALOOP DLOOP RLOOPS LOOPTIME Reset STS-12/STS-3 CAP2N CAP2P , XRT91L30 PRELIMINARY STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER xr REV. P1.0.7 FEATURES Exar
Original

TAN-9130

Abstract: XRT91L30IQ-F xr DECEMBER 2006 XRT91L30 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER REV. 1.0.1 , STS-12/ STM-4 or 155.52 Mbps STS-3/STM-1 applications. The transceiver includes an on-chip Clock , STS-12/STM-4 or STS-3/STM-1 TRANSCEIVER TXDI[7:0] 8 TXPCLK_IO REFCLKP/N TTLREFCLK PISO , Corporation 48720 Kato Road, Fremont CA, 94538 · (510) 668-7000 · FAX (510) 668-7017 · www.exar.com STS-12/STS-3 CDRREFSEL LOOPTIME PIO_CTRL RLOOPS DLOOP ALOOP Reset XRT91L30 STS-12
Exar
Original
XRT91L30IQ-F user manual of XRT91L31 optical transceiver STM 1

m9845

Abstract: CHESS FIGURE 17: SELECTING AN OUTPUT STS-12 DATA-STREAM . 32 , six different devices: 3.1.1 SPECTRA-2488 The SPECTRA-2488 is an STS-48 (2.488 Gbps) or 4 x STS-12 , 'S GUIDE 3.1.2 SPECTRA-622 The SPECTRA-622 is an STS-12 (622.08 Mbps) channelized SONET/SDH framer , SPECTRA-2488, and includes STS-12 clock/data recovery as well as 12 x DS3 mappers. 3.1.3 SPECTRA , MHz TeleCombus data-paths to an 8B/10B encoded STS-12 serial link (777.6 MHz), thereby supporting an
PMC-Sierra
Original
PMC-1991797 PM5372 PM7390-BI PM5372-BI PM5310-BI PM5316-BI m9845 CHESS marking PM5316 MACH48 CB924102A M9845

CX950

Abstract: Remote Controller with nine functions rx CX29610 OptiPHYTM - M622 STS-12/4x STS-3 SONET/SDH Multiplexer Data Sheet 500243A March 2002 , reference. 500243A Mindspeed TechnologiesTM CX29610 OptiPHYTM - M622 STS-12/4x STS-3 SONET/SDH , multiplexer/demultiplexer functions for a single STS-12/STM-4 data stream or four STS-3/STM-1 data streams , · · Processes combinations of STS-12, STS-3 payload framing/multiplexing for: ­ 1x STS-12/STM , Processor SRxData_1[7:0] POH SI-BUS STS-12 IF Interface to PECL Port 1
Mindspeed Technologies
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CX29610-12P CX950 Remote Controller with nine functions rx MPC860 STS-12/4 T1S1/92-185 3C-183 1-800-521-CORE PHYTM-M622

144K64

Abstract: SLC-96 Mode Defined LOPOH 6 High-Speed IF 622 Mb/STS-12/STM-4 155 Mb/STS-3/STM-1 Clock and Data 8 TMUX Clock/Sync 6 Protection Link 622 Mb/STS-12/STM-4 155 Mb/STS-3/STM-1 Clock and Data 8 STS-12/ STM , loss-of-clock (LOC) detection. s Provides STS-12/STM-4/STS-3/STM-1/STS-1 selectable scrambler/descrambler functions. s Provides STS-12/STM-4/STS-3/STM-1/STS-1, and B1/B2/B3 generation/detection. s Provides STS-12/STM-1/STS-3/STM-1/STS-1 pointer interpretation. s Complies with GR
Agere Systems
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TMXF84622 144K64 SLC-96 Mode Defined e2 framer g742 lucent m12 timing receiver GR-253 J0 byte length 14 E2 liu 84/X63 DS02-085BBAC-1 DS02-085BBAC

G832

Abstract: sd 832 xr PRELIMINARY XRT94L43 SONET/SDH STS-12/STM-4 TO E3/DS3/STS-1 MAPPER/DEMAPPER SEPTEMBER , /DS3/STS-1 mapping/demapping functions from either the STS-12 or STM-4 data stream. The XRT94L43 interfaces to either STS12 or STM-4 signals using a byte wide parallel interface in Telecom Bus format or via , tributaries. · Performs STS-3/STM-1 to STS-12/STM-4 Mapping/De-Mapping. · E3 and DS3 framers for both , Telcordia and ITU standards. · Complete Path Overhead processing and generation for one STS-12 or for 12
Exar
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G832 sd 832 XRT94L43IB 94L43
Abstract: High-Speed IF 8 TMUX Clock/Sync 6 Protection Link 622 Mb/STS-12/STM-4 155 Mb/STS-3/STM-1 Clock and Data 8 STS-12/ STM-4/ STS-3/ STM-1 STSPP (x3) 24 6 5 JTAG IF MPU 49 , Mb/STS-12/STM-4 155 Mb/STS-3/STM-1 Clock and Data 6 Power and GND pins not shown 2 TOAC , 2.1 DS0/E0 Switching Application Figure 2 and Figure 3 show an 8064 DS0 channel to STS-12/STM-4 configuration. The following points describe this scenario: s The application assumes STS-12/STM-4 is mapped Agere Systems
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