NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
STL20NM20N L20NM20N - Datasheet Archive
N-CHANNEL 200V - 0.11 - 20A PowerFLATTM ULTRA LOW GATE CHARGE MDmeshTM II MOSFET TARGET DATA TYPE STL20NM20N s s s s s s s s VDSS
STL20NM20N STL20NM20N N-CHANNEL 200V - 0.11 - 20A PowerFLATTM ULTRA LOW GATE CHARGE MDmeshTM II MOSFET TARGET DATA TYPE STL20NM20N STL20NM20N s s s s s s s s VDSS RDS(on) ID 200 V < 0.13 20 A WORLDWIDE LOWEST GATE CHARGE TYPICAL RDS(on) = 0.11 IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE (1mm MAX) VERY LOW THERMAL RESISTANCE LOW GATE RESISTANCE LOW INPUT CAPACITANCE HIGH dv/dt and AVALANCHE CAPABILITIES DESCRIPTION This 200V MOSFET with a new advanced layout brings all unique advantages of MDmesh technology to lower voltages. The device exhibits worldwide lowest gate charge for any given on-resistance.Its use is therefore ideal as primary switch in isolated DC-DC converters for Telecom and Computer applications.Used in combination with secondary-side low-voltage STripFETTM products, it contributes to reducing losses and boosting efficiency.The new PowerFLATTM package allows a significant reduction in board space without compromising performance. PowerFLATTM(6x5) (Chip Scale Package) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS The MDmeshTM family is very suitable for increasing power density allowing system miniaturization and higher efficiencies ORDERING INFORMATION SALES TYPE MARKING PACKAGE PACKAGING STL20NM20N STL20NM20N L20NM20N L20NM20N PowerFLAT TUBE June 2003 1/6 STL20NM20N STL20NM20N ABSOLUTE MAXIMUM RATINGS Symbol VDS Parameter Value Unit Drain-source Voltage (VGS = 0) 200 V V Drain-gate Voltage (RGS = 20 k) 200 VGS Gate- source Voltage ± 30 V ID (2) Drain Current (continuous) at TC = 25°C (Steady State) Drain Current (continuous) at TC = 100°C 20 12.5 A A Drain Current (pulsed) 80 A PTOT (2) Total Dissipation at TC = 25°C (Steady State) 2.5 W PTOT (4) Total Dissipation at TC = 25°C (Steady State) 80 W 0.02 W/°C 10 V/ns VDGR IDM (3) Derating Factor (2) dv/dt (5) Peak Diode Recovery voltage slope THERMAL DATA Symbol Rthj-F Parameter Typ. Rthj-amb (2) Thermal Resistance Junction-ambient Tj Tstg Max. Max. Operating Junction Temperature °C/W 50 35 Unit 1.56 Thermal Resistance Junction-Foot (Drain) °C/W 55 to 150 Storage Temperature °C AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter TBD A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 35 V) TBD mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) ON/OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 1 mA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) IGSS Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-source On Resistance VGS = 10 V, ID = 2 A 2/6 Typ. VGS = ± 30 V VGS(th) Min. VDS = Max Rating VDS = Max Rating, TC = 125 °C V(BR)DSS Max. 200 Unit V 1 10 ±100 3.5 µA µA nA 4.2 5 V 0.11 0.13 STL20NM20N STL20NM20N ELECTRICAL CHARACTERISTICS (CONTINUED) DYNAMIC Symbol gfs (6) Ciss Coss Crss Coss eq. (*) RG Parameter Test Conditions Min. Typ. Max. Unit Forward Transconductance VDS = 15 V, ID = 2 A 1.4 S Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, f = 1 MHz, VGS = 0 670 180 12 pF pF pF Equivalent Output Capacitance VGS = 0V, VDS = 0V to 400V TBD pF Gate Input Resistance f = 1 MHz Gate DC Bias = 0 Test Signal Level = 20 mV Open Drain TBD (*) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS SWITCHING ON Symbol Parameter Test Conditions td(on) tr Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Typ. Max. Unit TBD TBD VDD = 160 V, ID = 4 A, VGS = 10 V ns ns 19 3.5 11 VDD = 100 V, ID = 2 A RG = 4.7 VGS = 10 V (see test circuit, Figure 3) Qg Qgs Qgd Min. nC nC nC SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-Voltage RiseTime Fall Time Cross-Over Time Test Conditions Min. VDD = 100 V, ID = 2 A, RG = 4.7, VGS = 10 V (see test circuit, Figure 3) Typ. Max. TBD TBD TBD Unit ns ns ns SOURCE DRAIN DIODE Symbol Max. Unit Source-drain Current 20 A ISDM (3) Source-drain Current (pulsed) 80 A VSD (6) Forward On Voltage ISD = 2 A, VGS = 0 1.3 V Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 2 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 25°C (see test circuit, Figure 5) 89 300 6.5 ns nC A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 2 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 150°C (see test circuit, Figure 3) TBD TBD TBD ns nC A ISD trr Qrr IRRM trr Qrr IRRM Note: 1. 2. 3. 4. 5. 6. Parameter Test Conditions Min. Typ. Current Limited by Package. The value is rated according to Rthj-F. When Mounted on FR-4 Board of 1inch2, 2 oz Cu Pulse width limited by safe operating area The value is rated according to Rthj-F. ISD 20A, di/dt 400A/µs, VDD V(BR)DSS, TJ T JMAX Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 3/6 STL20NM20N STL20NM20N Fig. 1: Switching Times Test Circuit For Resistive Load Fig. 3: Test Circuit For Diode Recovery Behaviour 4/6 Fig. 2: Gate Charge test Circuit STL20NM20N STL20NM20N PowerFLATTM(6x5) MECHANICAL DATA mm. DIM. MIN. A MAX. MIN. 1.00 0.80 A1 b TYP inch 0.031 0.02 0.35 TYP. MAX. 0.039 0.001 0.47 0.014 0.018 C 1.61 0.063 D 5.00 0.197 D2 4.15 E E2 4.25 0.163 6.00 3.55 0.167 0.236 3.65 0.140 0.144 e 1.27 0.049 F 1.99 0.078 G 2.20 0.086 H 0.40 0.015 I 0.219 0.0086 L 0.70 0.90 0.028 0.035 5/6 STL20NM20N STL20NM20N Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 6/6