STCC02-BD5 DIP-16 IEC61000-4 STCC02 DIL-16 IEC61000-4-X IEC61000-4-4 1N4002 - Datasheet Archive

 

® CONTROL CIRCUIT FOR HOME APPLIANCE MCU BASED APPLICATION APPLICATIONS Microwaves oven analog and power driver control Home

 

STCC02-BD5 STCC02-BD5 ® CONTROL CIRCUIT FOR HOME APPLIANCE MCU BASED APPLICATION APPLICATIONS Microwaves oven analog and power driver control Home Appliance digital control FEATURES Wide range input supply voltage operation: 7 to 27 V 5 V ± 10% full tolerance Voltage Regulator MCU reset circuit with activation delay timer and 45µs digital noise filter Highly immune and 30 µs filtered Zero Voltage Synchronization Door Closed detection adaptation One 100 mA fan relay coil driver with demagnetizing diode One 100 mA magnetron relay coil driver with demagnetizing diode including down lock circuit based on fan drive output state One 10 mA buzzer driver Ambient temperature: - 10 to 85 °C s s s s s DIP-16 DIP-16 s s s PIN-OUT CONNECTIONS s VIN 1 16 VDD DLC 2 15 /RST SYN 3 14 ZVS DS 4 13 CDD MAG2 5 12 IN1 FAN1 6 11 IN2 VCC 7 10 IN3 COM 8 9 s s BENEFITS Higher module compactness with reduced component count Drastic reduction of soldered pins on the board for faster module assembly time and lower use of lead High ESD robustness and transient burst immunity compliant with IEC61000-4 IEC61000-4 standards Enhanced functional reliability Accurate MCU supply for better Analog to Digital Conversion Enhanced circuit parametric quality Easy to design for short time to market s s s s s s BUZ3 s STCC02 STCC02 BASED APPLICATION DIAGRAM Line VCC VIN MAINS CDD Neutral VIN CUP VCC JP DLC SYN RZV DOOR SWITCH VCC MAGNETRON RELAY FAN RELAY DS MAG2 FAN1 VDD 5V Regulator ZVS Zero volts sync. Door closed detection Magnetron driver Fan driver VCC COM /RST Reset with delay IN2 IN2 CDD IN1 IN2 IN3 Buzzer driver CDD VSS /RST NMI P04 P01 P02 P03 BUZ3 MCU BUZZER October 2003 - Ed: 1A 1/12 STCC02-BD5 STCC02-BD5 CIRCUIT BLOCK DIAGRAM 5V Regulator VIN DLC VDD Reset with delay Zero volts sync. SYN DS ZVS Door closed detection MAG2 CDD IN2 Magnetron driver FAN1 /RST IN1 Fan driver VCC IN3 COM BUZ3 Buzzer driver FUNCTIONAL DESCRIPTION RSENSE VIN The STCC02 STCC02 is a control circuit embedding most of the analog & power circuitry of a microwaves oven Over current control module. It interfaces the micro-controller limiter with the power and process sections of the oven. The voltage supply 1.25V The 5V voltage regulator supplies the Reference micro-controller MCU: especially functions such + as the timer, the Analog-Digital Converter ADC, and the low current outputs. Since all the R2 R1 high-current outputs sink their current from a different voltage supply, this regulator does not need to be oversized. Its average output current VDD can vary from 5 to 20 mA. Its output voltage accuracy, that contributes to the ADC accuracy of the MCU, is better than ± 10 % in the whole operating range of the temperature TAMB, the load current IDD and the input voltage VIN . The STCC02 STCC02 input voltage range from 7 to 27 V; and its DC output current is less than 20 mA to keep the internal dissipation compatible with thermal package capability. The regulator includes also an over current limiter to prevent high current conditions during the power up inrush or the output short circuit. This limiter is made of a serial shunt resistance as current sensor and a circuit that regulates the input over current. s The reset circuit This circuit ensures a Low Voltage Detection (LVD) of the output voltage of the regulator. Most micro-controllers have an active RESET pin in the low state: so, the /RST pin will be active at low state. s VDD VDD VH = 4.25 V VL = 3.75 V VH PROGRAMMABLE DELAY VDD VL NOISE FILTER DLC /RST 500 External Capacitor CUP If CUP = 47 nF, TUP = 6 ms 2/12 circuit output TUP = 6 ms CUP = 47 nF RST\ TDW ~ 40 µs internal latch output STCC02-BD5 STCC02-BD5 The reset circuit senses the regulator voltage VDD. Its comparator with hysteresis achieves this task. The /RST pin is high when VDD is higher than the high threshold VH = 4.25 V; and is low when the VDD decreases below the low threshold VL = 3.75 V. The comparator output changes are filtered for a high immunity. When the reset is disabling (VDD >VH), the /RST signal rises after the delay time TUP . This delay is set by an external capacitor CUP connected to the DLC pin: TUP = 6 ms for CUP = 47 nF. When the reset is enabling (VDD