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Abstract: .190" (4.83) max. .040 SPE-306-* SPE-316-* 28 6.0 SPE-310-* ( )=mm .050 68 , Current Inductors LuHY Part Numbers SPE-100-* SPE-101-* SPE-102-* SPE-103-* .500" (12.7) ref. SPE-104-* SPE-105-* SPE-106-* .765" (19.43) ref. SPE-107-* SPE-108-* SPE-109-* Tinned to Within .063" (1.60) of Body 1.00" (25.4) MIN. SPE-110-* SPE-111-* SPE-112-* SPE-100 SPE-113-* .350" (8.89) ref. *NOTE: Nominal Lead spacing is .410" (10.41) ; however ... Original
datasheet

1 pages,
438.66 Kb

SPE-208- SPE-204- SPE-200 SPE-116- SPE-108- SPE 316 datasheet abstract
datasheet frame
Abstract: 3.70 4.57 Diel. material PE PE PEX SPE SPE SPE Jacket dia. 6.1 6.1 6.1 6.9 6.1 6.9 , SPE Jacket dia. 2 2.8 2.8 5.2 5 10.3 10.3 4.5 Jacket material RADOX LSFH RADOX , 7.35 7.35 Diel. material PE PE PE PE PEX PEX SPE SPE SPE SPE SPE SPE SPE SPEX , SUHNER cable type EF 178 EF 178D EF 179 EF 316 EF 316D EF 142 EF 400 EF 393 Order code , 3 3 1 3 6 6 6 6 RG 178 B/U RD 178 RG 178 B/U RG 316/U, K02252D K02252D RD 316 RG 142 B/U RG ... Original
datasheet

8 pages,
356.32 Kb

TNC-50-7-2 QMA-50-3-2 SMA-50-3-146 radox 9 connector N for RG 213 coaxial cable RG 393 cable GX MARK 226517 TNC-50-2-112 radox QMA-50-2-2 radox 155 TNC-75-2-1c datasheet abstract
datasheet frame
Abstract: into an SPE. Product Brief September 1999 TMPR28051 TMPR28051 STS-1/AU-3 (STM-0) Mapper Description , SELECT LOGIC INPUT SELECT LOGIC ELASTIC STORE VT GENERATE SPE INSERTION LOGIC DS1 , PATTERN DROP DROP SELECT LOGIC JITTER ATTENUATE VT TERMINATE SPE DROP LOGIC DS1/E1 #n OUT DROP SELECT LOGIC JITTER ATTENUATE STS-1/AU-3 OUT VT TERMINATE SPE LOCATE , , as shown in Figure 2. TMPR28051 TMPR28051 T7693 T7693 QUAD LIU DS1/E1 #1 IN LIU SPE GENERATE ELASTIC ... Original
datasheet

4 pages,
152.24 Kb

TMUX03155 TMPR28051 T7693 STM0 mapper GR253-CORE GR-253 ETS300 diode DS1 TMPR28051 abstract
datasheet frame
Abstract: SPE Series Load Life of 3000 Hours at 85°C Smaller Size PCB Mounting, Snap-In Terminals For Switching Power Supply SPECIFICATIONS Operating Temperature Range Rated Voltage Range Capacitance Range Capacitance Tolerance -40~+85°C (300~450WV 450WV: -25 ~+85°C) 10 ~ 450V 120 ~ 18000uF ±20% (at , 0.90 0.80 0.80 1 1 1 1.05 1.20 1.05 1.10 1.30 1.10 1.15 1.33 1.15 SPE Series , 4.53 25x35 25x40 25x45 25x50 2.95 3.16 3.72 4.15 100 DxL Ripple mm Arms 25x35 2.52 ... Original
datasheet

2 pages,
355.22 Kb

450wv 82 450WV 18000uF 450WV abstract
datasheet frame
Abstract: SPE Series Load Life of 3000 Hours at 85°C Smaller Size PCB Mounting, Snap-In Terminals For Switching Power Supply SPECIFICATIONS Operating Temperature Range Rated Voltage Range Capacitance Range Capacitance Tolerance -40~+85°C (300~450WV 450WV: -25 ~+85°C) 10 ~ 450V 120~18000uF ±20% (at 20°C , 1K 10K 20K 1 1 1 1.05 1.20 1.05 1.10 1.30 1.10 1.15 1.33 1.15 SPE , 25x45 25x50 2.95 3.16 3.72 4.15 100 DxL Ripple mm Arms 25x35 2.52 25x40 2.84 25x45 3.29 ... Original
datasheet

2 pages,
51.75 Kb

450WV 450WV abstract
datasheet frame
Abstract: termination and SPE extraction/insertion. s Data Processing s Handles all concatenation levels of , STM-1/STS-3 LINE INTERFACE BLOCK LINE INTERFACE DUAL STM-4/STS-12 STM-4/STS-12 OR QUAD STM-1/STS-3 SPE , China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652 JAPAN: Microelectronics Group, Lucent ... Original
datasheet

2 pages,
107.72 Kb

TDAT021G2 GR-253 TDAT021G2 abstract
datasheet frame
Abstract: and SPE extraction/insertion. s Data Processing * ANSI is a registered trademark of American , SINGLE STM-16/STS-48 STM-16/STS-48 OR QUAD STM-4/STS-12 STM-4/STS-12 OR QUAD STM-1/STS-3 SPE MAPPER PAYLOAD TERMINATION , , ext. 316, FAX (86) 21 6440 0652 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18 ... Original
datasheet

2 pages,
108.32 Kb

TDAT042G5 STM-16 GR-253 TDAT042G5 abstract
datasheet frame
Abstract: standards, and IETF standards. s Full path termination and SPE extraction/insertion. s SONET , STM-4/STS-12 STM-4/STS-12 OR QUAD STM-1/STS-3 SPE MAPPER PAYLOAD TERMINATION PACKET/CELL PROCESSOR , Shan Xi Road, Shanghai 200233 P. R. China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652 ... Original
datasheet

2 pages,
107.21 Kb

TDAT04622 GR-253 TDAT04622 abstract
datasheet frame
Abstract: networks; UPSR and BLSR ring networks. s Full path termination and SPE extraction/insertion. s , /STS-12 /STS-12 OR QUAD STM-1/STS-3 STM INTERFACE CONNECTION MEMORY DS3 MPR AND SPE MPR PACKET , China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652 JAPAN: Microelectronics Group, Lucent ... Original
datasheet

4 pages,
346.89 Kb

TADM042G52 TADM042G5 Internal diagram of ic 7495 TADM042G52 abstract
datasheet frame
Abstract: 12 11 10 9 8 7 6 5 4 3 2 1 0 SPR SPIE SPE WOM MST CPL CPH SPR , transfer is taking place. Typically, these bits are only modified in slave mode when the SPE bit is set to , SPCR0 or the SPCR1 register, it is necessary to first write the register with the SPE bit set to 0. Then a second write is performed to the SPCR register with the same value except that the SPE bit is set. The BFSET instruction can be used in place of this second write to set the SPE bit. This is true ... Original
datasheet

28 pages,
160.59 Kb

spi In Circuit Serial Programming PC10 PB12 PB10 MST 718 mst 718 BE DSP56L811 DSP56L811 abstract
datasheet frame

Extended Electronics Archive (Experimental)

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Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
=.335 r.24 8 10 = rnom=.335 c.3 11 12 = 11.5p spe1.os 61 17 33 0 = [-225.534u,1.698] spe1.tc STAGE AND DOMINANT POLE AT 400HZ 400HZ 400HZ 400HZ # spe2.ref_mc 98 50 99 0 50 0 = [0,0.5,0.5] spg.1 98 13 12 11 = model=dx # # COMMON MODE STAGE WITH ZERO AT 1KHZ # spe2.cm 32 0 1 0 2 0 = [0,0.5,0.5] r.28 32 33 = rnom=1e6 r.29 33 0 = rnom=10 c.cm 32 33 = 159p # # NEGATIVE ZERO AT 0.6MHZ # spe.1 23 98 13 98 = 1e6 r.26 23 24 = rnom=1e3 r.27 24 98 = rnom=1e-3 spf.nz 23 24 i(spv.nz) = -1 spe
www.datasheetarchive.com/files/analog-devices/static/spice_models/ad22050n_ns.sin
Analog Devices 22/10/2012 4.67 Kb SIN ad22050n_ns.sin
= model=dplcapmod spe.ebreak n11 n7 n17 n18 = 31.6 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17
www.datasheetarchive.com/files/fairchild/pdfs/models actual/isl9n307ap3.sin
Fairchild 22/08/2003 2.66 Kb SIN isl9n307ap3.sin
=dbodymod dp.dbreak n5 n11 = model=dbreakmod dp.dplcap n10 n5 = model=dplcapmod spe.ebreak n11 n7 n17 n18 = 31.6 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 5.61e-9 l
www.datasheetarchive.com/files/fairchild/pdfs/models actual/isl9n312ad3.sin
Fairchild 22/08/2003 2.59 Kb SIN isl9n312ad3.sin
#.subckt huf76443 2 1 3 #*nom temp=25 deg c #*26aug99 # template huf76443 n2,n1,n3 electrical n2,n1,n3 { var i iscl d.model dbodymod = (is=3.16e-12, cjo=4.95e-9,tt=6.81e-8,m =dbreakmod res.rdbreak n72 n5 =1.41e-1, tc1=1.09e-4, tc2=0 d.dplcap n10 n5 = model=dplcapmod spe.ebreak n11 n7 n17 n18 = 66.05 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 4.92e-9 l
www.datasheetarchive.com/files/fairchild/pdfs/models actual/huf76443.sin
Fairchild 22/08/2003 2.64 Kb SIN huf76443.sin
= model=dplcapmod spe.ebreak n11 n7 n17 n18 = 31.6 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17
www.datasheetarchive.com/files/fairchild/pdfs/models actual/isl9n307ad3.sin
Fairchild 22/08/2003 2.64 Kb SIN isl9n307ad3.sin
=dplcapmod spe.ebreak n11 n7 n17 n18 = 109 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n .rgate n9 n20 = 3.16 res.rslc1 n5 n51 = 1e-6, tc1=3.0e-3,tc2=2.9e-6 res.rslc2 n5 n50 = 1e3 res
www.datasheetarchive.com/files/fairchild/simulation-models/fdm3622.sin
Fairchild 22/10/2012 2.73 Kb SIN fdm3622.sin
#.subckt huf76443 2 1 3 #*nom temp=25 deg c ta76443 #*26aug99 # template ta76443 n2,n1,n3 electrical n2,n1,n3 { var i iscl d.model dbodymod = (is=3.16e-12, cjo=4.95e-9,tt=6.81e-8 =1.41e-1, tc1=1.09e-4, tc2=0 d.dplcap n10 n5 = model=dplcapmod spe.ebreak n11 n7 n17 n18 = 66.05 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 4.92e-9 l.ldrain n2 n5 = 1.0e-9 l
www.datasheetarchive.com/files/spicemodels/misc/spice_model_cd/vendor list/intersil/switching%20regulation/spice/mm4784.sin.txt
Spice Models 29/07/2012 2.56 Kb TXT mm4784.sin.txt
Wired Communica Wireless Commun Application Spe Discrete IGBTs Function and In High No BSP 316 No BSP 317 No BSP 613 P No BSP 92 No BSS 192 No BSS 83 P No BSS
www.datasheetarchive.com/files/infineon/wwwinf~1.com/produc~1/para~456.htm
Infineon 19/10/2000 15.74 Kb HTM para~456.htm
-6, , cgso=2.21664e-05,cgdo=1e-11) spd 5 =model=md2 spr.rl n5 n10 =1 spf.fi2 n7 n9 i(spv.vfi2) =-1 spv.vfi2 n4 0 =0 spe.ev16 n10 0 n9 n
www.datasheetarchive.com/files/on_semiconductor/simulation-models/ntp35n15.rev0.sin
On Semiconductor 30/03/2009 1.88 Kb SIN ntp35n15.rev0.sin
,g,s { # BODY_BEGIN spm.model mm=(type=_n, level=1,is=1e-32,rd=1e-6, vto=2.87044,lambda=0.0217627,kp=316 n10 =1 spf.fi2 n7 n9 i(spv.vfi2) =-1 spv.vfi2 n4 0 =0 spe.ev16 n10 0 n9 n7 =1 spc.cap n11 n10 =2
www.datasheetarchive.com/files/international-rectifier/simulation-models/irf6715mtrpbf.sin
International Rectifier 21/02/2011 2.17 Kb SIN irf6715mtrpbf.sin