NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: architecture can handle full 32-bit PCM data 32 via I2S input, as well as DSD or SPDIF data. The SABRE , digital input for up to 200kHz sampling rate Supports SPDIF, PCM (I2S, MSB/LSB justified 16-32-bit) or , ES9018 ES9018 SPDIF in DSD/PCM Interface SPDIF Receiver OVERSAMPLING FILTER Fast/Slow roll-off , pre-amplifier, A/V receiver and professional applications such as recording systems, mixer consoles and digital , (stereo) 129 (8ch) 133 THD (dB) -120 32-bit DAC Yes I2S/DSD Input Yes -120 Yes ... | Original |
2 pages, |
spdif input dsd i2s RECEIVER DVD player circuit diagram ESS TECHNOLOGY PCM sampling audio mixer ESS sabre dac free home theater circuit diagram Most DVD Player SABRE32 dvd player power supply spdif audio dac datasheet abstract |
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| Abstract: up to 32-bit PCM data 32 via I2S input, as well as DSD or SPDIF data. The ES9016 ES9016 SABRE Ultra DAC , o o o SPDIF with 8-input MUX PCM (I2S, MSB/LSB) DSD External 8x Digital Filter 32-bit , Interface SPDIF Receiver OVERSAMPLING FILTER Fast/Slow roll-off (PCM) 50/60/70kHz (DSD , converter targeted for consumer applications such as Blu-ray player, audio pre-amplifier, A/V receiver and , APPLICATIONS · Blu-ray / SACD / DVD-Audio player · Audio preamplifier and receiver · A/V processor · ... | Original |
2 pages, |
spdif input SPDIF i2s RECEIVER SABRE32 PCM sampling spdif receiver ESS sabre dac home theater circuit diagram SABRE 32-BIT SPDIF i2s converter DVD player circuit diagram free home theater circuit diagram ES9016 SABRE ES9016 ES9016 ES9016 abstract |
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| Abstract: 3x8-bit ADCs, dual-input HDMI 1.2 3 2 8 RGB / YUV I2S or SPDIF 0 110 TDA9970C TDA9970C , I2Sor SPDIF I2S or SPDIF 3 TDA9973C TDA9973C* - RGB / YUV - RGB / YUV 3 - 165 LQFP144 LQFP144 , 110 3 2 I2S or SPDIF I2S or SPDIF 0 1.2 10 RGB / YUV 10 RGB / YUV 0 110 1.2 0 1 - 110 LQFP144 LQFP144 0 1 I2S or SPDIF I2S or SPDIF 3 1.2 - RGB , 1.2 0 2 - RGB / YUV I2S, SPDIF or 1-bit audio I2S, SPDIF or 1-bit audio 3 - ... | Original |
4 pages, |
tda9977 HDMI scaler HDMI to spdif 1080p field pattern TDA9973A 1080p video DAC LQFP144 SPDIF i2s RECEIVER HDMI receiver scaler LBGA256 SPDIF HDMI RECEIVER TDA8759 TDA997xx TDA9983A TDA9983A abstract |
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| Abstract: DSD Input Jitter Reduction Power (mW) -118 I2S or SPDIF Input 100 @ 8ch , performance criterion Universal digital input All-digital SPDIF (Reference only), PCM (I2S, MSB/LSB , SPDIF Receiver SPDIF in Fast/Slow roll-off (PCM) 50/60/70kHz (DSD) De-emphasis (PCM) Volume , Player LFE Audio Processor ES9008 ES9008 Sabre Reference 64-LQFP 64-LQFP Audio Receiver SL SR BL Home Theater Receiver BR 2 www.esstech.com Vista High Definition TM ... | Original |
2 pages, |
DVD player audio circuit diagram SPDIF i2s RECEIVER 64LQFP lqfp pcb LAYOUT DVD BOARD LAYOUT dsd i2s RECEIVER dvd board dvd circuit diagram home theater circuit diagram SPDIF i2s converter spdif receiver ES9006S datasheet abstract |
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| Abstract: sampling rate for both SPDIF and I2S - 8 x DSD interface supports both 2-channel and up to 8-channel one bit audio streams · No audio master clock is required for either SPDIF or I2S support Content , audio interface SPDIF or 4 x I2S or 8 x DSD - 4 x I2S interface accepts Dolby® TrueHD, DTS-HD and , audio interface supporting SPDIF or I2S (4 - channel) or DSD (8 - channel) input. The 4 x I2S interface , , the audio master clock is not absolutely required for either SPDIF or I2S support. Audio down ... | Original |
2 pages, |
AN-607 AN-608 AN-609 color space conversion SiI9134 ITU-R BT.709 DSD I2s receiver IDTV936 BT-709 av to hdmi hdmi dsd i2s RECEIVER BT.709 BT656 dvi spdif input IDTV936 abstract |
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| Abstract: Audio Output · Supports inputs from audio interface SPDIF or 4 x I2S or 8 x DSD - 4 x I2S interface , sampling rate for both SPDIF and I2S - 8 x DSD interface supports both 2-channel and up to 8-channel one bit audio streams · No audio master clock is required for either SPDIF or I2S support Content , not absolutely required for either SPDIF or I2S support. Audio down sampling at 1/2, 1/3 or 1/4 sampling rate for both SPDIF and I2S is also available. The 8 x DSD interface, with an audio sample ... | Original |
2 pages, |
color space conversion dts master audio hdmi specifications IDTV936 ITU-R BT.601 Sii9134 ITU-R BT.709 AN-608 spdif receiver spdif input HDMI 1.4 silicon Image HDMI output HDMI transmitter IDTV936 abstract |
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| Abstract: I2S (up to 8 channel) or SPDIF audio output ports compliant with IEC60958 IEC60958 and IEC61937 IEC61937 formats , (TTL) Video ADC I2S Transmitter Audio Output Configure (TTL) Audio ADC I2S/SPDIF Audio , extracted audio data is transmitted on multi-channel I2S or single wire SPDIF bus depending on audio type. , GM69010H GM69010H GM69010H GM69010H I2S / SPDIF Monitor/TV Controller GM69010H GM69010H 2 Benefits Benefits , GM69010H GM69010H DisplayPort, HDMI, and component input receiver Data Brief 205 MHz ... | Original |
7 pages, |
VGA to HDMI ic DVI input RGB output VGA edid capture IEC60958 IEC61937 8 bit ttl ADC SPDIF HDMI RECEIVER spdif i2s adc spdif spi vga to av video diagram SPDIF i2s RECEIVER adc audio i2s 8 channel controller dvi dual link displayport GM69010H GM69010H abstract |
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| Abstract: GM68020H GM68020H DisplayPort receiver Data Brief Features I2S (8 channel) or SPDIF audio output ports compliant with IEC60958 IEC60958 and IEC61937 IEC61937 formats DisplayPortTM 1.1a compliant receiver , I2S/SPDIF Audio I2S/SPDIF Transmitter I2C Slave November 2008 Clock Generation OCM, SPI , TTL (60-bit) DisplayPort TV Controller GM68020H GM68020H GM68020H GM68020H I2S/SPDIF EDID GPIO 2/7 , , 1.8V Core 4/7 I2S (8 channel) or SPDIF audio output ports compliant with IEC60958 IEC60958 and ... | Original |
7 pages, |
TTL RGB 24bit IEC61937 scheme tv color SPDIF i2s RECEIVER displayport ttl SPDIF i2s converter displayport* GM68020H IEC60958 gm68020 GM68020H GM68020H abstract |
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| Abstract: Demodulator Audio Processing Advanced Audio Enhancement Digital Audio Support I2S, SPDIF Input I2S, SPDIF Output Loud Speaker, Sub Woofer, and Headphone Analog Line In, Microphone In, and Line Out , DSP supports high end audio processing and enhancement. In addition, I2S or SPDIF input and output , graphic equalizer I2S, SPDIF Digital Audio input and output support HDMI SUPPORT · · · HDMI 1.2 , controller, UART support Internal RESET Controller GPIOs, Low Bandwidth ADC 5-input Infrared Receiver ... | Original |
2 pages, |
HDMI OSD HDMI to cvbs input ypbpr 24bit rgb output spdif 24BIT 5.1 woofer ypbpr scart woofer circuit spdif receiver spdif input spdif 5.1 HDMI rx audio woofer woofer FLI30XX2 FLI30XX2 abstract |
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| Abstract: HDMI 1.3/ DVI DCDi Format Conversion for PIP I2S SPDIF HDMI2/DVI OSD Blend CLUTs , . 5, 1 x I2S, 1 x 12S/SPDIF . . ADC Inputs, I2S/ SPDIF Rx Audio DACs Audio MUX Audio out 1 . 5 IR I/F Audio DSP I2S, DSD, SPDIF Tx Embedded Microprocessor . I2S , , SPDIF out Audio L/R in, SPDIF in I2S Peripherals HDMI1.3/ HDMI1.3/ DVI in 1 DVI in 2 2/8 , Integrated audio processing Additional and separate audio inputs for HDMI, I2S, SIF, and SPDIF ... | Original |
8 pages, |
hdmi dsd i2s RECEIVER displayport ttl DisplayPort LVDS IEC61966-2-4 lvds 1080p NTSC443 PAL-60 flat 2x32 lvds 1080p panel FLI32656 FLI32656H SPDIF i2s RECEIVER china color tv circuit FLI32656H abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| stereo digital serial inputs (8 channels) with common BCK and WS. To these inputs the I 2 S to 512f s ) Four stereo digital serial outputs (8 channels) with selectable I 2 S-bus or LSB-justified format Two SPDIF inputs combined with digital serial input On-board WS_PLL generates clock for serial outputs, 2 separate SPDIF receivers, a stereo FSDAC, a standard Philips I 2 C-bus interface, a www.datasheetarchive.com/files/philips/pip/saa7715ah_1.html |
Philips | 06/06/2005 | 6.87 Kb | HTML | saa7715ah_1.html |
| digital serial outputs, 2 separate SPDIF receivers, a stereo FSDAC, a standard Philips I (YRAM) Four stereo digital serial inputs (8 channels) with common BCK and WS. To these inputs the I 2 S-bus format or LSB-justified formats can be applied One stereo bitstream DAC (2 channels selectable I²S-bus or LSB-justified format Two SPDIF inputs combined with digital serial input On www.datasheetarchive.com/files/philips/pip/saa7715h_1-v1.html |
Philips | 06/06/2005 | 6.66 Kb | HTML | saa7715h_1-v1.html |
| serial inputs (8 channels) with common BCK and WS. To these inputs the I 2 S-bus format or LSB inputs, 4 digital serial outputs, 2 separate SPDIF receivers, a stereo FSDAC, a standard Philips I stereo digital serial outputs (8 channels) with selectable I²S-bus or LSB-justified format Two SPDIF www.datasheetarchive.com/files/philips/pip/saa7715h_1.html |
Philips | 23/04/2003 | 5.62 Kb | HTML | saa7715h_1.html |
| output port. FSYNC may be used to latch this bit externally. Except in I 2 S modes when this pin is I 2 S modes when this pin is updated at the active edge off Fsync. 15 CBL Channel Status Block - Out, L/R, I 2 S Compatible 0 1 1 3 - In, L/R, I 2 S Compatible 1 0 0 4 - Out, WSYNC, 16-24 Bits period prior to the active edge of FSYNC in all se - rial port formats except 2, 3 and 10 (I 2 S modes /EBU, IEC 958, S/PDIF, and EIAJ CP-340/1201 CP-340/1201 CP-340/1201 CP-340/1201 interface standards. It contains a RS422 RS422 RS422 RS422 line receiver and www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7311.htm |
STMicroelectronics | 20/10/2000 | 35.27 Kb | HTM | 7311.htm |
| bit externally. Except in I 2 S modes when this pin is updated at the active edge off Fsync. 2 I 2 S modes when this pin is updated at the active edge off Fsync. 15 CBL Channel Status Block 2 S Compatible 0 1 1 3 - In, L/R, I 2 S Compatible 1 0 0 4 - Out, WSYNC, 16-24 Bits 1 0 formats except 2, 3 and 10 (I 2 S modes). The active edge of FSYNC may be used to latch C, U, and ST | DIGITAL AUDIO INTERFACE RECEIVER www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7311-v1.htm |
STMicroelectronics | 03/10/2000 | 34.14 Kb | HTM | 7311-v1.htm |
| 0603 #define AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR 0x0604 #define AUDIO_TERMINAL_SPDIF _TERMINAL_TV_TUNER_AUDIO 0x070C #define AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO 0x070D #define AUDIO_TERMINAL_CABLE_TUNER_AUDIO 0x070E #define AUDIO_TERMINAL_DSS_AUDIO 0x070F #define AUDIO_TERMINAL_RADIO_RECEIVER www.datasheetarchive.com/download/58398878-595975ZC/i2s.usb.audio.demo.zip (audio.h) |
NXP | 23/10/2007 | 8019.41 Kb | ZIP | i2s.usb.audio.demo.zip |
| ports 2.3.3.1 Asynchronous I 2 S digital input port(s) I 2 S ports enable internal digital SRC capability may be required to adapt the I 2 S sourced audio sample rate to the AC '97 Controller consumer A/V receiver is the established audio hub in millions of family rooms today. It is home of the power amplifier and attach point for high quality speakers (2, 4, or 6 channels). PC to A/V receiver /V receivers, the upper bound to audio quality will be gated by the audio solution in the PC. It is therefore www.datasheetarchive.com/files/intel/pc-supp/platform/ac97/wp/ac97_sys-v2.htm |
Intel | 10/02/1998 | 46.58 Kb | HTM | ac97_sys-v2.htm |
| ports 2.3.3.1 Asynchronous I 2 S digital input port(s) I 2 S ports enable internal digital SRC capability may be required to adapt the I 2 S sourced audio sample rate to the AC '97 Controller consumer A/V receiver is the established audio hub in millions of family rooms today. It is home of the power amplifier and attach point for high quality speakers (2, 4, or 6 channels). PC to A/V receiver /V receivers, the upper bound to audio quality will be gated by the audio solution in the PC. It is therefore www.datasheetarchive.com/files/intel/pc-supp/platform/ac97/wp/ac97_sys-v3.htm |
Intel | 03/08/1997 | 45.56 Kb | HTM | ac97_sys-v3.htm |
| 2 S digital input port(s) I 2 S ports enable internal digital point-to-point connections between be required to adapt the I 2 S sourced audio sample rate to the AC '97 Controller's 48 Kss. 2 The consumer A/V receiver is the established audio hub in millions of family rooms today. It is home /V receiver connections can be made via analog line in / line out, or ideally, bi-directional digital control /V receivers, the upper bound to audio quality will be gated by the audio solution in the PC. It is therefore www.datasheetarchive.com/files/intel/pc-supp/platform/ac97/wp/ac97_sys.htm |
Intel | 31/10/1998 | 45.4 Kb | HTM | ac97_sys.htm |
| ports 2.3.3.1 Asynchronous I 2 S digital input port(s) I 2 S ports enable internal digital SRC capability may be required to adapt the I 2 S sourced audio sample rate to the AC '97 Controller consumer A/V receiver is the established audio hub in millions of family rooms today. It is home of the power amplifier and attach point for high quality speakers (2, 4, or 6 channels). PC to A/V receiver /V receivers, the upper bound to audio quality will be gated by the audio solution in the PC. It is therefore www.datasheetarchive.com/files/intel/pc-supp/platform/ac97/wp/ac97_sys-v1.htm |
Intel | 07/11/1997 | 46.58 Kb | HTM | ac97_sys-v1.htm |