SN74GTL1655 16-BIT SCBS696I SN74GTL1655DGGR GTL1655 SCBA004 SN74GTL1655DGGRE4 - Datasheet Archive

 

SN74GTL1655 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION FEATURES · · · ·

 

www.ti.com SN74GTL1655 SN74GTL1655 16-BIT 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION FEATURES · · · · · · · · · Member of the Texas Instruments WidebusTM Family UBTTM Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Modes OECTM Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference Translates Between GTL/GTL+ Signal Level and LVTTL Logic Levels High-Drive (100 mA), Low-Output-Impedance (12 ) Bus Transceiver (B Port) Edge-Rate-Control Input Configures the B-Port Output Rise and Fall Times Ioff, Power-Up 3-State, and BIAS VCC Support Live Insertion Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors on A Port Distributed VCC and GND Pins Minimize High-Speed Switching Noise DESCRIPTION/ORDERING INFORMATION The SN74GTL1655 SN74GTL1655 is a high-drive (100 mA), low-output-impedance (12 ) 16-bit UBTTM transceiver that provides LVTTL-to-GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level translation. This device is partitioned as two 8-bit transceivers and combines D-type flip-flops and D-type latches to allow for transparent, latched, and clocked modes of data transfer similar to the '16501 function. This device provides an interface between cards operating at LVTTL logic levels and a backplane operating at GTL/GTL+ signal levels. Higher-speed operation is a direct result of the reduced output swing ( VCC. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) (2) (3) (4) MIN BIAS VCC VTT Termination voltage VREF Reference voltage VI Input voltage NOM MAX 3 3.3 3.6 GTL 1.14 1.2 1.26 GTL+ 1.35 1.5 1.65 GTL 0.74 0.8 0.87 GTL+ 0.87 1 1.1 B port 0 VTT Except B port 0 VCC Supply voltage B port VIH High-level input voltage VERC Except B port and ERC Low-level input voltage VCC ­ 0.6 High-level output current VERC VCC GND V 0.6 mA A port ­24 mA A port 24 B port 100 t/VCC Power-up ramp rate 200 TA Operating free-air temperature ­40 (3) (4) 6 V ­18 Low-level output current (2) V 0.8 IOL (1) V VREF ­ 50 mV Input clamp current IOH V 2 Except B port and ERC IIK V VREF + 50 mV B port VIL UNIT mA µs/V 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004 SCBA004. Normal connection sequence is GND first, BIAS VCC = 3.3 V second, and VCC = 3.3 V, I/O, control inputs, VTT and VREF (any order) last. However, if the B-port I/O precharge is not required, the acceptable connection sequence is GND first and VCC = 3.3 V, BIAS VCC = 3.3 V, I/O, control inputs, VTT and VREF (any order) last. When VCC is connected, the BIAS VCC circuitry is disabled. VTT and RTT can be adjusted to accommodate backplane impedances if the dc recommended IOL ratings are not exceeded. VREF can be adjusted to optimize noise margins, but normally is two-thirds VTT. SN74GTL1655 SN74GTL1655 16-BIT 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I SCBS696I ­ JULY 1997 ­ REVISED APRIL 2005 Electrical Characteristics over recommended operating free-air temperature range, VREF = 1 V and VTT = 1.5 V (unless otherwise noted) PARAMETER MIN TYP (1) TEST CONDITIONS VIK VCC = 3 V to 3.6 V, VOH A port II = ­18 mA IOH = ­100 µA 2.2 VCC = 3 V V IOL = 100 µA VCC = 3 V to 3.6 V, A port V 2.4 IOH = ­24 mA UNIT VCC ­ 0.2 IOH = ­12 mA MAX ­1.2 VCC = 3 V, 0.2 IOL = 12 mA B port 0.2 IOL = 80 mA VCC = 3 V 0.55 IOL = 40 mA VOL 0.4 IOL = 24 mA VCC = 3 V 0.4 IOL = 100 mA Control inputs II Ioff VCC = 0, II(hold) VCC = 3.6 ±10 VI or VO = 0 to 3.6 V ±100 VI = 0.8 V VCC = 3 V A port ±10 VI = VTT or GND VCC = 3.6 V B port 0.5 VI = VCC or GND VI = 2 V V (2), V µA µA 75 µA ­75 VI = 0 to VCC ±500 IOZH B port VCC = 3.6 V, VO = 1.5 V 10 µA IOZL B port VCC = 3.6 V, VO = 0.4 V ­10 µA (3) A port VCC = 3.6 V, VO = VCC or GND ±10 µA IOZPU A port VCC = 0 to 3.6 V, VO = 0.5 V to 3 V, OE = low ±50 µA IOZPD A port VCC = 3.6 V to 0, VO = 0.5 V to 3 V, OE = low ±50 µA IOZ Outputs high ICC Outputs low 80 Outputs disabled VCC = 3.6 V, IO = 0, VI = VCC or GND A or B port 80 80 ICC (4) Except B port VCC = 3.6 V, A-port or control inputs at VCC or GND, One input at VCC ­ 0.6 V Ci Control inputs VI = VCC or 0 Cio (1) (2) (3) (4) A port 1 mA 3 5 pF 5 6 6 VO = VCC or 0 B port mA 8 pF All typical values are at VCC = 3.3 V, TA = 25°C. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. For I/O ports, the parameter IOZ includes the input leakage current. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Live-Insertion Specifications over recommended operating free-air temperature range PARAMETER ICC (BIAS VCC) VO VCC = 3 V to 3.6 V VO (B port) = 0 to 1.2 V, MIN MAX B port UNIT 5 1 mA 10 VI (BIAS VCC) = 3 V to 3.6 V µA 1.2 V µA VCC = 0, VI (BIAS VCC) = 3.3 V VCC = 0, IO B port TEST CONDITIONS VCC = 0 to 3 V VO (B port) = 0.4 V, VCC = 0 to 3.6 V, OE = 3.3 V 100 VCC = 0 to 1.5 V, OE = 0 to 3.3 V 100 VI (BIAS VCC) = 3 V to 3.6 V ­1 7 SN74GTL1655 SN74GTL1655 16-BIT 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I SCBS696I ­ JULY 1997 ­ REVISED APRIL 2005 Timing Requirements over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.2 V, VREF = 0.8 V, and VERC = VCC or GND for GTL (unless otherwise noted) MIN fclock tw Setup time Data before LE Data after LE ns 2.7 CLK high 2.8 CLK low 2.6 Data after CLK Hold time MHz 3 Data before CLK th UNIT 3 CLK high or low Pulse duration tsu LE high MAX 160 Clock frequency ns 0.4 CLK high or low ns 0.9 A-to-B Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.2 V, VREF = 0.8 V, and VERC = VCC or GND for GTL (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP MAX fmax 160 tPLH 3.1 5.2 2.6 6.2 3.4 5.5 2.4 5.8 3.5 5.8 2.6 6.4 3.3 5.4 2.7 5.9 2.3 4.3 1.9 4.3 2.7 4.8 1.8 4.3 2.8 4.9 2 4.8 2.5 4.5 2 4.2 tPHL tPLH tPHL tPLH tPHL ten tdis tPLH tPHL tPLH tPHL tPLH tPHL ten tdis tr tf VERC = GND VERC = VCC VERC = GND VERC = VCC A VERC = VCC B CLK VERC = VCC B LEAB VERC = VCC B OEAB or OE VERC = VCC B A VERC = GND B CLK VERC = GND B LEAB VERC = GND B OEAB or OE VERC = GND B Transition time, B outputs (0.6 V to 1 V) Transition time, B outputs (1 V to 0.6 V) UNIT MHz 0.6 ns ns ns ns ns ns ns ns ns 1.2 1.1 ns 1.7 tsk(o) (1) 8 1 ns tsk(o) (2) (1) (2) Skew between drivers in the same package switching in the same direction Skew between drivers switching in any direction in the same package 1 ns Skew values are applicable for through mode only. Skew values are applicable for CLK mode only, with all outputs switching simultaneously. SN74GTL1655 SN74GTL1655 16-BIT 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I SCBS696I ­ JULY 1997 ­ REVISED APRIL 2005 B-to-A Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.2 V and VREF = 0.8 V for GTL (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) MIN MAX fmax 160 tPLH 1.8 4.7 2.3 4.6 tPHL tPLH tPHL tPLH tPHL ten tdis B A CLK A LEBA A OEBA or OE A UNIT MHz 1.6 4 1.5 3.4 1.7 4 1.4 3.5 1.2 4.2 1.2 6.1 ns ns ns ns tsk(o) (1) 1 ns tsk(o) (2) (1) (2) Skew between drivers in the same package switching in the same direction Skew between drivers switching in any direction in the same package 1 ns Skew values are applicable for through mode only. Skew values are applicable for CLK mode only, with all outputs switching simultaneously. 9 SN74GTL1655 SN74GTL1655 16-BIT 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I SCBS696I ­ JULY 1997 ­ REVISED APRIL 2005 Timing Requirements over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.5 V, VREF = 1 V, and VERC = VCC or GND for GTL+ (unless otherwise noted) MIN fclock tw Setup time Data before LE Data after LE ns 2.7 CLK high 2.8 CLK low 2.6 Data after CLK Hold time MHz 3 Data before CLK th UNIT 3 CLK high or low Pulse duration tsu LE high MAX 160 Clock frequency ns 0.4 CLK high or low ns 0.9 A-to-B Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.5 V, VREF = 1 V, and VERC = VCC or GND for GTL+ (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP MAX fmax 160 tPLH 3 5.1 2.9 6.5 3.4 5.4 2.7 6.2 3.5 5.7 2.8 6.7 3.3 5.4 3 6.3 A VERC = VCC tPHL tPLH tPHL tPLH tPHL ten tdis ten tdis tr tf VERC = GND VERC = VCC VERC = GND VERC = VCC B OE VERC = GND tPLH B OEAB VERC = GND ten tdis B LEAB VERC = GND tdis B CLK VERC = GND ten B A VERC = GND tPHL B OE VERC = VCC tPLH B OEAB VERC = VCC tPHL B LEAB VERC = VCC tPLH B CLK VERC = VCC tPHL B Transition time, B outputs (0.6 V to 1.3 V) Transition time, B outputs (1.3 V to 0.6 V) UNIT MHz 3 5.5 3.6 5.8 2.3 4.3 2 4.4 2.7 4.8 1.9 4.5 2.8 4.9 2.1 4.9 2.5 4.5 2.1 4.4 2.5 4.6 2.9 4.9 0.9 ns ns ns ns ns ns ns ns ns ns ns 1.7 1.6 ns 2.4 tsk(o) (1) 10 1 ns tsk(o) (2) (1) (2) Skew between drivers in the same package switching in the same direction Skew between drivers switching in any direction in the same package 1 ns Skew values are applicable for through mode only. Skew values are applicable for CLK mode only, with all outputs switching simultaneously. SN74GTL1655 SN74GTL1655 16-BIT 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I SCBS696I ­ JULY 1997 ­ REVISED APRIL 2005 B-to-A Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, VTT = 1.5 V and VREF = 1 V for GTL+ (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) MIN MAX fmax 160 tPLH 2 4.8 2.4 4.7 1.6 4.4 1.5 3.4 tPHL tPLH tPHL tPLH tPHL ten tdis ten tdis B A CLK A LEBA A OEBA A OE A UNIT MHz 1.7 4 1.4 3.5 1.2 4.2 1.2 6.1 1.2 4.7 1.2 6.3 ns ns ns ns ns tsk(o) (1) 1 ns tsk(o) (2) (1) (2) Skew between drivers in the same package switching in the same direction Skew between drivers switching in any direction in the same package 1 ns Skew values are applicable for through mode only. Skew values are applicable for CLK mode only, with all outputs switching simultaneously. 11 SN74GTL1655 SN74GTL1655 16-BIT 16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION www.ti.com SCBS696I SCBS696I ­ JULY 1997 ­ REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VTT 6V 500 From Output Under Test S1 Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH GND CL = 50 pF (see Note A) 500 12.5 From Output Under Test CL = 30 pF (see Note A) S1 Open 6V GND LOAD CIRCUIT FOR B OUTPUTS LOAD CIRCUIT FOR A OUTPUTS tw 3V 3V Timing Input 1.5 V 0V 1.5 V 1.5 V Input tsu 0V 3V 1.5 V 1.5 V th 3V Data Input A Port VOLTAGE WAVEFORMS PULSE DURATION Input Test Point 1.5 V Data Input B Port VREF 1.5 V 0V VTT VREF 0V 0V tPLH VOLTAGE WAVEFORMS SETUP AND HOLD TIMES tPHL VTT Output VREF VREF 3V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (CLK to B port) 1.5 V tPZL 1.5 V 0V tPLH Output Waveform 1 S1 at 6 V (see Note B) 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (CLK to A port) 1.5 V tPLZ 3V 1.5 V tPZH tPHL VOH Output 1.5 V 0V 3V Input Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ VOH 1.5 V VOH - 0.3 V 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES (A port) NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. Figure 1. Load Circuits and Voltage Waveforms 12 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74GTL1655DGGR SN74GTL1655DGGR ACTIVE TSSOP DGG 64 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74GTL1655DGGRE4 SN74GTL1655DGGRE4 ACTIVE TSSOP DGG 64 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74GTL1655DGGRG4 SN74GTL1655DGGRG4 ACTIVE TSSOP DGG 64 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74GTL1655DGGR SN74GTL1655DGGR Package Package Pins Type Drawing TSSOP DGG 64 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.4 17.3 1.7 12.0 24.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74GTL1655DGGR SN74GTL1655DGGR TSSOP DGG 64 2000 346.0 346.0 41.0 Pack Materials-Page 2 MECHANICAL DATA MTSS003D MTSS003D ­ JANUARY 1995 ­ REVISED JANUARY 1998 DGG (R-PDSO-G*) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°­ 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS * 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. 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