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OCTAL FET BUS SWITCH SCDS001N - NOVEMBER 1992 - REVISED SEPTEMBER 2003 D Standard '244-Type Pinout D 5- Switch Connection Between
SN74CBT3244 SN74CBT3244 OCTAL FET BUS SWITCH SCDS001N SCDS001N - NOVEMBER 1992 - REVISED SEPTEMBER 2003 D Standard '244-Type Pinout D 5- Switch Connection Between Two Ports D TTL-Compatible Input Levels 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 1OE 1 1OE 1A1 2B4 1A2 2B3 1A3 2B2 1A4 2B1 GND 1 VCC 2OE 1B1 2A4 1B2 2A3 1B3 2A2 1B4 2A1 1A1 2B4 1A2 2B3 1A3 2B2 1A4 2B1 VCC RGY PACKAGE (TOP VIEW) DB, DBQ, DGV, DW, OR PW PACKAGE (TOP VIEW) 20 19 2OE 18 1B1 2 3 17 2A4 16 1B2 4 5 15 2A3 14 1B3 6 7 13 2A2 12 1B4 8 9 11 GQN OR ZQN PACKAGE (TOP VIEW) 1 2 3 2A1 GND 10 terminal assignments 4 1 2 3 4 A A 1A1 1OE B 1A2 2A4 VCC 2B4 2OE B C C 1A3 2B3 2A3 1B2 D D 1A4 2A2 2B2 1B3 E E GND 2B1 2A1 1B4 1B1 description/ordering information ORDERING INFORMATION ORDERABLE PART NUMBER PACKAGE TA QFN - RGY TOP-SIDE MARKING Tape and reel SN74CBT3244RGYR SN74CBT3244RGYR Tube SN74CBT3244DW SN74CBT3244DW Tape and reel SN74CBT3244DWR SN74CBT3244DWR SSOP - DB Tape and reel SN74CBT3244DBR SN74CBT3244DBR CU244 CU244 SSOP (QSOP) - DBQ Tape and reel SN74CBT3244DBQR SN74CBT3244DBQR CBT3244 CBT3244 Tube SN74CBT3244PW SN74CBT3244PW Tape and reel SN74CBT3244PWR SN74CBT3244PWR Tape and reel SN74CBT3244DGVR SN74CBT3244DGVR SOIC - DW -40°C to 85°C TSSOP - PW TVSOP - DGV VFBGA - GQN VFBGA - ZQN (Pb-free) CU244 CU244 CBT3244 CBT3244 CU244 CU244 CU244 CU244 SN74CBT3244GQNR SN74CBT3244GQNR Tape and reel SN74CBT3244ZQNR SN74CBT3244ZQNR CU244 CU244 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 SN74CBT3244 SN74CBT3244 OCTAL FET BUS SWITCH SCDS001N SCDS001N - NOVEMBER 1992 - REVISED SEPTEMBER 2003 description/ordering information (continued) The SN74CBT3244 SN74CBT3244 provides eight bits of high-speed TTL-compatible bus switching. The SOIC, SSOP, TSSOP, and TVSOP packages provide a standard '244 device pinout. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as two 4-bit low-impedance switches with separate output-enable (OE) inputs. When OE is low, the switch is on, and data can flow from port A to port B, or vice versa. When OE is high, the switch is open, and the high-impedance state exists between the two ports. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (each 4-bit bus switch) INPUT OE FUNCTION L A port = B port H Disconnect logic diagram (positive logic) 2 18 1A1 1B1 8 12 1A4 1B4 1 1OE 11 9 2A1 2B1 17 3 2A4 2B4 19 2OE Pin numbers shown are for the DB, DBQ, DGV, DW, RGY, and PW packages. 2 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 SN74CBT3244 SN74CBT3244 OCTAL FET BUS SWITCH SCDS001N SCDS001N - NOVEMBER 1992 - REVISED SEPTEMBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Clamp current, IK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W (see Note 2): DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W (see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W (see Note 2): GQN/ZQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W (see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W (see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 3. The package thermal impedance is calculated in accordance with JESD 51-5. recommended operating conditions (see Note 4) MIN Supply voltage VIL TA MAX 4.5 VCC VIH 5.5 Low-level control input voltage High-level control input voltage 2 UNIT V V 0.8 Operating free-air temperature -40 V 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004 SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK II VCC = 4.5 V, VCC = 5.5 V, Control inputs VCC = 5.5 V, VCC = 5.5 V, IO = 0, One input at 3.4 V, Ci Control inputs TYP II = -18 mA VI = 5.5 V or GND ICC ICC§ MIN Cio(OFF) ron¶ VI = 3 V or 0 VO = 3 V or 0, VCC = 4.5 V MAX -1.2 µA 50 µA 3.5 VI = VCC or GND Other inputs at VCC or GND V ±5 mA 3 OE = VCC VI = 0 UNIT pF 6 II = 64 mA II = 30 mA pF 5 7 5 7 VI = 2.4 V, II = 15 mA 10 15 All typical values are at VCC = 5 V, TA = 25°C. § This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. ¶ Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 3 SN74CBT3244 SN74CBT3244 OCTAL FET BUS SWITCH SCDS001N SCDS001N - NOVEMBER 1992 - REVISED SEPTEMBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tpd A or B B or A ten OE A or B MIN MAX UNIT 0.25 ns 8.9 ns 1 tdis A or B 1 7.4 ns OE This propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). PARAMETER MEASUREMENT INFORMATION 7V 500 From Output Under Test S1 TEST GND CL = 50 pF (see Note A) 500 S1 tpd tPLZ/tPZL tPHZ/tPZH Open Open 7V Open 3V Output Control LOAD CIRCUIT 1.5 V 1.5 V 0V tPLZ tPZL 3V Input 1.5 V 1.5 V 0V tPLH 1.5 V 3.5 V 1.5 V 1.5 V VOL Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOL + 0.3 V VOL tPHZ tPZH tPHL VOH Output Output Waveform 1 S1 at 7 V (see Note B) 1.5 V VOH VOH - 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 13-Feb-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74CBT3244DBLE SN74CBT3244DBLE OBSOLETE SSOP DB 20 ACTIVE SSOP/ QSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR SN74CBT3244DBQRE4 SN74CBT3244DBQRE4 ACTIVE SSOP/ QSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR SN74CBT3244DBR SN74CBT3244DBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244DBRG4 SN74CBT3244DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR SN74CBT3244DGVR SN74CBT3244DGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244DGVRE4 SN74CBT3244DGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244DW SN74CBT3244DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244DWE4 SN74CBT3244DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244DWR SN74CBT3244DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244DWRE4 SN74CBT3244DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244GQNR SN74CBT3244GQNR ACTIVE BGA MI CROSTA R JUNI OR GQN 20 1000 TBD SNPB Level-1-240C-UNLIM SN74CBT3244PW SN74CBT3244PW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244PWE4 SN74CBT3244PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244PWLE SN74CBT3244PWLE OBSOLETE TSSOP PW 20 SN74CBT3244PWR SN74CBT3244PWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244PWRE4 SN74CBT3244PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244PWRG4 SN74CBT3244PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3244RGYR SN74CBT3244RGYR ACTIVE QFN RGY 20 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR SN74CBT3244RGYRG4 SN74CBT3244RGYRG4 ACTIVE QFN RGY 20 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR SN74CBT3244ZQNR SN74CBT3244ZQNR ACTIVE ZQN 20 1000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TBD (1) Call TI MSL Peak Temp (3) SN74CBT3244DBQR SN74CBT3244DBQR BGA MI CROSTA R JUNI OR TBD Lead/Ball Finish Call TI Call TI Call TI The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 13-Feb-2006 OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MPDS006C MPDS006C FEBRUARY 1996 REVISED AUGUST 2000 DGV (R-PDSO-G*) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS * 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins MO-153 MO-153 14/16/20/56 Pins MO-194 MO-194 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E MSSO002E JANUARY 1995 REVISED DECEMBER 2001 DB (R-PDSO-G*) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS * 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 MO-150 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C MTSS001C JANUARY 1995 REVISED FEBRUARY 1999 PW (R-PDSO-G*) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0° 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS * 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 MO-153 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. 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