SN54BCT29825 SN74BCT29825 SCBS075A MIL-STD-883C - Datasheet Archive

 

8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS075A ­ SEPTEMBER 1991 ­ REVISED NOVEMBER 1993 · ·

 

SN54BCT29825 SN54BCT29825, SN74BCT29825 SN74BCT29825 8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS075A SCBS075A ­ SEPTEMBER 1991 ­ REVISED NOVEMBER 1993 · · · State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) 3-State Buffer-Type Outputs Drive Bus Lines Directly Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT) SN54BCT29825 SN54BCT29825 . . . JT OR W PACKAGE SN74BCT29825 SN74BCT29825 . . . DW OR NT PACKAGE (TOP VIEW) OE1 OE2 1D 2D 3D 4D 5D 6D 7D 8D CLR GND description The eight flip-flops are edge-triggered D-type flip-flops. With the clock-enable (CLKEN) input low, the device enters data on the low-to-high transition of the clock. Taking CLKEN high disables the clock buffer, thus latching the outputs. Taking the clear (CLR) input low causes the eight Q outputs to go low independently of the clock. Buffered output-enable (OE1, OE2, or OE3) inputs can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC OE3 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLKEN CLK 1D OE2 OE1 NC VCC SN54BCT29825 SN54BCT29825 . . . FK PACKAGE (TOP VIEW) 2D 3D 4D NC 5D 6D 7D 5 4 3 2 1 28 27 26 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 2Q 3Q 4Q NC 5Q 6Q 7Q 8D CLR GND NC CLK CLKEN 8Q These 8-bit bus-interface flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. 1 OE3 1Q · NC ­ No internal connection The output-enable inputs do not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54BCT29825 SN54BCT29825 is characterized for operation over the full military temperature range of ­ 55°C to 125°C. The SN74BCT29825 SN74BCT29825 is characterized for operation from 0°C to 70°C. Copyright © 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­1 SN54BCT29825 SN54BCT29825, SN74BCT29825 SN74BCT29825 8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS075A SCBS075A ­ SEPTEMBER 1991 ­ REVISED NOVEMBER 1993 FUNCTION TABLE INPUTS OE CLR CLKEN CLK D OUTPUT Q L L X X X L L H L H H L H L L L L H H H or L X Q0 H X X X X Z OE = H if any of the output-enable inputs is high. OE = L if all of the output-enable inputs are low. logic symbol 1 OE1 OE2 OE3 CLR CLKEN CLK 1D 2D 3D 4D 5D 6D 7D 8D & 2 EN 23 11 14 13 3 R G1 1C2 22 2D 4 21 5 20 6 19 7 18 8 17 9 16 10 15 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, NT, and W packages. 2­2 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q SN54BCT29825 SN54BCT29825, SN74BCT29825 SN74BCT29825 8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS075A SCBS075A ­ SEPTEMBER 1991 ­ REVISED NOVEMBER 1993 logic diagram (positive logic) 1 OE1 OE2 OE3 CLR CLKEN CLK 1D 2 23 11 14 22 R 13 1Q C1 3 1D To Seven Other Channels Pin numbers shown are for the DW, JT, NT, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . ­ 0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 0.5 V to VCC Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 30 mA Current into any output in the low state, IO: SN54BCT29825 SN54BCT29825 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA SN74BCT29825 SN74BCT29825 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA Operating free-air temperature range: SN54BCT29825 SN54BCT29825 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 55°C to 125°C SN74BCT29825 SN74BCT29825 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 65°C to 150°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. recommended operating conditions SN54BCT29825 SN54BCT29825 SN74BCT29825 SN74BCT29825 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 0.8 V Input clamp current ­18 ­18 mA IOH IOL High-level output current ­15 ­ 24 mA 48 mA TA Operating free-air temperature 70 °C High-level input voltage 2 Low-level output current 2 24 ­ 55 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 125 0 V V 2­3 SN54BCT29825 SN54BCT29825, SN74BCT29825 SN74BCT29825 8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS075A SCBS075A ­ SEPTEMBER 1991 ­ REVISED NOVEMBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54BCT29825 SN54BCT29825 TYP MAX TEST CONDITIONS VCC = 4.5 V, MIN II = ­18 mA IOH = ­ 15 mA VCC = 4 5 V 4.5 ­1.2 2 3.2 ­1.2 2.4 3.1 UNIT V 3.3 2 IOH = ­ 24 mA IOH = ­ 3 mA VCC = 4.75 V, SN74BCT29825 SN74BCT29825 TYP MAX MIN V 2.7 VOL VCC = 4 5 V 4.5 IOL = 24 mA IOL = 48 mA II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL IOS VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 0 IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.5 V ­ 20 µA ICCL ICCH VCC = 5.5 V, VCC = 5.5 V, Outputs open 26 40 26 40 mA Outputs open 10 16 10 16 mA ICCZ Ci VCC = 5.5 V, VCC = 5 V, Outputs open 6 10 6 10 mA VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V 5 0.38 0.55 0.42 0.1 ­10 ­75 0.1 ­250 V mA ­75 mA 20 ­ 20 mA ­250 ­75 20 µA ­ 0.2 ­10 ­ 0.2 ­75 0.55 µA 5 Co VCC = 5 V, 7 All typical values are at VCC = 5 V, TA = 25°C. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. pF 7 pF timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = 5 V, TA = 25°C SN54BCT29825 SN54BCT29825 SN74BCT29825 SN74BCT29825 MIN fclock tw Pulse duration MIN MAX MIN 125 0 125 0 125 CLR low 4 4 4 CLK high or low 4 4 4 Data high 6 6 Setup time before CLK S i b f Data low 3.5 3.5 3.5 CLR 1 1 1 8 8 Hold i H ld time after CLK f 1.5 1.5 1.5 0 0 0 0.5 0.5 0.5 Data low CLKEN high or low 2­4 ns 8 Data high th MHz 6 CLKEN high or low tsu UNIT MAX 0 Clock frequency MAX POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 ns ns SN54BCT29825 SN54BCT29825, SN74BCT29825 SN74BCT29825 8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS075A SCBS075A ­ SEPTEMBER 1991 ­ REVISED NOVEMBER 1993 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Note 2) PARAMETER fmax tPLH tPHL tPHL FROM (INPUT) TO (OUTPUT) , VCC = 5 V, TA = 25°C MIN SN54BCT29825 SN54BCT29825 UNIT TYP MAX 2.2 5.4 7.8 2.2 9.9 2.2 9 3.1 5.9 7.7 3.1 9.1 3.1 8.4 125 CLK Q CLR Q tPZH tPZL OE Q tPHZ tPLZ OE Q SN74BCT29825 SN74BCT29825 MIN MAX 125 MIN MAX 125 MHz 3 6.4 8.3 3 9.6 3 9.5 2.1 6.2 8.4 2.1 10.8 2.1 10.3 5.1 9.1 11.4 5.1 13.6 5.1 13.2 2.4 5.9 7.8 2.4 9.8 2.4 9 1.8 5.2 7.2 1.8 9.2 1.8 8.2 ns ns ns ns NOTE 2: Load circuits and voltage waveforms are shown in Section 1. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­5 SN54BCT29825 SN54BCT29825, SN74BCT29825 SN74BCT29825 8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS075A SCBS075A ­ SEPTEMBER 1991 ­ REVISED NOVEMBER 1993 2­6 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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