SN74AUP1T97 SCES613B SC-70 A114-B A115-A SN74AUP1T98 SN74AUP1T57 SN74AUP1T58 - Datasheet Archive

 

SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B ­ OCTOBER 2004 ­

 

SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 FEATURES · · · · · · · · · Available in the Texas Instruments NanoStarTM and NanoFreeTM Packages Single-Supply Voltage Translator 1.8 V to 3.3 V (at VCC = 3.3 V) 2.5 V to 3.3 V (at VCC = 3.3 V) 1.8 V to 2.5 V (at VCC = 2.5 V) 3.3 V to 2.5 V (at VCC = 2.5 V) Nine Configurable Gate Logic Functions Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity Ioff Supports Partial-Power-Down Mode With Low Leakage Current (0.5 µA) DBV OR DCK PACKAGE (TOP VIEW) B GND A 1 6 2 5 3 4 C VCC Y · · · · · Very Low Static and Dynamic Power Consumption Pb-Free Packages Available: SOT-23 (DBV), SC-70 SC-70 (DCK), and WCSP (NanoFree) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 ­ 2000-V Human-Body Model (A114-B A114-B, Class II) ­ 200-V Machine Model (A115-A A115-A) ­ 1000-V Charged-Device Model (C101) Related Devices: SN74AUP1T98 SN74AUP1T98, SN74AUP1T57 SN74AUP1T57, and SN74AUP1T58 SN74AUP1T58 YEP OR YZP PACKAGE (BOTTOM VIEW) A GND B 3 4 2 5 1 6 Y VCC C DESCRIPTION/ORDERING INFORMATION AUP technology is the industry's lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T97 SN74AUP1T97 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range. Schmitt-trigger inputs (VT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition. The SN74AUP1T97 SN74AUP1T97 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed. Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions. The SN74AUP1T97 SN74AUP1T97 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs. NanostarTM and NanofreeTM package technology is a major breakthrough in IC packaging concepts, using the die as the package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar, NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004­2005, Texas Instruments Incorporated SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 ORDERING INFORMATION PACKAGE (1) TA ORDERABLE PART NUMBER TOP-SIDE MARKING (2) NanoStarTM ­ WCSP (DSBGA) 0.23-mm Large Bump ­YEP (2) Tape and reel SN74AUP1T97YZPR SN74AUP1T97YZPR Tape and reel SN74AUP1T97DBVR SN74AUP1T97DBVR HT4_ SOT (SC-70 SC-70) ­ DCK (1) NanoFreeTM ­ WCSP (DSBGA) 0.23-mm Large Bump ­ YZP (Pb-free) SOT (SOT-23) ­ DBV ­40°C to 85°C Tape and reel SN74AUP1T97YEPR SN74AUP1T97YEPR Tape and reel SN74AUP1T97DCKR SN74AUP1T97DCKR TH_ _ _ _TH_ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, · = Pb-free). FUNCTION SELECTION TABLE LOGIC FUNCTION FIGURE NO. 2-to-1 data selector 5 2-input AND gate 6 2-input OR gate with one inverted input 7 2-input NAND gate with one inverted input 7 2-input AND gate with one inverted input 8 2-input NOR gate with one inverted input 8 2-input OR gate 10 Noninverted buffer Static-Power Consumption (µA) 9 Inverter 11 Dynamic-Power Consumption (pF) 100% 100% 80% 80% Switching Characteristics at 25 MHz 3.5 3 60% 60% 3.3-V Logic 40% 40% Voltage - V 2.5 3.3-V LVC Logic 20% 20% AUP 0% 0% AUP Single, dual, and triple gates Figure 1. AUP ­ The Lowest-Power Family 2 1.5 1 Input Output 0.5 0 -0.5 0 5 10 15 20 25 30 Time - ns 35 40 45 AUP1G08 AUP1G08 data at C = 15 pF L Figure 2. Excellent Signal Integrity 2 SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 3.3 V 3.3 V VIH = 1.19 V VIL = 0.5 V VIH = 1.19 V VIL = 0.5 V 1.8-V System 3.3-V System 2.5-V System 3.3-V System SN74AUP1T57 SN74AUP1T57 SN74AUP1T57 SN74AUP1T57 2.5 V 2.5 V VIH = 1.10 V VIL = 0.35 V VIH = 1.10 V VIL = 0.35 V 1.8-V System 3.3-V System 2.5-V System SN74AUP1T57 SN74AUP1T57 2.5-V System SN74AUP1T57 SN74AUP1T57 Figure 3. Possible Voltage-Translation Combinations 3.3 V 1.8-V System 3.3-V System SN74AUP1T57 SN74AUP1T57 VOH min VT+ max = VIH min = 1.19 V VT- min = VIL max = 0.5 V VOL max Input Switching Waveform Output Switching Waveform Figure 4. Switching Thresholds for 1.8-V to 3.3-V Translation 3 SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 FUNCTION TABLE INPUTS C B A OUTPUT Y L L L L L L H L L H L H L H H H H L L L H L H H H H L L H H H H LOGIC DIAGRAM (POSITIVE LOGIC) A 3 4 B C 4 1 6 Y SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 LOGIC CONFIGURATIONS VCC C B B A A 1 6 2 Y 5 3 C 4 Y GND Figure 5. 157: 2-to-1 Data Selector/MUX When C is L, Y = B When C is H, Y = A VCC C 1 A A 6 2 Y 5 3 4 C Y GND Figure 6. 08: 2-Input AND Gate VCC C Y A 1 C Y A A 6 2 5 3 4 C Y GND Figure 7. 14+32/14+00: 2-Input OR/NAND Gate With One Inverted Input VCC C Y B 6 5 3 Y B 1 2 B C 4 C Y GND Figure 8. 14+08/14+02: 2-Input AND/NOR Gate With One Inverted Input 5 SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 VCC C 1 5 3 B 6 2 Y B 4 C Y GND Figure 9. 32: 2-Input OR Gate VCC 1 Y 6 2 5 3 C 4 C Y GND Figure 10. 04/14: Inverter VCC B 6 2 Y 1 5 3 B 4 Y GND Figure 11. 17/34: Noninverted Buffer 6 SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range ­0.5 4.6 V VI Input voltage range (2) ­0.5 4.6 V ­0.5 4.6 V ­0.5 VCC + 0.5 state (2) UNIT VO Voltage range applied to any output in the high-impedance or power-off VO Output voltage range in the high or low state (2) IIK Input clamp current VI < 0 ­50 mA IOK Output clamp current VO < 0 ­50 mA IO Continuous output current ±20 mA Continuous current through VCC or GND ±50 mA DBV package Tstg (1) (2) (3) Package thermal impedance (3) 165 DCK package 259 YEP/YZP package JA V 123 Storage temperature range ­65 °C/W °C 150 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) MIN MAX UNIT VCC Supply voltage 2.3 3.6 V VI Input voltage 0 3.6 V VO Output voltage 0 VCC V IOH High-level output current IOL Low-level output current TA Operating free-air temperature (1) VCC = 2.3 V ­3.1 VCC = 3 V ­4 VCC = 2.3 V 3.1 VCC = 3 V 4 ­40 85 mA mA °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004 SCBA004. 7 SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = ­40°C to 85°C TA = 25°C VCC MIN TYP UNIT MAX MIN MAX VT+ Positive-going input threshold voltage 2.3 V to 2.7 V 0.6 1.1 0.6 1.1 3 V to 3.6 V 0.75 1.16 0.75 1.19 VT­ Negative-going input threshold voltage 2.3 V to 2.7 V 0.35 0.6 0.35 0.6 3 V to 3.6 V 0.5 0.85 0.5 0.85 VT Hysteresis (VT+ ­ VT­) 2.3 V to 2.7 V 0.23 0.6 0.2 0.6 3 V to 3.6 V 0.25 0.56 0.25 0.56 IOH = ­20 µA 2.3 V to 3.6 V IOH = ­2.3 mA VOH IOH = ­2.7 mA 3V IOH = ­4 mA IOL = 20 µA V 2.55 0.1 0.1 0.31 0.33 0.44 0.45 0.31 0.33 0.44 0.45 0 V to 3.6 V 0.1 0.5 µA 0V 0.1 0.5 µA 0 V to 0.2 V 0.2 0.5 µA 0.5 0.9 µA 3V IOL = 4 mA All inputs 2.6 2.3 V IOL = 3.1 mA IOL = 2.7 mA II 2.67 2.3 V to 3.6 V IOL = 2.3 mA VOL 1.85 2.72 V 1.97 1.9 V VCC ­ 0.1 2.05 2.3 V IOH = ­3.1 mA VCC ­ 0.1 V VI = 3.6 V or GND Ioff VI or VO = 0 V to 3.6 V Ioff VI or VO = 5.5 V ICC VI = 3.6 V or GND, IO = 0 2.3 V to 3.6 V One input at 0.3 V or 1.1 V, Other inputs at 0 or VCC, IO = 0 2.3 V to 2.7 V 4 One input at 0.45 V or 1.2 V, Other inputs at 0 or VCC, IO = 0 3 V to 3.6 V V 12 ICC µA Ci VI = VCC or GND 3.3 V 1.5 pF Co VO = VCC or GND 3.3 V 3 pF Switching Characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 12) PARAMETER FROM (INPUT) TO (OUTPUT) TA = ­40°C to 85°C TA = 25°C CL MIN TYP MAX MIN 5 pF 8 A, B, or C Y 1.8 2.3 2.9 0.5 6.8 10 pF 2.3 2.8 3.4 1 7.9 15 pF 2.6 3.1 3.8 1 8.7 30 pF tpd UNIT MAX 3.8 4.4 5.1 1.5 10.8 ns SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 Switching Characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 12) PARAMETER FROM (INPUT) TO (OUTPUT) TA = ­40°C to 85°C TA = 25°C CL UNIT Y MAX MIN MAX 1.8 2.3 3.1 0.5 6 10 pF 2.2 2.8 3.5 1 7.1 15 pF 2.6 3.2 5.2 1 7.9 30 pF A, B, or C TYP 5 pF tpd MIN 3.7 4.4 5.2 1.5 10 ns Switching Characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 12) PARAMETER FROM (INPUT) TO (OUTPUT) TA = ­40°C to 85°C TA = 25°C CL UNIT Y MAX MIN MAX 2 2.7 3.5 0.5 5.5 10 pF 2.4 3.1 3.9 1 6.5 15 pF 2.8 3.5 4.3 1 7.4 30 pF A, B, or C TYP 5 pF tpd MIN 4 4.7 5.5 1.5 9.5 ns Switching Characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 12) PARAMETER FROM (INPUT) TO (OUTPUT) TA = ­40°C to 85°C TA = 25°C CL UNIT MIN TYP MAX MIN MAX 1.6 2 2.5 0.5 8 10 pF 2 2.4 2.9 1 8.5 15 pF 2.3 2.8 3.3 1 9.1 30 pF 3.4 3.9 4.4 1.5 9.8 5 pF tpd A, B, or C Y ns Switching Characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 12) PARAMETER FROM (INPUT) TO (OUTPUT) TA = ­40°C to 85°C TA = 25°C CL MIN TYP MAX MIN 5 pF tpd A, B, or C Y UNIT MAX 1.6 1.9 2.4 0.5 5.3 10 pF 2 2.3 2.7 1 6.1 15 pF 2.3 2.7 3.1 1 6.8 30 pF 3.4 3.8 4.2 1.5 8.5 ns 9 SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 Switching Characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 12) PARAMETER FROM (INPUT) TO (OUTPUT) TA = ­40°C to 85°C TA = 25°C CL MIN TYP MAX MIN 1.6 2.1 2.7 0.5 4.7 10 pF 2 2.4 3 1 5.7 15 pF 2.3 2.7 3.3 1 6.2 30 pF 3.4 3.8 4.4 1.5 7.8 5 pF tpd A, B, or C Y UNIT MAX ns Operating Characteristics TA = 25°C PARAMETER Cpd 10 Power dissipation capacitance TEST CONDITIONS f = 10 MHz VCC = 2.5 V VCC = 3.3 V TYP TYP 4 5 UNIT pF SN74AUP1T97 SN74AUP1T97 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS www.ti.com SCES613B SCES613B ­ OCTOBER 2004 ­ REVISED DECEMBER 2005 PARAMETER MEASUREMENT INFORMATION From Output Under Test CL (see Note A) VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V 5, 10, 15, 30 pF VI/2 VCC/2 5, 10, 15, 30 pF VI/2 VCC/2 1 M CL VMI VMO LOAD CIRCUIT VI VMI Input VMI 0V tPHL tPLH VOH VMO Output VMo VOL tPHL tPLH VOH Output VMo VMo VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS NOTES: A. B. C. D. CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , slew rate 1 V/ns. The outputs are measured one at a time, with one transition per measurement. tPLH and tPHL are the same as tpd. Figure 12. Load Circuit and Voltage Waveforms 11 PACKAGE OPTION ADDENDUM www.ti.com 14-Dec-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AUP1T97DBVR SN74AUP1T97DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUP1T97DBVRE4 SN74AUP1T97DBVRE4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUP1T97DBVT SN74AUP1T97DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUP1T97DBVTE4 SN74AUP1T97DBVTE4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUP1T97DCKR SN74AUP1T97DCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUP1T97DCKRE4 SN74AUP1T97DCKRE4 ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AUP1T97YEPR SN74AUP1T97YEPR ACTIVE WCSP YEP 6 3000 TBD SNPB Level-1-260C-UNLIM SN74AUP1T97YZPR SN74AUP1T97YZPR ACTIVE WCSP YZP 6 3000 Pb-Free (RoHS) SNAGCU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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