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QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS528B AUGUST 1995 REVISED SEPTEMBER 1996 D EPIC TM (Enhanced-Performance
SN54AC32 SN54AC32, SN74AC32 SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS528B SCAS528B AUGUST 1995 REVISED SEPTEMBER 1996 D EPIC TM (Enhanced-Performance Implanted CMOS) 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic (N) and Ceramic (J) DIPS SN54AC32 SN54AC32 . . . J OR W PACKAGE SN74AC32 SN74AC32 . . . D, DB, N, OR PW PACKAGE (TOP VIEW) 1A 1B 1Y 2A 2B 2Y GND description The 'AC32 are quadruple 2-input positive-OR gates. The devices perform the Boolean function Y = A + B or Y = A · B in positive logic. OUTPUT Y H X H X H H L L L 1B 2A 2B 3A 3B 4A 4B 1 12 4 11 5 10 6 9 7 8 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3B NC No internal connection logic symbol 1A 3 VCC 4B 4A 4Y 3B 3A 3Y 2Y GND NC 3Y 3A B 13 1B 1A NC VCC 1Y NC 2A NC 2B FUNCTION TABLE (each gate) A 14 2 SN54AC32 SN54AC32 . . . FK PACKAGE (TOP VIEW) The SN54AC32 SN54AC32 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74AC32 SN74AC32 is characterized for operation from 40°C to 85°C. INPUTS 1 4B D logic diagram, each gate (positive logic) 1 3 2 A 1Y Y B 4 6 5 2Y 9 8 10 3Y 12 11 13 4Y This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, J, N, PW, and W packages. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright © 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 SN54AC32 SN54AC32, SN74AC32 SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS528B SCAS528B AUGUST 1995 REVISED SEPTEMBER 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . . . 1.25 W DB package . . . . . . . . . . . . . . . . . . . 0.5 W N package . . . . . . . . . . . . . . . . . . . . 1.1 W PW package . . . . . . . . . . . . . . . . . . . 0.5 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils, except for the N package, which has a trace length of zero. recommended operating conditions (see Note 3) SN54AC32 SN54AC32 VCC VIH High-level i p voltage High l l input l g VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V MAX MIN MAX 2 Supply voltage SN74AC32 SN74AC32 MIN 6 2 6 2.1 3.15 3.85 3.85 V 0.9 Low-level input voltage L l li p l g VI VO Input voltage 0 Output voltage 0 IOH High-level output current p High l l VCC = 4.5 V VCC = 5.5 V 0.9 1.35 VIL 1.35 1.65 VCC VCC 0 VCC VCC t /v VCC = 3 V VCC = 4.5 V 12 24 24 12 24 24 24 24 Input transition rise or fall rate mA A mA A 0 TA Operating free-air temperature NOTE 3: Unused inputs must be held high or low to prevent them from floating. 2 V 24 12 V 12 24 VCC = 4.5 V VCC = 5.5 V Low-level output current L l l p V 1.65 0 VCC = 5.5 V VCC = 3 V IOL V 2.1 3.15 UNIT POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 8 0 8 ns / V 55 125 40 85 °C SN54AC32 SN54AC32, SN74AC32 SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS528B SCAS528B AUGUST 1995 REVISED SEPTEMBER 1996 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 25°C TYP MAX SN54AC32 SN54AC32 SN74AC32 SN74AC32 MIN MIN VCC 3V IOH = 12 mA 2.9 4.4 4.4 4.4 5.4 5.4 5.4 MAX 3V 2.4 3.7 3.76 4.86 4.7 MAX 2.46 3.86 5.5 V IOH = 50 mA IOH = 75 mA 2.56 4.5 V IOH = 24 mA 4.76 5.5 V V 3.85 5.5 V 3.85 3V VOL 0.1 0.1 0.001 0.1 0.1 0.1 0.001 0.1 0.1 0.1 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 5.5 V IOL = 24 mA 0.1 5.5 V IOL = 12 mA 0.002 4.5 V µA IOL = 50 µA 0.36 0.5 0.44 IOL = 50 mA IOL = 75 mA II ICC A or B ports UNIT 2.9 5.5 V VOH 2.9 4.5 V µA IOH = 50 µA MIN 5.5 V VI = VCC or GND VI = VCC or GND, 5.5 V V 1.65 5.5 V 1.65 ± 0.1 ±1 IO = 0 5.5 V 2 Ci VI = VCC or GND 5V 2.6 Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. ±1 µA 40 20 µA pF " switching characteristics over recommended operating free-air temperature range, 0.3 V (unless otherwise noted) (see Figure 1) VCC = 3.3 V PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B Y TA = 25°C MIN TYP MAX SN54AC32 SN54AC32 SN74AC32 SN74AC32 MIN MAX MIN MAX 1.5 7 9 1 12 1.5 10 1.5 7 8.5 1 11.5 1 9 UNIT ns " switching characteristics over recommended operating free-air temperature range, 0.5 V (unless otherwise noted) (see Figure 1) VCC = 5 V PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B Y TA = 25°C MIN TYP MAX SN54AC32 SN54AC32 SN74AC32 SN74AC32 MIN MAX MIN MAX 1.5 5.5 7.5 1 9 1 8.5 1.5 5 7 1 8.5 1 7.5 UNIT ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS POST OFFICE BOX 655303 UNIT CL = 50 pF, f = 1 MHz Power dissipation capacitance TYP 40 pF · DALLAS, TEXAS 75265 3 SN54AC32 SN54AC32, SN74AC32 SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS528B SCAS528B AUGUST 1995 REVISED SEPTEMBER 1996 PARAMETER MEASUREMENT INFORMATION TEST S1 tPLH/tPHL Open From Output Under Test CL = 50 pF (see Note A) S1 Open 50% VCC 50% VCC 0V tPLH 2 × VCC 500 VCC Input (see Note B) In-Phase Output tPHL 50% VCC tPHL 500 Out-of-Phase Output LOAD CIRCUIT VOH 50% VCC VOL tPLH 50% VCC VOH 50% VCC VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ("Critical Applications"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright © 1996, Texas Instruments Incorporated