SN54AHCT74 SN74AHCT74 SCLS263M A114-A A115-A AHCT74 SN74AHCT74RGYR SN74AHCT74N

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M DECEMBER 1995 REVISED SEPTEMBER 2002 D

SN54AHCT74 SN54AHCT74, SN74AHCT74 SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M SCLS263M DECEMBER 1995 REVISED SEPTEMBER 2002 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 3 12 4 11 5 10 6 9 7 8 1D 1CLK 1PRE 1Q 1Q 2 13 2CLR 3 12 2D 4 11 2CLK 5 1CLK NC 1PRE NC 1Q 10 2PRE 9 2Q 6 7 2CLR 14 1D 1 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 8 2D NC 2CLK NC 2PRE 1Q GND NC 2Q 2Q 13 SN54AHCT74 SN54AHCT74 . . . FK PACKAGE (TOP VIEW) VCC 14 2 1CLR 1 GND 1CLR 1D 1CLK 1PRE 1Q 1Q GND SN74AHCT74 SN74AHCT74 . . . RGY PACKAGE (TOP VIEW) 1CLR NC VCC SN54AHCT74 SN54AHCT74 . . . J OR W PACKAGE SN74AHCT74 SN74AHCT74 . . . D, DB, DGV, N, NS, OR PW PACKAGE (TOP VIEW) ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A A114-A) 200-V Machine Model (A115-A A115-A) 1000-V Charged-Device Model (C101) 2Q D D NC No internal connection description/ordering information The 'AHCT74 AHCT74 dual positive-edge-triggered devices are D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. ORDERING INFORMATION ORDERABLE PART NUMBER PACKAGE TA TOP-SIDE MARKING QFN RGY Tape and reel SN74AHCT74RGYR SN74AHCT74RGYR HB74 PDIP N Tube SN74AHCT74N SN74AHCT74N SN74AHCT74N SN74AHCT74N Tube SN74AHCT74D SN74AHCT74D Tape and reel SN74AHCT74DR SN74AHCT74DR SOP NS Tape and reel SN74AHCT74NSR SN74AHCT74NSR AHCT74 AHCT74 SSOP DB Tape and reel SN74AHCT74DBR SN74AHCT74DBR HB74 TSSOP PW Tape and reel SN74AHCT74PWR SN74AHCT74PWR HB74 TVSOP DGV Tape and reel SN74AHCT74DGVR SN74AHCT74DGVR HB74 CDIP J Tube SNJ54AHCT74J SNJ54AHCT74J SNJ54AHCT74J SNJ54AHCT74J CFP W Tube SNJ54AHCT74W SNJ54AHCT74W SNJ54AHCT74W SNJ54AHCT74W LCCC FK Tube SNJ54AHCT74FK SNJ54AHCT74FK SNJ54AHCT74FK SNJ54AHCT74FK SOIC D 40°C to 85°C 55°C to 125°C AHCT74 AHCT74 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535 MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 SN54AHCT74 SN54AHCT74, SN74AHCT74 SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M SCLS263M DECEMBER 1995 REVISED SEPTEMBER 2002 FUNCTION TABLE (each flip-flop) INPUTS OUTPUTS PRE CLR CLK D Q Q L H X X H L H L X X L H L L X X H H H H H H L H H L L H H H L X Q0 Q0 This configuration is unstable; that is, it does not persist when PRE or CLR returns to its inactive (high) level. logic diagram, each flip-flop (positive logic) PRE CLK C C C Q TG C C C C TG TG TG C D C C Q CLR 2 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 SN54AHCT74 SN54AHCT74, SN74AHCT74 SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M SCLS263M DECEMBER 1995 REVISED SEPTEMBER 2002 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W (see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W (see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W (see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W (see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W (see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 3. The package thermal impedance is calculated in accordance with JESD 51-5. recommended operating conditions (see Note 4) SN54AHCT74 SN54AHCT74 SN74AHCT74 SN74AHCT74 MIN MAX MIN MAX 4.5 5.5 4.5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 5.5 VO IOH Output voltage 0 VCC 8 IOL t/v Low-level output current High-level input voltage 2 2 0.8 High-level output current UNIT V V 0.8 V 0 5.5 V 0 VCC 8 V mA 8 8 mA 20 Input transition rise or fall rate 20 ns/V TA Operating free-air temperature 55 125 40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004 SCBA004. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 3 SN54AHCT74 SN54AHCT74, SN74AHCT74 SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M SCLS263M DECEMBER 1995 REVISED SEPTEMBER 2002 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VOH IOH = 50 mA IOH = 8 mA 4.5 45V VOL IOL = 50 mA IOL = 8 mA VI = 5.5 V or GND VI = VCC or GND, ICC One input at 3.4 V, Other inputs at VCC or GND TA = 25°C TYP MAX 45V 4.5 II ICC MIN 4.4 4.5 MIN MAX SN74AHCT74 SN74AHCT74 MIN 4.4 MAX 4.4 3.8 3.94 3.8 UNIT V 0.1 0.1 0.1 0.36 0.44 0.44 V ±0.1 ±1* ±1 mA 5.5 V 2 20 20 mA 5.5 V 1.35 1.5 1.5 mA 10 pF 0 V to 5.5 V IO = 0 SN54AHCT74 SN54AHCT74 Ci VI = VCC or GND 5V 2 10 * On products compliant to MIL-PRF-38535 MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. This is the increase in supply current for each input at one of the specified TTL voltage levels rather than 0 V or VCC. timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN MAX PARAMETER SN54AHCT74 SN54AHCT74 MIN MAX SN74AHCT74 SN74AHCT74 MIN PRE or CLR low Pulse duration tsu Setup time before CLK th 5 5 5 CLK tw 5 5 MAX 5 Hold time, data after CLK Data 5 5 3.5 3.5 0 0 ns 5 3.5 PRE or CLR inactive UNIT 0 ns ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE MIN TA = 25°C TYP MAX MIN MAX SN74AHCT74 SN74AHCT74 MIN CL = 15 pF 100* 160* 80* 80 140 65 MAX 80 CL = 50 pF fmax 65 tPLH tPHL PRE or CLR Q or Q CL = 15 pF tPLH tPHL CLK Q or Q CL = 15 pF tPLH tPHL PRE or CLR Q or Q CL = 50 pF tPLH tPHL CLK Q or Q CL = 50 pF POST OFFICE BOX 655303 10.4* 1* 12* 1 12 7.6* 10.4* 1* 12* 1 12 5.8* 7.8* 1* 9* 1 9 5.8* 7.8* 1* 9* 1 9 8.1 11.4 1 13 1 13 8.1 11.4 1 13 1 13 6.3 8.8 1 10 1 10 6.3 8.8 1 10 1 10 · DALLAS, TEXAS 75265 UNIT MHz 7.6* * On products compliant to MIL-PRF-38535 MIL-PRF-38535, this parameter is not production tested. 4 SN54AHCT74 SN54AHCT74 ns ns ns ns SN54AHCT74 SN54AHCT74, SN74AHCT74 SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M SCLS263M DECEMBER 1995 REVISED SEPTEMBER 2002 noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 5) SN74AHCT74 SN74AHCT74 PARAMETER MIN MAX UNIT VOL(P) VOL(V) Quiet output, maximum dynamic VOL 0.8 V Quiet output, minimum dynamic VOL 0.8 V VOH(V) VIH(D) Quiet output, minimum dynamic VOH 4 High-level dynamic input voltage 2 VIL(D) Low-level dynamic input voltage NOTE 5: Characteristics are for surface-mount packages only. V V 0.8 V TYP UNIT operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 f = 1 MHz 32 pF 5 SN54AHCT74 SN54AHCT74, SN74AHCT74 SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCLS263M SCLS263M DECEMBER 1995 REVISED SEPTEMBER 2002 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point RL = 1 k From Output Under Test VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.5 V th tsu 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL 1.5 V tPLZ VCC 50% VCC Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V tPZL tPZH tPLH 50% VCC 3V Output Control VOL + 0.3 V VOL tPHZ 50% VCC VOH 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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