SN75LBC978 SLLS134F RS-485 75LBC176 74HC241 MO-118 SN75LBC978DL SN75LBC978DLG4 - Datasheet Archive

 

9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F - APRIL 1992 - REVISED APRIL 2005 D Nine Differential Channels for the Data and D D D

 

SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 D Nine Differential Channels for the Data and D D D D D D D D DL PACKAGE (TOP VIEW) Control Paths of the Differential Small Computer Systems Interface (SCSI) Meets or Exceeds the Requirements of ANSI Standard RS-485 RS-485 and ISO 8482:1987(E) Packaged in Shrink Small-Outline Package With 25-mil Terminal Pitch Designed to Operate at 10 Million Transfers Per Second Low Disabled Supply Current 1.4 mA Typ Thermal Shutdown Protection Power-Up/Power-Down Glitch Protection Positive and Negative Output-Current Limiting Open-Circuit Fail-Safe Receiver Design NC WRAP2 WRAP1 1A 1DE/RE 2A 2DE/RE 3A 3DE/RE 4A 4DE/RE VCC GND GND GND GND GND VCC 5A 5DE/RE 6A 6DE/RE 7A 7DE/RE 8A 8DE/RE 9A 9DE/RE description The SN75LBC978 SN75LBC978 is a nine-channel differential transceiver based on the 75LBC176 75LBC176 LinASIC cell. Use of TI's LinBiCMOS process technology allows the power reduction necessary to integrate nine differential balanced transceivers. On-chip enabling logic makes this device applicable for the data path (eight data bits plus parity) and the control path (nine bits) for the Small Computer Systems Interface (SCSI) standard. The WRAP function allows in-circuit testing and wired-OR channels for the BSY, RST, and SEL signals of the SCSI bus. 1 56 2 55 3 54 4 53 5 52 6 51 7 50 8 49 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 25 32 26 31 27 30 28 29 NC NC CE 9B + 9B - 8B + 8B - 7B + 7B - 6B + 6B - VCC GND GND GND GND GND VCC 5B + 5B - 4B + 4B - 3B + 3B - 2B + 2B - 1B + 1B - Pins 13 through 17 and 40 through 44 are connected together to the package lead frame and signal ground. The SN75LBC978 SN75LBC978 is packaged in a shrink small-outline package (DL) with improved thermal characteristics using heat-sink terminals. This package is ideal for low-profile, space-restricted applications such as hard disk drives. The switching speed of the SN75LBC978 SN75LBC978 is sufficient to transfer data over the data bus at 10 million transfers per second. Each of the nine identical channels conforms to the requirements of the ANSI RS-485 RS-485 and ISO 8482:1987(E) standards referenced by ANSI X3.131-1993 (SCSI-2) and the proposed SCSI-3 standards. The SN75LBC978 SN75LBC978 is characterized for operation from 0°C to 70°C. Patent Pending LinASIC and LinBiCMOS are trademarks of Texas Instruments Incorporated. Copyright 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 logic diagram (positive logic) 1A WRAP1 1DE/RE CE 2A 2DE/RE 3A 3DE/RE 4A 4DE/RE 5A 5DE/RE 4 30 3 29 54 6 7 32 Channel 2 8 9 11 Channel 3 33 36 Channel 4 35 38 19 20 31 34 10 6A 6DE/RE 22 Channel 5 37 47 Channel 6 46 23 49 2 48 WRAP2 7DE/RE 8A 8DE/RE 9A 9DE/RE 2 1B - 5 21 7A 1B+ 2B+ 2B - 3B+ 3B - 4B+ 4B - 5B+ 5B - 6B+ 6B - 7B+ 7B - 24 51 25 26 Channel 8 27 28 50 53 Channel 9 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 52 8B+ 8B - 9B+ 9B - SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 schematics of inputs and outputs ALL INPUTS EXCEPT CE INPUT CE VCC VCC 22 k 300 300 Input Input 50 k B+ AND B - I/O PORTS RECEIVER OUTPUT VCC VCC 100 k B+ Only 3 k 18 k Receiver Driver A Output 100 k B - Only 12 k 1 k B+ or B - absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 7 V Bus voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10 V to 15 V Data I/O and control (A-side) voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 7 V Receiver output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±24 mA Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are dc and with respect to GND. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 3 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 recommended operating conditions MIN MAX UNIT 4.75 Supply voltage, VCC NOM 5 5.25 V 12 Voltage at any bus terminal (separately or common-mode), VO, VI, or VIC B + or B - High-level input voltage, VIH All except B + and B - Low-level input voltage, VIL All except B + and B - 0.8 V B + or B - -60 mA A -8 mA B + or B - 60 mA 8 mA 70 °C High-level output current, IOH Low-level output current, IOL -7 2 V A Operating free-air temperature, TA V 0 device electrical characteristics over recommended ranges of operating conditions PARAMETER TEST CONDITIONS MIN TYP IIH High-level input current VIH = 2 V IIL Low-level input current 100 CO CE Cpd µA 100 µA 3 mA 29 45 mA 7 CE at 0 V All receivers enabled No load, CE at 5 V, VID = 5 V, WRAP and DE/RE at 0 V No load, WRAP at 0 V CE and DE/RE at 5 V, Bus port output capacitance µA 10 mA VIL = 0.8 V All drivers enabled Supply current µA -200 See Figure 1 All drivers and receivers disabled ICC UNIT 1.4 CE A, WRAP, DE/RE MAX -200 A, WRAP, DE/RE 19 pF One driver Power dissipation capacitance B + or B - 460 pF 40 pF One receiver driver electrical characteristics over recommended ranges of operating conditions (unless otherwise noted) PARAMETER | VOD | Differential output voltage IOS IOZ Output short-circuit current 4 TEST CONDITIONS Vtest = - 7 V to 12 V, See Figure 3 High-impedance-state output current MIN TYP 1 2 See Figure 2 See receiver input current POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 MAX UNIT V ± 250 mA SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 receiver electrical characteristics over recommended ranges of operating conditions (unless otherwise noted) (see Figure 3) PARAMETER TEST CONDITIONS VOH VOL High-level output voltage VID = 200 mV, VID = - 200 mV, VIT+ VIT- Differential-input high-level threshold voltage Vhys Receiver input hysteresis voltage ( VIT+ - VIT- ) Low-level output voltage Differential-input low-level threshold voltage IOH = - 8 mA IOL = 8 mA MIN TYP MAX 2.5 UNIT V V 0.2 IOH = - 8 mA IOL = 8 mA 0.8 V -0.2 V 45 mV VI = 12 V, Other input at 0 V IOZ B+ and B - High-impedance-state output current 1 mA VCC = 0 V, 0.8 1 mA VI = - 7 V, Other input at 0 V VCC = 5 V, -0.5 -0.8 mA VI = - 7 V, Other input at 0 V Receiver input current 0.7 VI = 12 V, Other input at 0 V II VCC = 5 V, VCC = 0 V, -0.4 -0.8 mA VO = GND VO = VCC -200 50 µA driver switching characteristics over recommended ranges of operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS See Figure 4 td(OD) tsk(lim) tsk(p) tt Differential delay time, high- to low-level output (td(ODH) or lowto high-level output (td(ODL) Skew limit, the maximum difference in propagation delay times between any two drivers on any two devices Pulse skew (|td(ODL) - td(ODH)|) MIN VCC = 5 V, See Figure 4 TA = 25°C, VCC = 5 V, See Figure 4 TA = 70°C, VCC = 5 V, MAX UNIT 26.4 See Note 2 14 18 22 18 22 26 ns 15 8 0 See Figure 4 Transition time (tr or tf) TYP 11.8 6 10 ns ns ns receiver switching characteristics over recommended ranges of operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS See Figure 5 tpd tsk(lim) Propagation delay time, high- to low-level output (tPHL) or low- to high-level output (tPLH) Skew limit, the maximum difference in propagation delay times between any two drivers on any two devices VCC = 5 V, See Figure 5 TA = 25°C, VCC = 5 V, See Figure 5 TA = 70°C, VCC = 5 V, TYP MAX UNIT 30.7 See Note 2 20.2 24.7 29.2 21.1 25.6 30.1 ns 12 tsk(p) Pulse skew ( |tPHL - tPLH| ) See Figure 5 tt Transition time ( tr or tf ) All typical values are at VCC = 5 V, TA = 25°C. Cpd determines the no-load dynamic current consumption; IS = Cpd VCC f + ICC. NOTE 2: This specification applies to any 5°C band within the operating temperature range. POST OFFICE BOX 655303 MIN 19.5 · DALLAS, TEXAS 75265 9 2 3 6 ns ns ns 5 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 transceiver switching characteristics over recommended ranges of operating conditions PARAMETER TEST CONDITIONS MIN MAX UNIT ten(TXL) ten(TXH) Enable time, transmit-to-receive to low-level output 80 ns Enable time, transmit-to-receive to high-level output 80 ns ten(RXL) ten(RXH) Enable time, receive-to-transmit to low-level output 150 ns 150 ns tsu Setup time, WRAP1 or WRAP2 before active input(s) or output(s) See Figure 6 Enable time, receive-to-transmit to high-level output 150 ns thermal characteristics PARAMETER TEST CONDITIONS RJA RJC MIN TYP Junction-to-case thermal resistance Board mounted, No air flow °C/ W Vtest R1 = 165 B+ A 0 V or 3 V RL = 75 VOD B- CE and DE/RE at 2 V, WRAP1 and WRAP2 at 0.8 V R2 = 165 Vtest Figure 1. Driver VOD Test Circuit CE at 2 V, DE/RE and WRAP1 or WRAP2 at 0.8 V (see Note A) VI, VIC, VIH, or VIL VIT +, VIT - , or VID B+ A B- VOH or VOL NOTE A: For the IOZ measurement, CE is at 0.8 V. Figure 2. Receiver Test Circuit and Input Conditions 6 UNIT °C/ W PARAMETER MEASUREMENT INFORMATION -II, -IIH, or -IIL MAX 50 12 Junction-to-free-air thermal resistance POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 -IOH, - IOL, or -IOZ SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION B+ B- A -IIH or -IIL VIH or VIL VOD -IOH, - IOL, - IOS, or -IOZ VO, VOH, or VOL CE and DE/RE at 2 V, WRAP1 and WRAP2 at 0.8 V (see Note A) NOTE A: For the IOZ test, the CE input is at 0.8 V. Figure 3. Driver Test and Input Conditions GND R1 = 165 B+ A Input (see Note A) RL = 75 Output B- R2 = 165 50 pF 50 pF 5V CE and DE/RE at VCC TEST CIRCUIT 3V 1.5 V 0V Input td(ODH) Output td(ODL) 90% 90% 10% tr 10% 0V tf VOLTAGE WAVEFORMS Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . Figure 4. Driver Propagation Delay Time Test Circuit and Waveforms POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 7 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION CE at VCC, DE/RE, WRAP1 and WRAP2 at GND Input (see Note A) B+ 1.5 V B- A 15 pF Output TEST CIRCUIT 3V 1.5 V 0V Input tPLH tPHL 90% Output 90% 10% tr 10% VOH 1.4 V VOL tf VOLTAGE WAVEFORMS Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . Figure 5. Receiver Propagation Delay Time Test Circuit and Waveforms 8 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION 0V 3V S1 0V S3 5V R1 = 165 74HC241 74HC241 B+ A 50 pF 75 50 pF B- VOD R2 = 165 DE/RE Input (see Note A) CE at VCC, WRAP1 and WRAP2 at GND 5V S2 0V VA TEST CIRCUIT 3V Input 0V ten(RXL) VA 1.4 V S1 to 0 V S2 to 5 V S3 to 3 V ten(TXH) 0V VOD 3V Input 0V ten(RXH) 1.4 V VA S1 to 5 V S2 to 0 V S3 to 0 V ten(TXL) VOD 0V VOLTAGE WAVEFORMS Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . Figure 6. Enable Time Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 9 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 TYPICAL CHARACTERISTICS INPUT CURRENT vs INPUT VOLTAGE AVERAGE SUPPLY CURRENT vs FREQUENCY 0 400 -10 I I - Input Current - µ A I CC - Average Supply Current - mA 1000 100 40 9 Unloaded Receivers 10 4 1 0.001 9 Unloaded Drivers 0.004 0.01 VCC = 4.75 V TA = 25°C A, DE/RE, WRAP1, WRAP2 - 20 - 30 - 40 - 50 0.04 1 2 4 - 60 0 10 0.5 1 1.5 Figure 8 Figure 7 INPUT CURRENT vs INPUT VOLTAGE 5 4 VCC = 4.75 V TA = 25°C B + and B - 3 I I - Input Current - mA 2.5 3 VI - Input Voltage - V f - Frequency - MHz 2 1 0 -1 -2 -3 -4 -5 - 20 -16 -12 - 8 - 4 0 4 8 12 VI - Input Voltage - V Figure 9 10 2 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 16 20 3.5 4 4.5 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 TYPICAL CHARACTERISTICS DRIVER DRIVER LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 2.1 VOH - High-Level Output Voltage - mV 1.9 1.8 1.7 1.6 1.5 1.4 1.3 4.75 4.5 4.25 4 VCC = 5.25 V 3.75 VCC = 5 V 3.5 3.25 3 2.75 1.2 VCC = 4.75 V 2.5 1.1 0 10 20 30 40 50 60 70 80 0 90 100 10 20 30 40 50 60 70 80 90 IOH - High-Level Output Current - mA IOL - Low-Level Output Current - mA Figure 10 Figure 11 DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT 5 TA = 25°C VOD - Differential Output Voltage - V VOL - Low-Level Output Voltage - V B+ and B - VCC = 5 V B+ and B - 2 4 3 VCC = 5 V 2 VCC = 5.25 V 1 VCC = 4.75 V 0 0 10 20 30 40 50 60 70 80 90 100 IO - Output Current - mA Figure 12 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 11 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 TYPICAL CHARACTERISTICS DRIVER DRIVER LOW-LEVEL OUTPUT CURRENT vs SUPPLY VOLTAGE HIGH-LEVEL OUTPUT CURRENT vs SUPPLY VOLTAGE 80 0 B+ and B - 70 I OH - High-Level Output Current - mA I OL - Low-Level Output Current - mA B+ and B - 60 50 40 30 20 10 0 2 2.5 3 3.5 4 4.5 5 -10 - 20 - 30 - 40 - 50 - 60 - 70 - 80 5.5 2 2.5 VCC - Supply Voltage - V 3 3.5 4 4.5 5 Figure 13 Figure 14 RECEIVER RECEIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 2 5.5 VCC = 5 V VOL - Low-Level Output Voltage - V 5 VOH - High-Level Output Voltage - V 5.5 VCC - Supply Voltage - V 4.5 VCC = 5.25 V 4 VCC = 5 V 3.5 3 2.5 2 1.5 VCC = 4.75 V 1 VCC = 4.75 V 1.5 VCC = 5.25 V 1 0.5 0.5 0 0 0 -10 - 20 - 30 - 40 - 50 - 60 -70 IOH - High-Level Output Current - mA 0 10 Figure 15 12 20 30 Figure 16 POST OFFICE BOX 655303 40 50 IOL - Low-Level Output Current - mA · DALLAS, TEXAS 75265 60 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 TYPICAL CHARACTERISTICS RECEIVER DRIVER PROPAGATION DELAY vs FREE-AIR TEMPERATURE DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 26.5 1 tpd - Propagation Delay Time - ns 0.8 0.6 0.4 0.2 0 160 26 VCC = 4.75 V 25.5 25 VCC = 5.25 V 24.5 24 165 175 170 0 10 20 30 40 50 60 70 TA - Free-Air Temperature - °C TA - Free-Air Temperature - °C Figure 17 Figure 18 DRIVER PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 23 22 tpd - Propagation Delay Time - ns VOD - Differential Output Voltage - V B+ and B - 21 VCC = 4.75 V 20 19 18 VCC = 5.25 V 17 16 15 0 10 20 30 40 50 60 70 TA - Free-Air Temperature - °C Figure 19 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 13 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 APPLICATION INFORMATION function tables Table 1. Channel Configuration for Totem Pole Circuit Table 2. Channel Configuration for Emitter Follower Circuit CE is high, WRAP1 or WRAP2 is high CE is high, WRAP1 or WRAP2 is low Emitter Follower Totem Pole DE/RE B+ A B- B+ DE/RE A B- Open Collector INPUTS DE/RE L L H H A X X L H OUTPUTS B + L H X X B - H L X X A L H Z Z B+ Z Z L H Z Z H L H = high level L = low level X = irrelevant Z = high impedance An H in this column represents a voltage 200 mV higher than the other bus input. An L represents a voltage 200 mV lower than the other bus input. Any voltage less than 200 mV results in an indeterminate receiver output. 14 INPUTS B- POST OFFICE BOX 655303 OUTPUTS DE/RE B+ B- A B+ B- L L H H L H X X H L X X L H H H Z Z H H Z Z L L H = high level L = low level X = irrelevant Z = high impedance · DALLAS, TEXAS 75265 SN75LBC978 SN75LBC978 9CHANNEL DIFFERENTIAL TRANSCEIVER SLLS134F SLLS134F - APRIL 1992 - REVISED APRIL 2005 MECHANICAL INFORMATION DL (R-PDSO-G*) PLASTIC SMALL-OUTLINE PACKAGE 48 PIN SHOWN 0.025 (0,635) 0.012 (0,305) 0.008 (0,203) 48 0.005 (0,13) M 25 0.006 (0,15) NOM 0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03) Gage Plane 0.010 (0,25) 1 0°- 8° 24 0.040 (1,02) A 0.020 (0,51) Seating Plane 0.110 (2,79) MAX 0.004 (0,10) 0.008 (0,20) MIN PINS * 28 48 56 A MAX 0.380 (9,65) 0.630 (16,00) 0.730 (18,54) A MIN 0.370 (9,40) 0.620 (15,75) 0.720 (18,29) DIM 4040048 / C 03/97 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MO-118 MO-118 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 15 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN75LBC978DL SN75LBC978DL ACTIVE SSOP DL 56 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN75LBC978DLG4 SN75LBC978DLG4 ACTIVE SSOP DL 56 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN75LBC978DLR SN75LBC978DLR ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN75LBC978DLRG4 SN75LBC978DLRG4 ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN75LBC978DLR SN75LBC978DLR Package Package Pins Type Drawing SSOP DL 56 SPQ Reel Reel Diameter Width (mm) W1 (mm) 1000 330.0 32.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 11.35 18.67 3.1 16.0 32.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN75LBC978DLR SN75LBC978DLR SSOP DL 56 1000 346.0 346.0 49.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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