SN75LBC976 SLLS133D RS-485 75LBC176 74HC241 DBE10 DBE11 DBE12 DBE13 DBE14 DBE15 - Datasheet Archive

 

9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 · · · · ·

 

SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 · · · · · · · · · Nine Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface (SCSI) and Intelligent Peripheral Interface (IPI-2) Meets or Exceeds the Requirements of ANSI Standard RS-485 RS-485 and ISO 8482:1987(E) Packaged in Shrink Small-Outline Package With 25-mil Terminal Pitch Designed to Operate at 10 Million Transfers Per Second Low Disabled Supply Current 1.4 mA Typical Thermal-Shutdown Protection Power-Up/Power-Down Glitch Protection Positive and Negative Output-Current Limiting Open-Circuit Fail-Safe Receiver Design DL PACKAGE (TOP VIEW) GND BSR CRE 1A 1DE/RE 2A 2DE/RE 3A 3DE/RE 4A 4DE/RE VCC GND GND GND GND GND VCC 5A 5DE/RE 6A 6DE/RE 7A 7DE/RE 8A 8DE/RE 9A 9DE/RE description The SN75LBC976 SN75LBC976 is a nine-channel differential transceiver based on the 75LBC176 75LBC176 LinASICTM cell. Use of TI's LinBiCMOSTM process technology allows the power reduction necessary to integrate nine differential transceivers. On-chip enabling logic makes this device applicable for the data path (eight data bits plus parity) and the control path (nine bits) for both the Small Computer Systems Interface (SCSI) and the Intelligent Peripheral Interface (IPI-2) standard data interfaces. 1 56 2 55 3 54 4 53 5 52 6 51 7 50 8 49 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 25 32 26 31 27 30 28 29 CDE2 CDE1 CDE0 9B + 9B ­ 8B + 8B ­ 7B + 7B ­ 6B + 6B ­ VCC GND GND GND GND GND VCC 5B + 5B ­ 4B + 4B ­ 3B + 3B ­ 2B + 2B ­ 1B + 1B ­ Pins 13 through 17 and 40 through 44 are connected together to the package lead frame and signal ground. The SN75LBC976 SN75LBC976 is packaged in a shrink small-outline package (DL) with improved thermal characteristics using heat-sink terminals. This package is ideal for low-profile, space-restricted applications such as hard disk drives. The switching speed and testing capabilities of the SN75LBC976 SN75LBC976 are sufficient to transfer data over the data bus at 10 million transfers per second. Each of the nine channels conforms to the requirements of the ANSI RS-485 RS-485 and ISO 8482:1987(E) standards referenced by ANSI X3.129-1986 (IPI), ANSI X3.131-1993 (SCSI-2), and the proposed SCSI-3 standards. The SN75LBC976 SN75LBC976 is characterized for operation from 0°C to 70°C. Patent pending LinASIC and LinBiCMOS are trademarks of Texas Instruments Incorporated. Copyright © 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­1 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 logic diagram (positive logic) CDE0 CDE1 54 55 BSR 2 30 1B + 29 1B ­ 1A 4 1DE/RE 5 2A 2DE/RE 3A 3DE/RE 4A 4DE/RE 6 7 8 9 10 11 Channel 2 Channel 3 Channel 4 32 31 34 33 36 35 2B + 2B ­ 3B + 3B ­ 4B + 4B ­ CDE0 CDE2 56 CRE 5A 3 BSR BSR 38 19 37 5B + 5B ­ 5DE/RE 20 6A 6DE/RE 7A 7DE/RE 8A 8DE/RE 21 22 23 24 25 26 9A 27 9DE/RE Channel 6 Channel 7 Channel 8 BSR BSR CRE 28 POST OFFICE BOX 655303 6B + 6B ­ 7B + 7B ­ 8B + 8B ­ 53 9B + 52 9B ­ CDE0 For additional logic diagrams, see Application Information, Table 1 and Figures 7 through 44. 2­2 47 46 49 48 51 50 · DALLAS, TEXAS 75265 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 schematics of inputs and outputs ALL INPUTS EXCEPT CDE0, CDE1, AND CDE2 INPUTS CDE0, CDE1, AND CDE2, DE/RE VCC VCC 22 k Input Input 300 50 k B+ AND B ­ I/O PORTS RECEIVER OUTPUT VCC VCC 100 k B+ Only 3 k 18 k Receiver Driver A Output 100 k B ­ Only 12 k 1 k B+ or B ­ absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 0.3 V to 7 V Bus voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 10 V to 15 V Data I/O and control (A-side) voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 0.3 V to 7 V Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to GND. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­3 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 recommended operating conditions MIN Voltage at any bus terminal (separately or common-mode) VO, VI, or VIC common-mode), UNIT 5.25 V 12 All except B + and B ­ Low-level input voltage, VIL MAX 5 B + or B ­ High-level input voltage, VIH NOM 4.75 Supply voltage, VCC All except B + and B ­ ­7 2 V V 0.8 V ­ 60 mA A ­8 mA B + or B ­ 60 mA 8 mA 70 °C B + or B ­ High-level output current, IOH current Low-level output current, IOL current A Operating free-air temperature, TA 0 device electrical characteristics over recommended ranges of operating conditions (unless otherwise noted) PARAMETER IIH IIL High-level input current Low-level input current TEST CONDITIONS BSR, A, DE/RE, and CRE CDE0, CDE1, and CDE2 BSR, A, DE/RE, and CRE MIN TYP µA µA 100 VIL = 0 8 V 0.8 CDE0, CDE1, and CDE2 µA ­ 200 See Figure 1 S Fi UNIT 100 VIH = 2 V MAX ­ 200 µA All drivers and receivers disabled CO Cpd 3 mA All receivers enabled Supply current S l 1.4 No load, VID = 5 V, All other inputs at 0 V 29 45 mA All drivers enabled ICC BSR and CDE0 at 5 V, Other inputs at 0 V BSR at 0 V, No load, All other inputs at 5 V 4.8 10 mA Bus port output capacitance B + or B ­ Power dissipation capacitance 16 pF One driver 460 pF 50 pF One receiver All typical values are at VCC = 5 V, TA = 25°C. Cpd determines the no-load dynamic current consumption; IS = Cpd VCC f + ICC. driver electrical characteristics over recommended ranges of operating conditions (unless otherwise noted) PARAMETER | VOD | Differential output voltage IOS IOZ Output short-circuit current 2­4 TEST CONDITIONS Vtest = ­7 V to 12 V, See Figure 3 High-impedance-state output current MIN TYP 1 2 See Figure 2 See receiver input current POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 MAX UNIT V ± 250 mA SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 receiver electrical characteristics over recommended ranges of operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS VOH High-level output voltage VID = 200 mV, See Figure 1 VOL Low-level output voltage VID = ­ 200 mV, See Figure 1 VIT + VIT ­ Positive-going input threshold voltage IOH = ­ 8 mA, IOL = 8 mA, See Figure 1 Vhys Receiver input hysteresis voltage ( VIT + ­ VIT ­ ) TYP IOL = 8 mA, Negative-going input threshold voltage IOH = ­ 8 mA, MIN See Figure 1 MAX 2.5 UNIT V 0.8 V 0.2 V ­ 0.2 V 45 mV VI = 12 V, Other input at 0 V, IOZ Receiver i R i input current High-impedance-state output current 1 mA VI = 12 V, Other input at 0 V, VCC = 0, See Figure 1 0.8 1 mA VI = ­ 7 V, Other input at 0 V, VCC = 5 V, See Figure 1 ­ 0.5 ­ 0.8 mA VCC = 0, See Figure 1 ­ 0.4 ­ 0.8 mA See Figure 1 B+ d B and B ­ 0.7 VI = ­ 7 V, Other input at 0 V, II VCC = 5 V, See Figure 1 VO = GND VO = VCC ­ 200 µA 50 driver switching characteristics over recommended operating conditions (unless otherwise noted) (see Figure 4) PARAMETER TEST CONDITIONS MIN TYP MAX 7.6 td(OD) Differential delay time high- to low-level output (td(ODH) or low level time, high low- to high-level output (td(ODL) ) tsk(lim) Skew limit, the maximum difference in propagation delay times between any two drivers on any two devices VCC = 5 V, VCC = 5 V, TA = 25°C TA = 70°C VCC = 5 V, 17.1 11.5 19.5 See Note 2 12 tsk(p) Pulse skew ( | td(ODL) ­ td(ODH) | ) tt Transition time (tr or tf) All typical values are at VCC = 5 V, TA = 25°C. NOTE 2: This specification applies to any 5°C band within the operating temperature range. POST OFFICE BOX 655303 9.1 · DALLAS, TEXAS 75265 UNIT 19.6 8 0 10 6 ns ns ns ns 2­5 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 receiver switching characteristics over recommended operating conditions (see Figure 5) (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 21.5 Propagation delay time high to low level output (tPLH) or time, high- low-level low- to high-level output (tPHL) tpd VCC = 5 V, VCC = 5 V, Skew limit, the maximum difference in propagation delay times between any two drivers on any two devices tsk(lim) TA = 25°C TA = 70°C 22.6 31.6 23.4 32.4 12 VCC = 5 V, UNIT 33 See Note 2 9 tsk(p) Pulse skew ( | tPHL ­ tPLH| ) tt Transition time ( tr or tf ) All typical values are at VCC = 5 V, TA = 25°C. NOTE 2: This specification applies to any 5°C band within the operating temperature range. 2 6 3 ns ns ns ns transceiver switching characteristics over recommended operating conditions MAX UNIT ten(RXL) ten(RXH) Enable time, transmit-to-receive to low-level output PARAMETER TEST CONDITIONS MIN 150 ns Enable time, transmit-to-receive to high-level output 150 ns ten(TXL) ten(TXH) Enable time, receive-to-transmit to low-level output 80 ns 80 ns tsu Setup time, CDE0, CDE1, CDE2, BSR, or CRE to active input(s) or output(s) See Figure 6 S Fig Enable time, receive-to-transmit to high-level output 150 ns thermal characteristics PARAMETER RJA MIN TYP Junction-to-case thermal resistance Board mounted, No air flow °C/ W °C/ W CDE0, CDE1, CDE2, CRE, and BSR at 0 V, Others Open, (see Note A) VI, VIC, VIH, or VIL VIT + , VIT ­ , or VID B+ A B­ VOH or VOL NOTE A: For the IOZ measurement, BSR is at 5 V and CDE0, CDE1, and CDE2 are at 0 V. Figure 1. Receiver Test Circuit and Input Conditions 2­6 UNIT 50 PARAMETER MEASUREMENT INFORMATION ­ II, ­ IIH, or ­ IIL MAX 12 Junction-to-free-air thermal resistance RJC TEST CONDITIONS POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 ­ IOH, ­ IOL, or ­ IOZ SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION Vtest R1 = 165 B+ A 0 V or 3 V RL = 75 VOD B­ R2 = 165 CDE0 at 5 V, DE/RE at 5 V, BSR at 0 V, Others Open Vtest Figure 2. Driver VOD Test Circuit B+ A VOD B­ ­ IIH or ­ IIL VIH or VIL VO, VOH, or VOL CDE0 at 5 V, DE/RE at 5 V, BSR at 0 V Others Open (see Note A) ­ IOH, ­ IOL, ­ IOS, or ­ IOZ NOTE A: For the IOZ test, the BSR input is at 5 V and all others are at 0 V. Figure 3. Driver Test Circuit and Input Conditions POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­7 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION GND R1 = 165 B+ A Input (see Note A) RL = 75 Output B­ R2 = 165 CDE0 at 5 V, DE/RE at 5 V, BSR at 0 V, Others Open 50 pF 50 pF 5V TEST CIRCUIT 3V 1.5 V 0V Input td(ODH) Output td(ODL) 90% 90% 10% tr 10% 0V tf VOLTAGE WAVEFORMS Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . Figure 4. Driver Test Circuit and Voltage Waveforms 2­8 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION CDE0, CDE1, CDE2, CRE, and BSR at 0 V, All Others Open Input (see Note A) B+ 1.5 V B­ A 15 pF Output TEST CIRCUIT 3V 1.5 V 0V Input tPLH tPHL 90% Output 90% 10% tt 10% VOH 1.4 V VOL tt VOLTAGE WAVEFORMS Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . Figure 5. Receiver Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­9 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION 0V 3V S1 0V S3 5V 74HC241 74HC241 R1 165 B+ A 50 pF B­ DE/RE Input (see Note A) 75 50 pF VOD R2 165 CDE0 at 5 V, CDE1, CDE2, BSR, and CRE at 0 V, All Others Open 5V S2 0V VA TEST CIRCUIT 3V Input 1.5 V 1.5 V 0V ten(RXL) 1.4 V VA S1 to 0 V S2 to 5 V S3 to 3 V ten(TXH) 0V VOD 3V Input 1.5 V 1.5 V 0V ten(RXH) VA 1.4 V S1 to 5 V S2 to 0 V S3 to 0 V ten(TXL) VOD 0V VOLTAGE WAVEFORMS Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . Figure 6. Enable Time Test Circuit and Voltage Waveforms 2­10 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 TYPICAL CHARACTERISTICS AVERAGE SUPPLY CURRENT vs FREQUENCY INPUT CURRENT vs INPUT VOLTAGE 0 400 I I ­ Input Current ­ µ A 100 40 9 Unloaded Receivers 10 4 1 0.001 VCC = 4.75 V TA = 25°C A, DE/RE, CRE, BSR ­ 10 ­ 20 ­ 30 ­ 40 9 Unloaded Drivers ­ 50 0.004 0.01 0.04 1 2 4 ­ 60 0 10 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VI ­ Input Voltage ­ V f ­ Frequency ­ MHz Figure 7 Figure 8 INPUT CURRENT vs INPUT VOLTAGE 5 4 B+ and B ­ 3 I I ­ Input Current ­ mA I CC ­ Average Supply Current ­ mA 1000 2 1 0 ­1 ­2 ­3 ­4 ­5 ­ 20 ­ 16 ­ 12 ­ 8 ­ 4 0 4 8 12 16 20 VI ­ Input Voltage ­ V Figure 9 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­11 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 TYPICAL CHARACTERISTICS DRIVER DRIVER LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 2.1 VCC = 5 V B+ and B ­ B+ and B ­ 4.75 VOH ­ High-Level Output Voltage ­ mV VOL ­ Low-Level Output Voltage ­ V 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 4.5 4.25 4 VCC = 5.25 V 3.75 VCC = 5 V 3.5 3.25 3 2.75 VCC = 4.75 V 2.5 1.1 0 10 20 30 40 50 70 60 80 0 90 100 ­ 10 ­ 20 ­ 30 ­ 40 ­ 50 ­ 60 ­ 70 ­ 80 ­ 90 IOH ­ High-Level Output Current ­ mA IOL ­ Low-Level Output Current ­ mA Figure 10 Figure 11 DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT VOD ­ Differential Output Voltage ­ V 5 TA = 25°C 4 3 VCC = 5 V 2 VCC = 5.25 V 1 VCC = 4.75 V 0 0 10 20 30 40 50 60 70 80 IO ­ Output Current ­ mA Figure 12 2­12 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 90 100 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 TYPICAL CHARACTERISTICS DRIVER DRIVER LOW-LEVEL OUTPUT CURRENT vs SUPPLY VOLTAGE HIGH-LEVEL OUTPUT CURRENT vs SUPPLY VOLTAGE 80 0 I OH ­ High-Level Output Current ­ mA I OL ­ Low-Level Output Current ­ mA B+ and B ­ 70 60 50 40 30 20 10 B+ and B ­ ­ 10 ­ 20 ­ 30 ­ 40 ­ 50 ­ 60 ­ 70 0 2 2.5 3 3.5 4 4.5 5 ­ 80 5.5 2 2.5 VCC ­ Supply Voltage ­ V Figure 13 3 3.5 4 4.5 VCC ­ Supply Voltage ­ V 5 Figure 14 RECEIVER LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VOL ­ Low-Level Output Voltage ­ 0.5 V/div RECEIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5.5 VOH ­ High-Level Output Voltage ­ V 5.5 5 4.5 VCC = 5.25 V 4 VCC = 5 V 3.5 3 2.5 2 1.5 VCC = 4.75 V 1 2 VCC = 5 V VCC = 4.75 V 1.5 VCC = 5.25 V 1 0.5 0.5 0 0 0 ­ 10 ­ 20 ­ 30 ­ 40 ­ 50 ­ 60 ­ 70 IOH ­ High-Level Output Current ­ mA 0 10 20 30 40 50 60 IOL ­ Low-Level Output Current ­ mA Figure 15 Figure 16 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­13 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 TYPICAL CHARACTERISTICS DRIVER RECEIVER DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE t PHL or t PLH ­ Propagation Delay Time ­ ns 1 VOD ­ Differential Output Voltage ­ V B+ and B ­ 0.8 0.6 0.4 0.2 0 160 165 30 VCC = 4.75 V VCC = 5.25 V 25 20 15 10 5 0 ­ 25 175 170 35 0 TA ­ Free-Air Temperature ­ °C 25 Figure 17 Figure 18 DRIVER PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE t PHL or t PLH ­ Propagation Delay Time ­ ns 25 20 VCC = 4.75 V 15 VCC = 5.25 V 10 0 ­ 25 0 25 50 75 TA ­ Free-Air Temperature ­ °C Figure 19 2­14 50 75 TA ­ Free-Air Temperature ­ °C POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 100 100 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 APPLICATION INFORMATION Table 1. Typical Signal and Terminal Assignments SCSI CONTROL IPI DATA CDE0 SIGNAL TERMINAL 54 DIFFSENSE SCSI DATA DIFFSENSE CDE1 55 GND GND VCC XMTA, XMTB VCC GND IPI CONTROL CDE2 56 GND GND XMTA, XMTB SLAVE/MASTER BSR 2 GND GND GND, BSR GND CRE 3 GND GND GND 1A 4 DB0, DB8 ATN AD7, BD7 VCC NOT USED 1DE/RE 5 DBE0, DBE8 INIT EN GND GND 2A 6 DB1, DB9 BSY AD6, BD6 NOT USED 2DE/RE 7 DBE1, DBE9 BSY EN GND GND 3A 8 DB2, DB10 ACK AD5, BD5 SYNC IN 9 3DE/RE DBE2, DBE10 DBE10 INIT EN GND GND 10 DB3, DB11 RST AD4, BD4 SLAVE IN 4DE/RE 11 DBE3, DBE11 DBE11 GND GND GND 5A 19 DB4, DB12 MSG AD3, BD3 NOT USED 5DE/RE 20 DBE4, DBE12 DBE12 TARG EN GND GND 6A 21 DB5, DB13 SEL AD2, BD2 SYNC OUT 6DE/RE 22 DBE5, DBE13 DBE13 SEL EN GND GND 7A 23 DB6, DB14 C/D AD1, BD1 MASTER OUT 7DE/RE 24 DBE6, DBE14 DBE14 TARG EN GND GND 8A 25 DB7, DB15 REQ AD0, BD0 SELECT OUT 8DE/RE 26 DBE7, DBE15 DBE15 TARG EN GND GND 9A 27 DBP0, DBP1 I/O AP, BP ATTENTION IN 9DE/RE 28 DBPE0, DBPE1 TARG EN XMTA, XMTB VCC 4A ABBREVIATIONS: DBn, data bit n, where n = (0,1, . . . ,15) DBEn, data bit n enable, where n = (0,1, . . . ,15) DBP0, parity bit for data bits 0 through 7 or IPI bus A DBPE0, parity bit enable for P0 DBP1, parity bit for data bits 8 through 15 or IPI bus B DBPE1, parity bit enable for P1 ADn or BDn, IPI Bus A ­ Bit n (ADn) or Bus B ­ Bit n (BDn), where n = (0,1, . . . ,7) AP or BP, IPI parity bit for bus A or bus B XMTA or XMTB, transmit enable for IPI bus A or B BSR, bit significant response INIT EN, common enable for SCSI initiator mode TARG EN, common enable for SCSI target mode NOTE: Signal inputs are shown as active high. If only active-low inputs are available, logic inversion is accomplished by reversing the B + and B ­ connecter terminal assignments. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­15 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 APPLICATION INFORMATION Function Tables RECEIVER DRIVER B+ A INPUTS B+ A B­ B­ B + B ­ OUTPUT A INPUT A L H H L L H L H TRANSCEIVER OUTPUTS B+ B­ L H H L DRIVER WITH ENABLE B+ A B+ B­ A B­ DE/RE DE/RE DE/RE L L H H INPUTS A B + ­ ­ L H L H ­ ­ B ­ A H L ­ ­ INPUTS DE/RE A OUTPUTS B­ B+ L H ­ ­ ­ ­ L H L L H H ­ ­ H L WIRED-OR DRIVER L H L H OUTPUTS B­ B+ Z Z L H Z Z H L TWO-ENABLE INPUT DRIVER B+ A A B­ B+ B­ DE/RE INPUT A L H INPUTS DE/RE A OUTPUTS B+ B­ Z H L L H H Z L L H L H OUTPUTS B­ B+ Z H L H Z L H L H = high level, L = low level, X = irrelevant, Z = high impedance (off) An H in this column represents a voltage 200 mV higher than the other bus input. An L represents a voltage 200 mV lower than the other bus input. Any voltage less than 200 mV results in an indeterminate receiver output. 2­16 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 APPLICATION INFORMATION VCC VCC SCSI Connector 560 nB + nA I/O EN I + nB ­ ­ (d) SEPARATE ACTIVE-HIGH INPUT, OUTPUT, AND ENABLE VCC SCSI Connector 560 nB + nA nB + I O nA O ­ nB ­ + + EN nDE/RE nDE/RE (e) SEPARATE ACTIVE-LOW INPUT AND OUTPUT AND ACTIVE-HIGH ENABLE (b) ACTIVE-LOW BIDIRECTIONAL I/O WITH SEPARATE ENABLE I SCSI Connector 560 ­ nB ­ 560 ­ nDE/RE VCC VCC + nB ­ EN (a) ACTIVE-HIGH BIDIRECTIONAL I/O WITH SEPARATE ENABLE EN nB + nA O nDE/RE I/O SCSI Connector 560 VCC 560 nA VCC SCSI Connector nB + nB ­ SCSI Connector 560 + ­ nA I nB ­ O nDE/RE nB + ­ + nDE/RE 560 (c) WIRED-OR DRIVER AND ACTIVE-HIGH INPUT (f) WIRED-OR DRIVER AND ACTIVE-LOW INPUT If 0, is open drain Must be open-drain or 3-state output NOTE: The BSR, CRE, A, and DE/RE inputs have internal pullups. CDE0, CDE1, and CDE2 have internal pulldowns. Figure 20. Typical SCSI Transceiver Connections POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­17 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 APPLICATION INFORMATION channel logic configurations with control input logic The following logic diagrams show the positive-logic representation for all combinations of control inputs. The control inputs are from MSB to LSB; BSR, CDE0, CDE1, CDE2, and CRE, and are shown below the diagrams. Channel 1 is at the top and channel 9 is at the bottom of the logic diagrams. Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 21. 00000 2­18 Hi-Z Figure 22. 00001 Figure 23. 00010 POST OFFICE BOX 655303 Figure 24. 00011 · DALLAS, TEXAS 75265 Figure 25. 00100 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 APPLICATION INFORMATION Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 26. 00101 Hi-Z Figure 27. 00110 Figure 28. 00111 Figure 30. 01001 Figure 29. 01000 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­19 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 APPLICATION INFORMATION Figure 34. 01101 Figure 31. 01010 2­20 Figure 32. 01011 Figure 33. 01100 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 Figure 35. 01110 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 APPLICATION INFORMATION Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 36. 01111 Figure 37. 10000 and 10001 Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 38. 10010 and 10011 Figure 39. 10100 and 10101 Hi-Z Figure 40. 10110 and 10111 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 2­21 SN75LBC976 SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133D SLLS133D ­ AUGUST 1992 ­ REVISED MAY 1995 APPLICATION INFORMATION Hi-Z Figure 41. 11000 and 11001 Hi-Z Figure 42. 11010 and 11011 Hi-Z Figure 43. 11100 and 11101 Hi-Z Figure 44. 11110 and 11111 2­22 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. 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