500 MILLION PARTS FROM 12000 MANUFACTURERS

DATASHEET SEARCH ENGINE

Top Results

Part Manufacturer Description Datasheet BUY
LT1681ESW#PBF Linear Technology LT1681 - Dual Transistor Synchronous Forward Controller; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LT1681ESW#TRPBF Linear Technology LT1681 - Dual Transistor Synchronous Forward Controller; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LT1681ISW#PBF Linear Technology LT1681 - Dual Transistor Synchronous Forward Controller; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LT1681ESW Linear Technology LT1681 - Dual Transistor Synchronous Forward Controller; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LT1681ISW#TRPBF Linear Technology LT1681 - Dual Transistor Synchronous Forward Controller; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LT1681ESW#TR Linear Technology LT1681 - Dual Transistor Synchronous Forward Controller; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy

SKs TRANSISTOR

Catalog Datasheet MFG & Type PDF Document Tags

transistor p02

Abstract: SKs TRANSISTOR (STCK) = f(XIN/8) 5 µA (Ta = 25 °C, VDD = 3.0 V, f(XCIN) = 32 kHz) 0.1 µA (Ta = 25 °C, output transistor , transistor Skip decision Register Y Decoder SZD instruction CLD instruction SD instruction RD instruction , transistor K32 Key-on wakeup input Edge detection circuit Skip decision Register Y Decoder SZD instruction CLD instruction SD instruction RD instruction R Q FR21 PU32 Pull-up transistor Note1 S D5/INT , decision SZD instruction PU33 Pull-up transistor (Note 1) S RG2 1 0 Quartz-crystal oscillation circuit RG2
Renesas Technology
Original

pu2k

Abstract: RC 4559 DD (XIN)/1 6 µA (Ta = 25 °C, VDD = 5 V, f(XCIN) = 32 kHz) 0.1 µA (Ta = 25 °C, VDD = 5 V, output transistor , wakeup input Edge detection circuit (Note 3) Register A Aj IAP0 instruction Pull-up transistor FR00 , wakeup input Edge detection circuit IAP0 (Note 4) instruction Register A Ak Pull-up transistor FR01 , supply (Note 1) P10/SEG20, P11/SEG21 (Note 1)(Note 2) Pull-up transistor FR02 Aj OP1A , supply (Note 1) P12/SEG22, P13/SEG23 (Note 1)(Note 2) Pull-up transistor FR03 Ak D Q PU1k
Renesas Technology
Original
pu2k RC 4559 DD 4559Group M34559G6 w41 transistor code C3J PLQP0052JA-A REJ03B0172-0001 P-LQFP52-10 52P6A-A
Abstract: O ne. 20 STERN AVE. SPRINGFIELD, NEW JERSEY 07081 U.S.A. TELEPHONE: (201) 376-2922 (212)227-6005 FAX: (201) 376-8960 KSC1674 NPN EPITAXIAL SILICON TRANSISTOR \mrLlrltn, TV PIF AMPLIFIER, FM TUNER RF/Ml/ini inir"D MIXER, OSCILLATOR 1 TO-92 â'¢ High Current-Qain-Bandwidth Product fT=6QOMHz (Typ) â'¢ High Power Gain Gp«=22dB at f= 100MHz /~\ ABSOLUTE MAXIMUM RATINGS , ^S^K^S' Collector-Base Voltage Collector-Emitter Voltage Emitter-Base Voltage Collector Current New Jersey Semiconductor
Original
100MH

20P2N-A

Abstract: M34280E1FP structure is P-channel open-drain. 1-bit I/O port. For input use, turn on the built-in pull-down transistor , port. For input use (E0, E1), turn on the built-in pull-down transistor and set the latch of the , an input-only port and has a key-on wakeup function using "H" level sense and pull-down transistor , sense and pull-down transistor. CARR Carrier wave output Output Carrier wave output pin for , transistor OFF. 2: Set the corresponding bits (PU00, PU01) of the pull-down control register PU0 to "0" by
Mitsubishi
Original
20P2N-A M34280E1FP M34280E1GP M34280M1 M34280M1-XXXFP M34280M1-XXXGP 20P2E/F-A
Abstract: 4 3 0 3 2 7 1 D O S M f l n ffl H SKS U â'™ April 1993 « m HAS RFB18N10CS Current Sensing N-Channel Enhancement-Mode Power Field-Effect Transistor Package Features TS-001AA TOP VIEW â'¢ 18A, 100V â'¢ rDS(ON).° ' 1£i â'¢ Built-In Current Sensing Ratio. 1350 to 1650 â'¢ UIS SOA Rating Curve (Single Pulse) â'¢ -55°C to +175°C Operating and Storage Temperature TERMINAL -
OCR Scan
F18N10CS AN7254 AN7260

tda 4280

Abstract: PU01 pull-down transistor and set the I/O port D latch of the specified bit to "0." In addition, key-on , open-drain. 3-bit input port. For input use (E0, E1), turn on the built-in pull-down transistor and set the , pull-down transistor. G0­G3 I/O port G I/O 4-bit I/O port. For input use, set the latch of the , using "H" level sense and pull-down transistor. CARR Carrier wave output Output Carrier , to "0" by software and turn the pull-down transistor OFF. 2: Set the corresponding bits (PU00, PU01
Mitsubishi
Original
tda 4280 PU01 mitsubishi pc programmer LXY Series TCA 720 mitsubishi lot code

SKs TRANSISTOR

Abstract: 2SK661 NEC m m a m % Junction Field Effect Transistor 2SK661 ecm & m O gm ^ ¿0, Ã"Ã"«^* £ or- h â'¢ v-xmizyjK â'¢ sjasjifcrt»^»*: ¿6, milföABfWAC^i^'JBfffü^'S^o (Ta = 25 °C) mi Sjr fé Â¥ fi KM > â'¢ v-xmmi± Vdsx * 20 V r-h â'¢ KM>?smi±. Vgdo -20 V Y v 4 > fi Id 10 mA r - i g Ig 10 mA £ fit £ Pt 80 mW 'J > 9 -> 3 > fili Tj 125 °C « ff fi. & Tstg â'" 55â'"h 125 °C , to SKS v «» í« if frlfg co in m â'" ra-co-in-co caco â'" wocvjr^io-coco*t
-
OCR Scan
SKs TRANSISTOR 00GE GE 6226 1987M

TDA 5020

Abstract: 40555 Transistor transistor and set the latch of the specified bit to "0." In addition, key-on wakeup function using "H" level , use (Eo, E1), turn on the built-in pull-down transistor and set the latch of the specified bit to "0." , port and has a key-on wakeup function using "H" level sense and pull-down transistor. Go-G3 I/O port G , transistor. CARR Carrier wave output for remote control Output Carrier wave output pin for remote control , pull-down control register PUO to "0" by software and turn the pull-down transistor OFF. 2: Set the
-
OCR Scan
TDA 5020 40555 Transistor d27c128 D27C64 mask ram mitsubishi lot number

SKs TRANSISTOR

Abstract: M08A (Note 4) 0 1 MHz ^SKH SK High Time NM93C86A NM93C86AE/V 250 300 ns ^SKL SK Low Time 250 ns ^SKS , Frequency (Note 4) 0 250 KHz *SKH SK High Time 1 Us *SKL SK Low Time 1 Us *SKS SK Setup Time SK , ORG pin may draw > 1 when i n the x8 mode ude to an i nternal pull-up transistor. Note 4: The , . Synchronous Data Timing cs SK V|H V,L V|H â'"l !SKS Dl V|L V|H VII tois DO (READ) DO (PROGRAM) VOH
-
OCR Scan
NM93C86 M08A NM93C 16K-B

xw4f

Abstract: transistor w2a 40 bits) Register D (3 bits) Register E (8 bits) Stack registers SKs (8 levels) Interrupt stack register , SINGLE-CHIP 4-BIT CMOS M ICROCOMPUTER (5) Stack registers (SKs) and stack pointer (SP) Stack registers (SKs , (TA8P p). Stack registers (SKs) are eight identical registers, so that subroutines can be nested up to 8 , operations together. The contents of registers SKs are destroyed when 8 levels are exceeded. The register SK , ) can be transferred to register A with the TASP instruction. Figure 5 shows the stack registers (SKs
-
OCR Scan
xw4f transistor w2a 40 4500 microcomputer 27C256K M34551E8-XXXFP M34551E8FP PCA7414

20P2N-A

Abstract: M34250E2FP transistor of port C is turned on when the bit 1 of register PU0 is set to "1" by software. Port C is also , structure is the N-channel open-drain. The pull-up transistor of port K is turned on when the bit 1 of , pull-up transistor of port G is turned on when the bit 0 of register PU0 is set to "1" by software , Pull-up control register PU0 PU01 PU00 Ports C and K pull-up transistor control bit Ports G0­G3 pull-up transistor control bit Note: "W" represents write enabled. at reset : 002 at RAM back-up
Mitsubishi
Original
M34250E2FP M34250E2-XXXFP M34250M2 M34250M2-XXXFP F1813 KI-9711

F1813

Abstract: M34250E2FP transistor of port C is turned on when the bit 1 of register PU0 is set to "1" by software. Port C is also , structure is the N-channel open-drain. The pull-up transistor of port K is turned on when the bit 1 of , pull-up transistor of port G is turned on when the bit 0 of register PU0 is set to "1" by software , Pull-up control register PU0 PU01 PU00 Ports C and K pull-up transistor control bit Ports G0­G3 pull-up transistor control bit Note: "W" represents write enabled. at reset : 002 at RAM back-up
Renesas Electronics
Original
NEC AMC mitsubishi microcomputers 4-bit

STP4N40FI

Abstract: SKs TRANSISTOR SGS-THOMSON iyH£ïï^(sKS STP4N40 STP4N40FI N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR TYPE STP4N40 STP4N40FI V dss R D S (o n ) Id 400 400 V V 2.1 S 2 2.1 LI 4 A 3 A . . . AVALANCHE RUG G EDN ESS TECHNOLO GY 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA AT 100°C APPLICATION O RIENTED CHARACTERIZATION ISOLATED PACKAGE UL RECOGNIZED, ISOLATION TO 2000V DC 1 i APPLICATIONS . . . HIGH CURRENT, HIGH SPEED SW ITCHING SW ITCH MODE POW ER SUPPLIES (SMPS) CHO PPER REGULATORS
-
OCR Scan
STP4N T0-220 ISOWATT220 STP4N40/FI TT220 ISOWATT22C ISOWATT22Q

LXY Series

Abstract: mitsubishi microcomputers 4-bit open-drain. The pull-up transistor of port C is turned on when the bit 1 of register PU0 is set to "1" by , "1." The output structure is the N-channel open-drain. The pull-up transistor of port K is turned on , open-drain. The pull-up transistor of port G is turned on when the bit 0 of register PU0 is set to "1" by , Pull-up control register PU0 PU01 PU00 Ports C and K pull-up transistor control bit Ports G0­G3 pull-up transistor control bit Note: "W" represents write enabled. at reset : 002 at RAM back-up
Mitsubishi
Original

SKs TRANSISTOR

Abstract: nec K 3570  Junction Field Effect Transistor 2SK540 N-Channel Silicon Junction Field Effect Transistor ECM Impedance Converter # it o gMMÃM^'^ë Vo or-F â'¢ y-xFiur-f hiÃiïL^ ECM-f Ufltt» (Ta = 25 °C ) m g 5E fë JfL fi - y-xliÅ' Vdsx * 20 V r- h â'¢ KM >FBmi± Vgdo -20 V K tf 4 > H Sft Id 10 mA v - h m m Ig 10 mA £ il * Pt 100 mW ^ > 7 -> a > m Ti 125 °C « # fi. Jt Tstg â'" 55â'" + , (M) NEC * tt SSSÃB/Ã5E2ETÃ33« 1 ?(0m*tíM T108 SKS(03'454- lili m s £ ti * IT (0486 4 1 -
-
OCR Scan
nec K 3570 KJE transistor KJE 17 transistor transistor kje SKs 22 TRANSISTOR J6 transistor
Abstract: is the N-channel open-drain. The pull-up transistor of port C is turned on when the bit 1 of , pull-up transistor of port K is turned on when the bit 1 of register PU0 is set to â'1â' by software , bit to â'1.â' The output structure is the N-channel open-drain. The pull-up transistor of port G , PU01 PU00 Ports C and K pull-up transistor control bit Ports G0â'"G3 pull-up transistor , 0 1 Pull-up transistor OFF Pull-up transistor ON 0 Pull-up transistor OFF 1 W Renesas Technology
Original

17-33l

Abstract: TMA CM TRANSMITTER (5) Stack registers (SKs) and stack pointer (SP) Stack registers (SKs) are used to temporarily , (SKs) are eight identical registers, so that subroutines can be nested up to 8 levels. However, one of , of registers SKs are destroyed when 8 levels are exceeded. The register SK nesting level is pointed , A with the TASP instruction. Figure 5 shows the stack registers (SKs) structure. Figure 6 shows the , interrupt until returning to the original routine. Unlike the stack registers (SKs), this register (SDP) is
-
OCR Scan
M34551 17-33l TMA CM infrared remote control ON/OFF switch application 111l2 M34551E8 M5M27C256K OOOO16

ic 4570 datasheet

Abstract: LA 4570 ) qPull-up transistor . (Ports P0, P1, and P4, ON/OFF of port P4 can be switched) q Voltage , ) Register A (4 bits) Register E (8 bits) Register D (3 bits) Stack registers SKs (8 levels) Interrupt , CNVSS certainly. An N-channel open-drain I/O pin for a system reset. A pull-up transistor and a , BLOCK DIAGRAMS Pull-up transistor Key-on wakeup input (Note 1) IAP0 instruction P00­P0 3 , Key-on wakeup input External interrupt circuit Pull-up transistor Key-on wakeup input (Note 1
Mitsubishi
Original
M34570MD-XXXFP M34570EDFP ic 4570 datasheet LA 4570 M34570E8 tab310 M34570E8FP

LA 4570

Abstract: ic 4570 datasheet ) qPull-up transistor . (Ports P0, P1, and P4, ON/OFF of port P4 can be switched) q Voltage , ) Register A (4 bits) Register E (8 bits) Register D (3 bits) Stack registers SKs (8 levels) Interrupt , CNVSS certainly. An N-channel open-drain I/O pin for a system reset. A pull-up transistor and a , BLOCK DIAGRAMS Pull-up transistor Key-on wakeup input (Note 1) IAP0 instruction P00­P0 3 , Key-on wakeup input External interrupt circuit Pull-up transistor Key-on wakeup input (Note 1
Renesas Electronics
Original
marking code SKs SKs 99 W32 MARKING SSOP36-P-450-0 M34570M4 M34570M4-XXXFP

LXY Series

Abstract: marking code SKs structure is P-channel open-drain. 1-bit I/O port. For input use, turn on the built-in pull-down transistor , port. For input use (E0, E1), turn on the built-in pull-down transistor and set the latch of the , an input-only port and has a key-on wakeup function using "H" level sense and pull-down transistor , sense and pull-down transistor. CARR Carrier wave output Output Carrier wave output pin for , transistor OFF. 2: Set the corresponding bits (PU00, PU01) of the pull-down control register PU0 to "0" by
Renesas Electronics
Original
m34280m
Showing first 20 results.