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TMS34020AGBL32 Texas Instruments Graphics Processors 145-CPGA 0 to 70 visit Texas Instruments
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Part : SK 145 25 STS TO 220 Supplier : Fischer Elektronik Manufacturer : Avnet Stock : - Best Price : €0.7828 Price Each : €1.1742
Part : SK145 25 STS TO220 Supplier : - Manufacturer : Chip One Exchange Stock : 6,429 Best Price : - Price Each : -
Part : SK 145/25 STS TO220 Supplier : Fischer Elektronik Manufacturer : Chip1Stop Stock : 9,712 Best Price : $0.7970 Price Each : $1.83
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SK 145 25 STS TO 220

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: ] SK 145 25 STS TO 220 25.0 13.5 SK 145 37,5 STS TO 220 I 37.5 12.0 SK 145 50 STS TO 220 50.0 10.0 surface: L Ø 2,8 max. 25,4 version TO 218/ TO 220/ TO 247/ TO , clip-mounting profile SK 145 âž" A 73 special lengths and drillings on request L = solderable pins 20,5 Ø 4,5 4,5 15 C Ø 2,8 max. 25,4 D art. no. [mm] Rth [K/W] 25 13.5 SK 145 30 STC E SK 145 25 STC 30 12.4 SK 145 50 STC 50 10.0 surface: F â'" â'" â Fischer Elektronik
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transistor et 454

Abstract: SK 50 et 12 11 50,8 TO 220 14 38,1 SK 104 25,4 . [K/W] STS = avec broches à souder STIS = , . Nr. Art. No. Art. n° SK 185 25 STS TO 220 SK 185 37,5 STS TO 220 SK 185 50 STS TO 220 34,4 , fixé par vis for semiconductor screw assembly Ausführung Version Modèle SK 75 25 STS TO 220 , soudure Art. Nr. Art. No. Art. n° Ausführung Version Modèle SK 76 25 STS TO 220 mit , 145 25 TO 220 SK 145 37,5 SK 145 37,5 TO 220 SK 145 50 TO 220 with solder pins SK 145 37,5
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transistor et 454 SK 50 et 12 transistor et 460 SK129-25 sk7650 STS SOT

74 hc 59581

Abstract: b768 transistor Order Code 167-4781 167-4782 167-4783 1+ 3.50 3.33 3.31 Price Each 25+ 2.42 2.58 2.65 100+ 1.94 2.20 , min. Ì Dielectric Withstanding Voltage: 1000 VAC Ì Life Cycle: 25,000 to 50,000 cycles 527488 , IC removal. 527493 Semiconductors Price Each 1+ 5.57 25+ 5.21 Component DIL Headers 8 Way to 40 , Inserters 14 24/28 40 Extractors 14 to 20 24/28 40/48 25+ 0.3" 0.6" 0.6" 0.3" 0.6" 0.6" 877-463 877-505 , 1.95 2.82 3.64 5.43 7.17 Price Each 25+ 0.36 0.62 0.72 0.95 0.88 1.12 1.56 1.79 1.05 1.49 1.42 1.84
Element14 Catalog
Original
74 hc 59581 b768 transistor transistor smd 661 752 652B0082215-002 8 pin ic base socket round pin type lead MM5231 RC6-8-01LS RC12-2 5-01LS RC12-4-01LS RC12-6-01LS

1A98

Abstract: S19202CBI30 -16 can support a concatenated payload or can be channelized down to STS-12c/AU-4-4c. · Terminates and , . 25 Table 2: SONET/SDH Payload Configuration with STS-48/192 (STM-16/64) Interfaces . 25 3.4 , ] TX_TOH_DATA_IN[1:4] TOH Generate and Insert x4 To/from device internal registers TX_TOH_FRM_OUT[1:4] STS , customer, Thank you for choosing an AMCC device. We appreciate your confidence in our products. To , to provide you additional information, which will help you use the device more efficiently. (This
Applied Micro Circuits
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S19202CBI30 1A98 NDQ 434 1.8V 0.33F 0a4b GEN10 STS-192 STS-48 STS-12

mx Z015

Abstract: ND151 for STS-48/STM-16 and up to 4 x STS-12/STM-4 or 16 x STS-3/STM-1s. · Serial STS-12/STM-4 and STS-3/STM , STS-48 to STS-48 operation (through-timing). Both a full bypass (no frame regeneration) as well as a , Provisionable pointer processor bypass available for STS-48 to STS-48 operation (through-timing). Both a full , applications. On the low-speed side, it can interface to 4 groups of either 1 STS12/STM-4 or 4 STS-3/STM , the incoming STS-48/ STM-16 signal directly through to the demux output. Framing, descrambling and TOH
Applied Micro Circuits
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mx Z015 ND151 0x09D6 auxiliary contact SK11 nd-152 DANUBE S4805CBI11 STS-48/STM-16 STS-12/STM-4

k161 GR 3A

Abstract: LCD 5B4A -4-16c down to STS-1/AU-3. · Supports full-duplex mapping of ATM cells or packets into DS3 tributaries for ATM , from DS3 over STS-1/AU-3 to STS-48c. Up to 48 tributaries can be processed simultaneously. For packets , tributaries carrying packet traffic, with data rates anywhere from STS-48c/AU-4-16c down to STS-1/AU , tributaries carrying ATM cells , with data rates anywhere from STS-48c/ AU-4-16c down to STS-1/AU-3. Cells , S4806, and provide insertion/extraction of DS3, E3 or clear channel STS-1/STM-0 tributaries to/from
Applied Micro Circuits
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k161 GR 3A LCD 5B4A 5bd1 md 5406 4512 PIN DIAGRAM s131 d04 4064 S4806CBI

ssf 7509 equivalent

Abstract: lt 747B Interface · Glueless interface to MPC860, 25 MHz to 52 MHz · Dual Mode Interface also supports Intel , to enable timing regeneration of the client 10 Gbps or 2.5 Gbps signal. When operating in the ITU G , appreciate your confidence in our products. To ensure your complete satisfaction with our products and technologies, we have prepared this publication to provide you additional information, which will help you use the device more efficiently. (This publication may be held to our confidential and proprietary
Applied Micro Circuits
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S19208CBI ssf 7509 equivalent lt 747B SMD code 307C PM 8058 interfacing 8279 to the 8086 TA 7176 IC OC-192/48/12/3 192/STM-64

220E-2

Abstract: lc 3101 led APS_CLK_OUT. · Removed Sonet R to T Loopback support for STS-3 and STS-12 1.6 12/13/00 vi AMCC , FIFOFULL, FIFOEMPTY regs to 32 bytes in STS-3c. Removed refs to TX_POH_SCR_INH and RX_POH_DSCR_INH. Per Rhine 4.0 timing, updated tPRXI min/max from 2.5/8ns to 2/6ns; Changed THTX15 and THTX15 from .75ns to , . 82 Table 25: Recommended Provisioning for STS-3/STM-1 B2 Signal Fail and Signal Degrade , : Channel 5 (in STS-12c mode) and Channel 8 (in STS-3c mode) do not properly respond to a NDF
Applied Micro Circuits
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220E-2 lc 3101 led 0A240 24C024 S4804CBI41 OC-48 OC-12 S4804

lcd power board schematic APS 252

Abstract: lcd power board schematic APS 254 resolution of FIFOFULL, FIFOEMPTY regs to 32 bytes in STS-3c. Removed refs to TX_POH_SCR_INH and RX_POH_DSCR_INH. Per Rhine 4.0 timing, updated tPRXI min/max from 2.5/8ns to 2/6ns; Changed THTX15 and THTX15 , Fail and Signal Degrade 83 Table 25: Recommended Provisioning for STS-3/STM-1 B2 Signal Fail and , : Channel 5 (in STS-12c mode) and Channel 8 (in STS-3c mode) do not properly respond to a NDF , you for choosing an AMCC device. We appreciate your confidence in our products. To ensure your
Applied Micro Circuits
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lcd power board schematic APS 252 lcd power board schematic APS 254 SDH 209 2a09 BIT 3713 32C08 STS-12/STM4 AU-4-16

chn 648 equivalent

Abstract: STS-1 via VT Groups, or SDH AU-3 via TUG-2. - Maps up to 21 asynchronous E1 signals to SDH AU-3 via , . 6 DS1/E1 to STS-1 Block Descriptions , . 13 STS-1 to DS1/E1 Block Descriptions , signals are referred to as STS-1. Pin 102 (DS1_E1 N) con trols the value transmitted in the unused , high, the device will default to DS1 to STS-1 mode and transmit a 0 in the unused overhead bytes and 00
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OCR Scan
chn 648 equivalent TMPR28051 GR-253 DS98-100TIC DS97-211TIC AY98-002TIC

R02 motorola 2903

Abstract: AMCC STS-192 send an email to pubs_info@amcc.com and include REMOVE in the subject line. AMCC INDUS STS , -16 devices. · Supports the transfer of up to four STS-48/STM-16 data streams, carrying any valid combination of STS-48c/AU-4-16c, STS-12c/AU-4-4c, or STS-3c/AU-4 SONET/SDH payloads, to other AMCC SONET/SDH POS , conjunction with AMCC's RHINE chip, the INDUS provides a channelized OC-192 solution down to STS-48/STS , provides a channelized OC-192 to STS-48/STS-12/ STS-3/STS-1 framer/pointer processor solution. The S19201
Applied Micro Circuits
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R02 motorola 2903 AMCC STS-192 108 046f S19201CAI12 STS-48/STM16 STS-192/STM-64

LT 6224

Abstract: 10Gbps Regenerator STS-192c/STM-64 framer/mapper device to support 10 Gigabit Ethernet (10GbE) serial WAN, serial LAN and , CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED DISTRIBUTION AND USE PURSUANT TO APPLICABLE NON-DISCLOSURE , confidence in our products. To ensure your complete satisfaction with our products and technologies, we have prepared this publication to provide you additional information, which will help you use the device more efficiently. (This publication may be held to our confidential and proprietary requirements
Applied Micro Circuits
Original
LT 6224 10Gbps Regenerator 30E K03 S19205CBI PHY/OC-192 AU-4-64

clause 22 phy registers

Abstract: to 32x RapidIO on one device SONET Based Functionality · STS-48 and STS-12 Framers · Supports any , each channel can be configured to support an array of popular data protocols including SONET (STS-12/STS-12c, STS-48/STS-48c, and TFI-5 support of 10 Gbps or above), Gigabit Ethernet (compliant to the , flexiPCS Data Sheet Table of Contents December 2008 Introduction to flexiPCS , . 2-33 Interfacing to Reference Clock CML Buffers
Lattice Semiconductor
Original
clause 22 phy registers DS1005

clause 22 phy registers

Abstract: 1000BASE-X each channel can be configured to support an array of popular data protocols including SONET (STS-12/STS-12c, STS-48/STS-48c, and TFI-5 support of 10 Gbps or above), Gigabit Ethernet (compliant to the , LatticeSC/M Family flexiPCS Data Sheet June 2011 Introduction to flexiPCS , . 2-33 Interfacing to Reference Clock CML Buffers , registered trademarks of their respective holders. The specifications and information herein are subject to
Lattice Semiconductor
Original
1000BASE-X

clause 22 phy registers

Abstract: 13007 h3 each channel can be configured to support an array of popular data protocols including SONET (STS-12/STS-12c, STS-48/STS-48c, and TFI-5 support of 10 Gbps or above), Gigabit Ethernet (compliant to the , flexiPCS Data Sheet Table of Contents December 2008 Introduction to flexiPCS , . 2-33 Interfacing to Reference Clock CML Buffers , registered trademarks of their respective holders. The specifications and information herein are subject to
Lattice Semiconductor
Original
13007 h3 ali 3602 detail of D 13007 K mca exam date sheet
Abstract: to 28 asynchronous DS1 signals to SONET STS-1 via VT Groups, or SDH AU-3 via TUG-2. â'" Maps up to 21 asynchronous E1 signals to SDH AU-3 via TUG-2, or SONET STS-1 via VT Groups. â'" Maps any valid , . 6 DS1/E1 to STS-1 Block D escriptions , .13 STS-1 to DS1/E1 Block D escriptions , signals are referred to as STS-1. Pin 102 (DS1_E1 N) con­ trols the value transmitted in the unused -
OCR Scan
GR253-CORE ETS300 DS98-1

XC2S100TQ144

Abstract: XC9572XL-TQ100 /RxPPA RxNeg0-2 TxTSX/TxPSOF 4 RxPos0-2 RxData0-15 OC3 to T3/E3/STS-1 Framer to/from , - VCC5V B CS SK DI DO 1 2 3 4 Q1 FDN335N 3 PME- 50 49 48 47 46 43 42 41 , 8 CLK 20 23 21 22 25 172 PAR -INTA R141 R140 4.7k 4.7k R134 4.7k , 71 145 147 148 156 157 LCLK VCC3V3 R145 4.7k LRST- DONE D2 LED , LW-R 60 59 58 55 C124 0.1uF D VCC3V3 33 33 SFM_Clk T3_Clk 85 25 17
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PCI9030 XC2S100TQ144 XC9572XL-TQ100 XC9572XL TQ100 XC9572XL-7TQ100C L194-5 93CS66 XRT75L03 XRT73LC03 XRT73L00 XC2S100 TQ144

OC139

Abstract: -pin shrink quad flat pack (SQFP) package 28 DS1 to STS-1 Mapper Mode: Maps 28 asynchronous DS1 signals to , E1 signals to SDH AU-3 Configurable TU-12 slot selection for E1 insertion TMPR28051 STS-1/AU , .7 DS1 to STS , . 14 STS-1 to DS1 , to 28 asynchronous DS1 sig nals into a SONET SPE. On the STS-1 side, the device can be configured for
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OCR Scan
OC139 T7690 30L-15P-BA DS97-114TIC

INS26

Abstract: Maps up to 28 asynchronous DS1 signals to SONET STS-1 via VT Groups, or SDH AU-3 via TUG-2. - Maps up to 21 asynchronous E1 signals to SDH AU-3 via TUG-2, or SONET STS-1 via VT Groups. - Maps any valid , .10 DS1/E1 to STS-1 Block Descriptions , . 14 STS-1 to DS1/E1 Block Descriptions , . 54 Table 25. Register 0x91: STS-1 LOS Detect/Test Pattern Edge Control
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OCR Scan
INS26 5/TU-11 VT2/TU-12 DS99-068SONT
Abstract: connects â  SONET/SDH test equipment Description 28 DS1 to STS-1 Mapper Mode: â  Configurable , . 7 DS1 to STS , . 14 STS-1 to DS1 , to the line. Built-in loopbacks at both the STS-1 and DS1 sides provide maximum flexibility for use , i DS1/E1 Input Identifier. If this pin is pulled high, the device acts as a DS1 to STS-1 mapping -
OCR Scan
208-P
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