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TRF4002PWP Texas Instruments RF Power Amplifier ASIC 20-HTSSOP visit Texas Instruments
PMP5738 Texas Instruments High current core/ASIC/FPGA supply visit Texas Instruments
SM28VLT32SKGD1 Texas Instruments 32-Mbit High-Temp Flash ASIC With Serial Peripheral Interface (SPI) Bus 0-XCEPT visit Texas Instruments
DBB03AIPM Texas Instruments Digital Baseband ASIC for Dolphin Chipset 64-LQFP -40 to 85 visit Texas Instruments
DBB03IPMR Texas Instruments Digital Baseband ASIC for the Dolphin Chipset 64-LQFP -40 to 85 visit Texas Instruments
DBB03IPM Texas Instruments Digital Baseband ASIC for the Dolphin Chipset 64-LQFP -40 to 85 visit Texas Instruments

SHA-256 asic

Catalog Datasheet MFG & Type PDF Document Tags

SHA-256 Cryptographic Accelerator

Abstract: verilog code for 128 bit AES encryption including SHA-256, SHA-384, and SHA-512. These cores are available for both ASIC and programmable logic , ) and provides authentication between users during data transmission. The CS5311 core provides SHA-256 , CS5310 SHA-2 CS5311 CS5312 · · Fully implements SHA-256 secure hash algorithms to NIST FIPS 180-2 specifications · Fully implements SHA-256, SHA-384, SHA-512 secure hash algorithms to NIST , cycles (1 clock per algorithm step + 1 clock load) · · · Each 512-bit block for SHA-256
Amphion Semiconductor
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SHA-256 SHA-256 Cryptographic Accelerator verilog code for 128 bit AES encryption SHA-1 using vhdl verilog code for 8 bit AES encryption verilog code for aes encryption CS5310/11/12 CS5210/11/12S DS5310

SHA-256 asic

Abstract: SHA256 Compliant to FIPS 180-2 specifi- cation of SHA-256. Bit padding. SHA256 SHA-256 Secure , is a high-performance implementation of the SHA-256 Secure Hash message digest Algorithm. This , . Optimized design for ASIC or The processing of one 512-bit block is performed in 66 clock cycles and the , implementation, running at 280 MHz and requiring just 20,500 gates in a 0.18 µm ASIC process. The complete , Results The following are sample ASIC results with all I/Os assumed to be routed off-chip using I/O
Cast
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SHA-256 asic

SHA-256 mbps asic

Abstract: SHA-256 power consumption per command · Small form factor · No external memory required · SHA-1, SHA-256 · MD5 aSIC Specifications Public Key · RSA and DH up to 8k-bits, DSA · ECDH and ECDSA (256 , · eLZS, LZS, GZIP (Deflate RFC 1951) Encryption / Decryption · AES (128, 192, 256) CBC, GCM, CTR, ECB, XTS-256, XTS-512 · 3DES, DES, ARC4 Authentication · Software failover protection , Temperature sensor Reliability and Service Features · AES-GMAC, -XCBC-MAC · HMAC-SHA-1, -256; HMAC-MD5
Exar
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SHA-256 mbps asic DTLs ecdsa Intel 8202 AES-GCM-128 lzs compression

SHA-256

Abstract: 3SE50F484-2 Compliant to FIPS 180-2 specification of SHA-256. Bit padding. SHA256 SHA-256 Secure Hash Function Megafunction The SHA256 megafunction is a high-performance implementation of the SHA-256 Secure Hash message digest Algorithm. This one-way hash function conforms to the 1995 US Federal Information , streaming applications. Optimized design for ASIC or FPGA implementations. Robust verification , soft megafunction (synthesizable HDL) for ASIC technologies and as a firm megafunction (netlist) for
Cast
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3SE50F484-2 HC210F484C 1C12F324-6 EP1AGX50 megafunction 3C16F484

sha256

Abstract: SHA-256 Compliant to FIPS 180-2 specifi- cation of SHA-256. Bit padding. SHA256 SHA-256 Secure Hash Function Core 264-1 bits maximum message length. Supported Message lengths mul- tiple , is a high-performance implementation of the SHA-256 Secure Hash message digest Algorithm. This , . Optimized design for ASIC or The processing of one 512-bit block is performed in 66 clock cycles and the , available as a soft core (synthesizable HDL) for ASIC technologies and as a firm core (netlist) for FPGA
Cast
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3s500e-5
Abstract: -1, SHA-256 â'¢ MD5 â'¢ HMAC-SHA-1, HMAC-SHA-256 â'¢ HMAC-MD5 â'¢ SSL3.0-MAC aSIC , '¢ Software failover protection (All HW functionality) in case of device failure â'¢ AES (128, 192, 256) CBC, GCM, CTR, ECB, GMAC, XCBC-MAC, XTS-256, XTS-512 â'¢ 3DES Hashing for Authentication or , -bits, DSA â'¢ ECDH and ECDSA (256-bit, 384-bit, 521-bit) â'¢ Hardware random number generator PCI , ) Host Utilities and Applications Power-on Self Test (POST); DMA and ASIC configuration; error log Exar
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SHA-128 PB-8200S

MCS8140CV

Abstract: MCS8140 DATASHEET . 7 Ver1.1 1 8th September 2007 MCS8140 Hardware FAQ MCS8140 Hardware (ASIC & System , MCS8140 ASIC, its features, System related queries & other details concerning the ASIC, hardware design , the DES, 3DES, AES, MD5, SHA-1, and SHA-256 algorithms. The interface pins for the on-chip I2S audio , MCS8140 ASIC is under Mass Production, ordering information given below: Part Type : MCS8140CV Package : QFP 256, RoHS Commercial Grade : 0 to 70 deg C Contact sales@moschip.com for further information. d
MosChip Semiconductor
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MCS8140 DATASHEET MosChip ARM926EJ-S pci parallel port moschip pc100 system board voip codec chip 100MH

z80 vhdl

Abstract: TOSHIBA TC160 250 MHz 2, 4, 8 Mb 128/256, 144/288 2, 4, 8 Mb 128/256, 144/288 7 ASIC , CMOS ASIC s e mi con duc t or http://www.semicon.toshiba.co.jp/ 2006-9 ASIC ASIC IC 3 C O N T E N T S ASIC 3 ASIC 4 5 ASIC 8 UniversalArrayTM QTAT Solution for SoC Designs 11 SoC EDA 12 16 18 2 ASIC ASIC
Toshiba
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TC280 TC190 USBIEEE1394 z80 vhdl TOSHIBA TC160 PLL in RTL TOSHIBA TC203 tc260c TC320 TC300 TC260 TC200 TC203

ARM SC100

Abstract: AES RSA chips , APACS, ZKA, Common Criteria (EAL4+), FINREAD Memory · 256 bits of Key Storage (battery backup) · , Hardware SHA-1, SHA-256 True Random Number Generator (RNG) Two CRC 16 Engines and one CRC 32 Engine , ­SMIC­26Oct05 AT91SO100 Figure 1. Block Diagram. Intrusion Switch Sensors 256 bit User Key CP15 (MPU , Timers EEPROM 256 KB ext_nwait DPRAM SCK MOSI MISO NSS SPI USB + USB - USB Device , Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150
Atmel
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6514BS ARM SC100 AES RSA chips ARM RNG AT91SO101 AT83C26 hardware AES AT91SO100/101

TN-29-11

Abstract: Micron NAND system-component serial numbers, such as those of the microprocessor and/or ASIC device, to employ a serial number , component authentication numbers (from the system CPU and/or ASIC, etc.). Read CPU, ASIC, or other , hash algorithm attributes. From the number of security bits provided for each hash algorithm, SHA-256 , 128 160 256 - - 64 64 80 128 CRC-16 CDC-32 MD-4 MD-5 SHA-1 SHA-256 Using the
Micron Technology
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TN-29-11 Micron NAND Micron NAND flash memory micron flash otp 09005aef81c06f58

secure access module

Abstract: AT91SO25 PED, APACS, ZKA, Common Criteria (EAL4+), FINREAD Memory · 256 bits of Key Storage (battery , 128-192-256 Hardware SHA-1, SHA-256 True Random Number Generator (RNG) Two CRC 16 Engines and one CRC 32 , . Block Diagram (Secure controller) Intrusion Switch Sensors 256 bit User Key CP15 (MPU , Timers EEPROM 256 KB ext_nwait DPRAM SCK MOSI MISO NSS SPI USB + USB - USB Device , Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC
Atmel
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AT91SO25 secure access module AT91SO51 ARM SC100 7816 CRC-16 and CRC-32 hardware AES 256 controller AT91SO50

WLAN Module MII

Abstract: circuit diagram bluetooth based home automation Printer CPU and Interface ASIC. . . . . . . . 2 1.2 High-End Printer I/O Processor . . . . . . . . . . . , . 1.1 Low-End Printer CPU and Interface ASIC Figure 1 illustrates how the MPC8313E can perform the function of the CPU + interface ASIC on a low-end printer application. e300c3 Core PCI Main ASIC Rasterize DDR SDRAM FLASH MPC8313E Compress Decompress HalfToning Interface ASIC Color , Low-End Printer Application In this application, the CPU interfaces to the main ASIC through the
Freescale Semiconductor
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MPC8313EPB MPC8313 WLAN Module MII circuit diagram bluetooth based home automation e300c3 AES SHA DDR PHY ASIC

AT90SC

Abstract: AT90SC256144RCFT to 256 Bytes Secure Microcontroller for Smart Cards AT90SC 256144RCFT Summary Memory · , 25oC ­ 10 Years Data Retention · 8K Bytes of RAM + 256 Bytes of DMA Dedicated RAM Peripherals · , Generation, AES, MD5, SHA-1, SHA-256) · DMA Controller to Speed-up Data Transfers when communicating via , ) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150 East Cheyenne Mtn. Blvd. Colorado
Atmel
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EMV2000 AT90SC256144RCFT CRC16 ISO14443 FIPS201 6534AS

d110d

Abstract: BL8531H SEC ASIC 2 / 11 STBY CKIN MIXED BL8531H_ADC 12BIT 10MSPS ADC ABSOLUTE MAXIMUM RATINGS , from the same source to avoid power latch-up. SEC ASIC 3 / 11 MIXED BL8531H_ADC 12BIT , otherwise specified) SEC ASIC 4 / 11 MIXED BL8531H_ADC 12BIT 10MSPS ADC I/O CHART Index , ASIC D2 D3 5 / 11 D4 D5 MIXED BL8531H_ADC 12BIT 10MSPS ADC FUNCTIONAL , SHA. SEC ASIC 6 / 11 MIXED BL8531H_ADC 12BIT 10MSPS ADC CORE EVALUATION GUIDE 1
Samsung Electronics
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d110d

4-bit flash adc

Abstract: ADC1256 AINC adc1256x DO[11:0] [MSB:LSB] REFTOP1 REFTOP REFBOT REFBOT1 CML SEC ASIC , , VDD25A3) be powered from the same source to avoid power latch-up. SEC ASIC 3/12 ANALOG , specified) SEC ASIC 4/12 ANALOG ADC1256X 12BIT 20MSPS ADC I/O CHART Index AINT Input (V , 1.25 1111 1111 1111 SEC ASIC 5/12 1LSB=0.488mV REFTOP=1.75V REFBOT=0.75V ANALOG , :0] D1 SEC ASIC D2 D3 6/12 D4 D5 ANALOG ADC1256X 12BIT 20MSPS ADC
Samsung Electronics
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4-bit flash adc ADC1256 cmos 4093 PIN DIAGRAM 48TSSOP VDD25A1 VSS25A1 VDD25A2 VSS25A2

bgr 1

Abstract: ap ag ASIC 2/11 ANALOG adc1276x 14BIT 10MSPS ADC ABSOLUTE MAXIMUM RATINGS Characteristics , power latch-up. SEC ASIC 3/11 ANALOG adc1276x 14BIT 10MSPS ADC DC ELECTRICAL , =0V, Toper=25°C, REFTOP=2V, REFBOT=1V unless otherwise specified) SEC ASIC 4/11 ANALOG adc1276x , CKIN DO[13:0] D1 SEC ASIC D2 D3 5/11 D4 D5 ANALOG adc1276x 14BIT , amp is SEC ASIC 6/11 ANALOG adc1276x 14BIT 10MSPS ADC CORE EVALUATION GUIDE 1. ADC
Samsung Electronics
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bgr 1 ap ag

AT98SC

Abstract: AT98SC032 Features General · Strong Challenge-Response Authentication Using Digital Signature · Digital Signature (RSA PKCS#1 V2.1, ECDSA) · Message Authentication Code (3DES MAC, HMAC) · Encryption (3DES, RSA PKCS#1 V2.1) · Message Digest (SHA-1, SHA-256) · Public Key Pair Generation (RSA including CRT, ECC) · HOTP One-Time Password Generation · High Speed Hardware Cryptographic Engines - Hardware 3DES , MPU/ High Speed Converters/RF Datacom ASIC/ASSP/Smart Cards Avenue de Rochepleine BP 123
Atmel
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AT98SC032CTUSB AT98SC AT98SC032 At98sc032ct-usB Atmel at98sc AT98SC-EV2 44-QFN 44-LQFP AT98SC032CT-USB 6533AS-SMIC-13O

AT98SC008CT

Abstract: AT90SC 3des Features General · · · · · · · · · · · · · · · Single Chip Turnkey Solution Strong Challenge-Response Authentication Using Digital Signature Digital Signature (3DES MAC, RSA PKCS#1, ECDSA) Encryption (3DES, RSA PKCS#1) Message Digest (SHA-1, SHA-256) Public Key Pair Generation (RSA including CRT or ECC) High Speed Hardware Cryptographic Engines ­ Hardware 3DES Crypto Accelerator (112 , Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC
Atmel
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FIPS140-2 AT98SC008CT AT90SC 3des ATMEL Application Note SOIC 44QFN COMMON CRITERIA EAL5 32-bit AT90SC Summary 6526AS

AT98SC016CU

Abstract: AT90SC 3des Features General · Single Chip Turnkey Solution · Strong Challenge-Response Authentication Using Digital Signature · Digital Signature (3DES MAC, PKCS#1 RSASSA_PSS and RSASSA_PKCS1_v1_5, · · · · · · · · · · · · · · DSA, EC-DSA, HMAC) Encryption (3DES, PKCS#1 RSAES_OAEP and RSAES_PKCS1_v1_5) Message Digest (SHA-1, SHA-256) Public Key Pair Generation (RSA, RSA-CRT, DSA and EC-DSA , 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 ASIC/ASSP/Secure Products Zone
Atmel
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ISO-7816 AT98SC016CU AT98SC016 ISO7816 masters in public administration ecdsa asic spi 7816 20-QFN

BW1222L

Abstract: Output AP : Analog Power AG : Analog Ground SEC ASIC · · · · DP : DG : AB : DB : 2/21 , body model) SEC ASIC 3/21 MIXED BW1222L AFE FOR CCD/CIS SIGNAL PROCESSOR ANALOG , High Level Output Voltage VoH Low Level Output Voltage VOL SEC ASIC Typ Max Unit , the input signal is held for data conversion SEC ASIC 5/21 MIXED BW1222L AFE FOR CCD , STRTLN tS SEC ASIC 6/21 MIXED BW1222L AFE FOR CCD/CIS SIGNAL PROCESSOR TIMING DIAGRAM
Samsung Electronics
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