SH7144/45 SH7145 FFFF83BA FFFF8260 FFFF8262 FFFF8264 FFFF8268 FFFF834E FFFF861E - Datasheet Archive

 

SH7144/45 Group Pulse High and Low Width Measurement 1. Specifications Pulse high width and low width times are measured and the

 

APPLICATION NOTE SH7144/45 SH7144/45 Group Pulse High and Low Width Measurement 1. Specifications Pulse high width and low width times are measured and the results are stored in RAM as shown in figure 1. When operating with on-chip peripheral clock P = 40.0 MHz, the pulse high width and low width can be measured in a range of 25.0 ns to 1.63 ms in 25.0 ns units. Pulse Pulse high width Pulse low width Figure 1 Pulse Width Measurement Timing 2. Functions Used In this sample task, the high width and low width of a pulse are measured using channel 0 (ch0). Figure 2 shows a block diagram of ch0. This task uses the following functions. · A function that performs pulse rising edge and falling edge detection, and sets the timer value at that time in an internal register (input capture) · A function that clears the timer counter when input capture occurs (counter clearing) · A function that initiates interrupt handling when a pulse rising edge or falling edge is detected Timer I/O control register H_0 (TIORH_0) (Detection edge specification) Pulse input Input capture 0A input pin (TIOC0A) Timer control register_0 (TCR_0) (Selects TCNT_0 counter clearing source) Edge detection and capture signal generation circuit Timer general register A_0 (TGRA_0) Input capture input A_0 (TGIA_0) Timer counter_0 (TCNT_0) Figure 2 Block Diagram of MTU/ch0 REJ05B0102-0100O/Rev.1.00 September 2003 Page 1 of 7 SH7144/45 SH7144/45 Group Pulse High and Low Width Measurement Table 1 shows the function assignments used in this sample task. The high width and low width of a pulse are measured by assigning MTU functions as shown in the table. Table 1 Function Assignments Pin or Register Name Function Assignment TCR_0 Counter clearing source selection TIORH_0 TIOC0A Selects input edge of input capture signal Inputs pulse to be measured TGRA_0 TGIA_0 Detection of counter value at pulse rising edge or falling edge Initiates pulse high and low width measurement at pulse rising edge or falling edge 3. Principles of Operation Figure 3 illustrates the principles of operation of this sample task. Pulse high width and low width measurement is performed by SH7145 SH7145 hardware and software processing as shown in the figure. Immediately after reset Input pulse (TIOC0A) Ch0 counter value H'0000 Time Hardware Processing None Software Processing Initialization (1) Enable pulse input from TIOC0A (2) Set rising edge for pulse edge detection (3) Enable TGIA_0 (4) Start count operation Hardware Processing (1) TGIA_0 generation (2) Transfer TCNT_0 value to TGRA_0 Hardware Processing (1) TGIA_0 generation (2) Transfer TCNT_0 value to TGRA_0 Software Processing Software Processing TGIA_0 processing (1) TGRA_0 value pulse low width (2) Set falling edge for pulse edge detection TGIA_0 processing (1) TGRA_0 value pulse high width (2) Set rising edge for pulse edge detection Figure 3 Principles of Operation of Pulse Width Measurement REJ05B0102-0100O/Rev.1.00 September 2003 Page 2 of 7 SH7144/45 SH7144/45 Group Pulse High and Low Width Measurement 4. Software (1) Modules Module Name Label Function Assignment Main routine pwhlmn MTU initialization Pulse high width and low width measurement pwhl1 Initiated by TGIA_0. Measures pulse high width and low width based on TGRA_0 value, and stores results in RAM (2) Arguments Label or Register Name pwh_hdata pwh_ldata Data Length Function Assignment Used to set timer value for pulse high width Pulse high width is calculated using following equation: Pulse high width (ns) = timer value × period (25.0 ns at 40.0 MHz operation) Used to set timer value for pulse low width Pulse low width is calculated using following equation: Pulse low width (ns) = timer value × period (25.0 ns at 40.0 MHz operation) 1 word Module Input/Output Pulse high width and low width measurement Output 1 word (3) Internal Registers Used Register Name Function Address Set Value P_PORTE.PECRL2 Sets PE0 as TIOC0A input pin H'FFFF83BA FFFF83BA H'0001 P_MTU0.TCR_0 TCNT_0 counter clock selection, and setting of TCNT_0 clearing by TGRA_0 input capture as counter clearing source Sets transfer of TCNT_0 value to TGRA_0 on detection of pulse rising edge or falling edge Enables interrupt request by TGIA_0 H'FFFF8260 FFFF8260 H'20 H'FFFF8262 FFFF8262 H'08 H'FFFF8264 FFFF8264 H'41 P_MTU0.TIORH_0 P_MTU0.TIER_0 P_MTU0.TGRA_0 TCNT_0 values at time of pulse rising edge and falling edge are stored, and pulse period is calculated from these values H'FFFF8268 FFFF8268 pwh_ldata pwh_hdata P_INTC.IPRD Sets 15 as TGIA_0 interrupt priority level H'FFFF834E FFFF834E H'f000 P_STBY.MSTCR2 MTU module standby mode clearing H'FFFF861E FFFF861E H'd0fd (4) RAM Used This sample task does not use any RAM apart from the arguments. Note: SH7145 SH7145 header file names are used for register label names. REJ05B0102-0100O/Rev.1.00 September 2003 Page 3 of 7 SH7144/45 SH7144/45 Group Pulse High and Low Width Measurement 5. Flowcharts (1) Main routine pwhlmn MSTCR2 H'd0fd TCR_0 H'20 TIORH_0 H'08 Clear MTU module standby mode Set TCNT_0 clearing by TGRA_0 input capture as ch0 counter clearing source in TCR_0 Set rising edge as pulse detection edge in TIORH_0 TIER_0 H'41 Enable interrupt by TGIA_0 in TIER_0 IPRD H'f000 Set 15 as TGIA_0 interrupt priority level in INCT.IPRD PECRL2 H'0001 CST 1 REJ05B0102-0100O/Rev.1.00 Set PE0 as TIOC0A input pin in PECRL2 Enable ch0 count operation with TSTR September 2003 Page 4 of 7 SH7144/45 SH7144/45 Group Pulse High and Low Width Measurement (2) Pulse high and low width measurement pwhl1 TGFA 0 TIORH_0&&H'0f = H'08? Clear interrupt request flag No Rising edge detection? Yes TGRA_0 pwh_hdata Set pulse width in high width area TIORH_0 |= H'fe Set falling edge as pulse detection edge in TIORH_0 TGRA_0 pwh_ldata TIORH_0 |= H'fe Set pulse width in low width area Set rising edge as pulse detection edge in TIORH_0 RTE REJ05B0102-0100O/Rev.1.00 September 2003 Page 5 of 7 SH7144/45 SH7144/45 Group Pulse High and Low Width Measurement 6. Program Listing /*/ /* INCLUDE FILE */ /*/ #include #include "iodefine_7145F 7145F.h" /*/ /* PROTOTYPE */ /*/ void pwhlmn(void); #pragma interrupt(pwhl1) /*/ /* RAM ALLOCATION */ /*/ #define pwh_hdata (*(unsigned short *)0xffffe000) #define pwh_ldata (*(unsigned short *)0xffffe002) /*/ /* MAIN PROGRAM */ /*/ void pwhlmn(void) { set_imask(0xf); P_STBY.MSTCR2.WORD = 0xd0fd; P_MTU0.TCR_0.BYTE = 0x20; /* timer clear input capture with TGRA_0 */ /* counter clock = P/1 */ P_MTU0.TIORH_0.BYTE = 0x08; /* input capture by TIOC0A rising edge */ P_MTU0.TIER_0.BYTE = 0x41; /* enable TGIA interrupt */ P_INTC.IPRD.WORD = 0xf000; /* set initialize level = 15 */ P_PORTE.PECRL2.WORD = 0x0001; P_MTU34 MTU34.TSTR.BIT.CST = 1; /* start TCNT_0 */ set_imask(0x0); while(1); } void pwhl1() { P_MTU0.TSR_0.BIT.TGFA = 0; /* clear interrupt flag */ if(P_MTU0.TIORH_0.BYTE & 0x0f) = 0x08) { pwh_hdata = P_MTU0.TGRA_0.BYTE; /* set pwh */ P_MTU0.TIORH_0 |= 0x01; /* input capture falling edge TIOC0A */ } else { pwh_ldata = P_MTU0.TGRA_0.BYTE; /* set pwl */ P_MTU0.TIORH_0 |= 0xfe; /* input capture rising edge TIOC0A */ } } REJ05B0102-0100O/Rev.1.00 September 2003 Page 6 of 7 SH7144/45 SH7144/45 Group Pulse High and Low Width Measurement Keep safety first in your circuit designs! 1. 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Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. REJ05B0102-0100O/Rev.1.00 September 2003 Page 7 of 7