SFWA160JF - Datasheet Archive

 

Specifications and Applications Information Smart For orce Smart ForceTM Single Lamp Inverter 08/12/10 The ERG SFW Series of DC

 

SFWA160JF SFWA160JF Specifications and Applications Information Smart For orce Smart ForceTM Single Lamp Inverter 08/12/10 The ERG SFW Series of DC to AC inverters is specifically designed for applications which require high efficiency, wide dimming and LCD brightness stability over a wide input voltage range. Package Configuration J2 1 Less than 6mm in Height .087 [2,21] DIA.(2X) Onboard regulation of lamp current High efficiency Open lamp detection Onboard PWM dimming Support for a wide range of displays 3.75 [95,3] 3.23 [82,0] Low EMI emission .157 [3,99] 1 J1 Connectors Input Connector Output Connector Molex 53261-0571 JST SM02(8.0)B-BHS-1-TB J1-1 J1-2 J1-3 J1-4 J1-5 +Vin GND Enable Control N/C J2-1 ACout J2-2 ACreturn .175 [4,45] .503 [12,8] .787 [20,0] PCB components are shown for reference only. Actual product may differ from that shown. Designed, manufactured and supported within the USA, the SFW series features: page 1 of 4. SFWA160JF SFWA160JF Absolute Maximum Ratings Rating Symbol Value Units Vin -0.3 to +21.0 V dc Enable VEnable -0.3 to Vin V dc Control VControl -0.3 to +5.5 V dc Ta -20 to +85 o C Tstg -40 to +85 o C Input Voltage Range Ambient Operating Temperature Storage Temperature Operating Characteristics Unless otherwise noted Vin = 12.0 Vdc, Ta = 25oC, with a simulated load and unit has been running for 5 minutes. Characteristic Symbol Min Typ Max Units Input Voltage (note 1) V in +8.0 +12.0 +18.0 V dc Input Current (note 2) I in - 0.43 0.49 A dc Operating Frequency Fo Minimum Output Voltage (note 3) 62 kHz Vout (min) 1800 - - Vrms h - 85 - % Output Current (per lamp) (note 5) I out - 6.0 - mArms Output Voltage (note 6) V out - - 780 Vrms Turn-off Threshold Vthoff GND - 0.5 V dc Turn-on Threshold Vthon 2.4 - Vi n V dc Efficiency (note 4) Enable Pin Specifications subject to change without notice. (Note 1) (Note 2) (Note 3) (Note 4) (Note 5) (Note 6) Vin is measured at the pcb connector. Input current in excess of maximum may indicate a load/inverter mismatch condition, which can result in reduced reliability. Please contact ERG technical support. Provided data is not tested but guaranteed by design. 730 Vrms lamp voltage used in efficiency calculation. The output current is measured from the AC return lead of the inverter using a Tektronix CT-2 AC current probe terminated into 50 ohms at the oscilloscope input. Max allowable lamp voltage. page 2 of 4. SFWA160JF SFWA160JF Onboard PWM Unless otherwise noted Vin = 12.0 Vdc, Ta = 25 oC and unit has been running for 5 minutes. Characteristic Symbol Min Typ Max Units f pwm - 290 - HZ Minimum Brightness V control - 4.0 - V Maximum Brightness V control - 1.3 - V Frequency Pin Descriptions Vin Input voltage to the inverter. GND Inverter ground. Control Analog voltage input to the onboard pulse width modulator. Graph 1 shows the relationship between Vcontrol and relative display brightness. Enable Inverter Enable. Application Information The SFW series of inverters is designed to power one cold cathode fluorescent lamp from a nonregulated DC power source. Enabling the inverter is accomplished by applying a voltage greater than Vthon to the Enable pin of the inverter. Dimming the inverter is accomplished by applying a DC voltage to the Control pin. The applied DC voltage adjusts the duty cycle of the onboard PWM controller thereby changing the brightness of the backlight. Graph 1 shows the typical brightness versus voltage applied to the control pin. As with all inverters, it is important to take notice that the voltage present at the output pins is quite high and requires special care to be taken when integrating into the final application. The inverter should not be mounted closer than 0.250" (6.4mm) to any other conductive material. In general, the mounting hardware should be nonconductive. Open frame inverters, like the SFW, are not recommended in applications which require operation above 10,000 feet (3000 meters). To improve the electrical efficiency of the overall application, the input harness cabling should be less than 12 inches (30 cm). The cable assembly between the inverter and the display is best kept below 4 inches (10 cm). If there are any questions or concerns, please feel free to contact ERG for exceptions or recommendations. page 3 of 4. SFWA160JF SFWA160JF Graph 1 Analog Dimming +Vin +12V (1) ACout GND +5V Lamp 1 J2 ACreturn Control +On -Off Enable Figure 1 search Gr Re R 13 M ® c. R RE UL p, In ou Endi co tt (1) Low ESR type input by-pass capacitor (22 uF - 220 uF) may be required to reduce reflected ripple, and to improve power supply transient response. IS G I I O S TE RE D F 3 900 A3 1 Endicott Research Group, Inc. (ERG) reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by ERG is believed to be accurate and reliable. However, no responsibility is assumed by ERG for its use. page 4 of 4.