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Part Manufacturer Description Datasheet BUY
LM95235DIMM/NOPB Texas Instruments ±2°C Remote and Local Temperature Sensor with TruTherm Technology and SMBus Interface 8-VSSOP -40 to 90 visit Texas Instruments Buy
LM89-1DIMMX/NOPB Texas Instruments ±0.75°C Remote and Local Temperature Sensor with SMBus Interface 8-VSSOP 0 to 125 visit Texas Instruments
LM95235DIMM Texas Instruments Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm? Technology 8-VSSOP -40 to 90 visit Texas Instruments
LM95235DIMMX/NOPB Texas Instruments ±2°C Remote and Local Temperature Sensor with TruTherm Technology and SMBus Interface 8-VSSOP -40 to 90 visit Texas Instruments
LM89-1DIMM/NOPB Texas Instruments ±0.75°C Remote and Local Temperature Sensor with SMBus Interface 8-VSSOP 0 to 125 visit Texas Instruments Buy
LM95235DIMMX Texas Instruments Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm? Technology 8-VSSOP -40 to 90 visit Texas Instruments

SDRAM unRegistered DIMM

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: / REGISTERED DIMM, 168PIN, UNBUFFERED / UNREGISTERED DIMM, 2QGPIN, UNBUFFERED ' UNREGISTERED SODfMM. I44PIN , LG Semicon ORDERING INFORMATION SDRAM ORDERING INFORMATION^ 6M & 64M SDRAM) GM XX X X XX X X , : COMMERCIAL M : MILITARY 1 - INDUSTRIAL SPEED 72 : SDRAM PR O CESS V : CMOS (3.3V) D EN SITY 16 , : SECOND C : THfRD D : FORTH SDRAM MODULE ORDERING INFORMATION (16M / 64M SD BASE) GMM X X X X X X X X X X X X - X X P R E F IX O F 1 M EM ORY M O D ULE F A M IL Y 2 : SDRAM ^ ^ - SPEED 15: 15ns -
OCR Scan
133MH I25MH 150MH I33MH 125MH 200PIN

74LVT74

Abstract: LVT16501 stabilize, assuming that they would be intelligible at all. As shown in Figure 1, a conventional SDRAM DIMM , without some sort of compensation. In comparison, a registered SDRAM DIMM presents only a 15 pF load. Conventional SDRAM DIMM Control signals 15pF 120 pF 15pF 15pF 15pF 15pF 15pF 15pF , SDRAM control signals: Registered SDRAM DIMM 15pF 15pF 15pF 15pF 15pF 15pF 15pF , Control signals 15 pF Figure 1. SDRAM DIMM Differences Clearly, registering the control signals
Freescale Semiconductor
Original
MPC106 74LVT74 LVT16501 SN74ALVCH162601 SN74ALVCH16501 BA1A11 AN1768/D

74LVT74

Abstract: LVT16501 registered driver has been inserted between the DIMM pins and the following SDRAM control signals: PR , , assuming that they would be intelligible at all. As shown in Figure 1, a conventional SDRAM DIMM presents , without some sort of compensation. In comparison, a registered SDRAM DIMM presents only a 15 pF load. 2 Using Registered SDRAM DIMMs with the MPC106 MOTOROLA Conventional SDRAM DIMM Control , SDRAM SDRAM SDRAM SDRAM SDRAM Registered SDRAM DIMM 15pF 15pF 15pF 15pF 15pF
Motorola
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PowerPC 60X Bus Interface controller

sdram DIMM 100 Pinout

Abstract: NS2016 . and other countries. 16Mx72, 10 - 12ns, CL2-CL3, DIMM 30A203-00 A 128 Megabyte SDRAM DIMM , 128 Megabyte CMOS Synchronous DRAM DIMM, consisting of eighteen 4Mx4x4 SDRAM devices. 8-bit ECC is , Intel® (PC100) Approved 128 MB DIMM by Dense-Pac for use in Intel® 440BX AGP Chip Set (NightShade , -Pin DIMM A0 - A13 BA0, BA1 DQ0 - DQ71 CBA0 - CBA7 CAS RAS WE DQMB0-DQMB7 CKE0, CKE1 CK0 - CK3 S0 - S3 SDA , SDRAM Cycle Time (tCYC) SDRAM Access Time from Clock (tAC) Module Configuration Type Refresh Rate and
Dense-Pac Microsystems
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sdram DIMM 100 Pinout NS2016 SDRAM Drawing DPSD16MS72RW-PC100-C DPSD16MX72RW SR/15 128MB

ttl cmos advantages disadvantages

Abstract: 74VCXF162835 Application B: SDRAM Memory Module Support CPU CPU CPU DIMM Memory/Data Path Controller , GTLP Interface Low-Voltage Logic DIMM Support Smaller Packaging Solutions: TinyLogicTM Ball Grid , Multiplexing Voltage Translation CPU Interface SDRAM Memory Module Support Comprehensive Selection , Yes Yes Yes Yes Full GTLP Portfolio Yes Yes No No No Complete DIMM , CPU GTLP Application B: SDRAM Memory Module Support SSTV16857/SSTV16859 · Compliant with DDR
Fairchild Semiconductor
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ttl cmos advantages disadvantages 74VCXF162835 FMS7857 FSTU16450 FSTU32160 FSTU3257 SE-171

Dense-Pac Microsystems

Abstract: Intel® (PCI 00) Approved 128 MB DIMM by Dense-Pac for use in Intel® 440BX AGP Chip Set (Nightshade , . and other countries. DENSE-PAC MICROSYSTEMS DESCRIPTION: 128 Megabyte SDRAM D IM M , DPSD16MX72RW is a PC100 Compliant, high speed 128 Megabyte CMOS Synchronous DRAM DIMM, consisting o f eighteen 4Mx4x4 SDRAM devices. 3-bit ECC is provided for error detection and correction. These modules offer , 75 7Ê 77 78 79 60 51 62 53 84 - Vdd Vss N.C. · 8-Bit ECC · JEDEC Standard 1 68-Pin DIMM
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OCR Scan
Dense-Pac Microsystems DOW04 DPSD16MX72
Abstract: Synchronous DRAM DIMM, consisting of thirty-two 2Mx8x4 SDRAM devices configured as 16 stacked 128M bit modules , DENSE-PAC MICROSYSTEMS DESCRIPTION: 256 Megabyte SDRAM D IM M DPSD32ML64RW5 PIN-OUT DIAGRAM , Module Rows Data Width Data W idth (Continued) Voltage Interface SDRAM Cycle Time (tcrc) SDRAM Access Time from Clock (U d Module Configuration Type Refresh Rate and Type Primary SDRAM Width Error Checking SDRAM Width Minimum Clock Delay for Back-to-Back Random Column Address Burst Lengths Supported Number of -
OCR Scan
DQW04

SME1701

Abstract: ak36 diode master, includes I/O MMU - Read buffer and write gathering · PC-100 type SDRAM DIMM memory interface - 16 , on page 4 Clock, Reset, and System Control Signals . on page 5 SDRAM DIMM Memory Interface , -500 3. SDRAM DIMM MEMORY INTERFACE The UltraSPARC-IIe processor interfaces directly to 3.3 volt , interface. The MCU supports registered and unregistered PC-100 type SDRAM DIMMs with PCB layout requirements , -500 SDRAM DIMM Memory Connections MEM_SCLK Connection Example for DIMM0 CLK[0] CLK[4] CK0, CK2 CK1, CK3
Sun Microsystems
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SME1701 ak36 diode ag33 diode device AH34 marking aj7 tms 980 processor SME1701CPGA-400 SME1701CPGA-500

DDR3 pcb layout

Abstract: Micron TN-47-01 SDRAM Unbuffered DIMM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­8 DQS, DQ, and DM for DDR3 SDRAM Unbuffered DIMM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­9 Memory Clocks for DDR3 SDRAM Unbuffered DIMM . . . . , SDRAM Unbuffered DIMM . . . . . . . . . . . . . . . . . . . . . . . 2­13 Stratix III and Stratix IV , DIMM configuration, on signal quality. Finally, this chapter provides DDR2 SDRAM layout guidelines
Altera
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DDR3 pcb layout Micron TN-47-01 DDR3 pcb layout guide DDR3 pcb layout guidelines DDR3 phy DDR3 sodimm pcb layout

DDR3 pcb layout

Abstract: DDR2 sdram pcb layout guidelines SDRAM Unbuffered DIMM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­8 DQS, DQ, and DM for DDR3 SDRAM Unbuffered DIMM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­9 Memory Clocks for DDR3 SDRAM Unbuffered DIMM . . . . , SDRAM Unbuffered DIMM . . . . . . . . . . . . . . . . . . . . . . . 2­13 Stratix III and Stratix IV , SDRAM DIMM (Receiver) With fly-by topology (Figure 1­2), you place the parallel termination
Altera
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DDR2 sdram pcb layout guidelines DDR2 pcb layout DDR3 jedec JESD8-15A dimm pcb layout DDR3 DIMM 240 pin names

MT4SFDT464AG-662

Abstract: PRELIMINARY 4 MEG x 64 SYNCFLASH DIMM MT4SFDT464A SYNCFLASHTM DIMM For the latest , (Front View) · JEDEC-standard, 168-pin dual in-line memory module (DIMM) · Utilizes 100 MHz , ) · LVTTL-compatible inputs and outputs · Serial presence-detect (SPD) OPTIONS 168-Pin DIMM , 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 MARKING · Package 168-pin DIMM , in the SDRAM and SyncFlash product families. They are for reference only. *The extra RP# (pin 24
Micron Technology
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MT4SFDT464AG-662 168-P MT4SFDT464AG-662B2 SFM01 168-PIN

dg36

Abstract: 3DG44 DENSE-PAC MICROSYSTEMS DESCRIPTION: 64 Megabyte SDRAM D IM M DPSD8MX72RW P IN -O U T DIAG RA , 4Mx4x4 SDRAM devices. 8-bit ECC is provided for error detection and correction. These modules offer , . · 8-Bit ECC · JEDEC Standard 1 68-Pin DIMM ] 125 ] 126 ] 127 J 123 ] 129 ] 130 ] 131 ] 132 ] 133 , SDRAM d evice, DGMB4 DQ0 DQ1 DQ2 DG3 DQ4 DQ5 DQ6 DQ7 D0MB1 -A *- -vV - -A /- -vV - -A , Module Rows Data Width Data W idth (Continued) Voltage Interface SDRAM Cycle Time ( f o d SDRAM Access
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OCR Scan
dg36 3DG44 DG35 DPSD8MX72

DDR3 DIMM 240 pinout

Abstract: DDR2 sdram pcb layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . 2­7 DDR3 SDRAM Unbuffered DIMM . . . . . . . . , , DQ, and DM for DDR3 SDRAM Unbuffered DIMM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­9 Memory Clocks for DDR3 SDRAM Unbuffered DIMM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­11 Commands and Addresses for DDR3 SDRAM Unbuffered DIMM . . . . . . . . . . , . . . . . . . . . . . . 1­4 Full or Half Rate SDRAM Controller . . . . . . . . . . . . . . . . . .
Altera
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DDR3 DIMM 240 pinout DDR3 slot 240 pinout samsung ddr3 DDR3 ECC SODIMM Fly-By Topology DDR2 DIMM 240 pinout micron

ECU-V1H102KBM

Abstract: PANASONIC SURFACE MOUNT RESISTORS LAND PATTERN heat sink required Integrated Power MOSFETs Generates termination voltages for DDR SDRAM, SSTL-2 SDRAM, SGRAM, or equivalent memories The ML6554 switching regulator is designed to convert voltage , within 3% or less. Generates termination voltages for active termination schemes for DDR SDRAM, GTL , voltage for other bus interface standards such as DDR SDRAM, SSTL, CMOS, RambusTM, GTL+, VME, LV-CMOS , ML6554 VREF Figure 4. Complete Termination Solution PC Main Memory (PC Motherboard) SO DIMM AND
Fairchild Semiconductor
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ECU-V1H102KBM PANASONIC SURFACE MOUNT RESISTORS LAND PATTERN buss pcb 3a NEC semiconductor land pattern dimensions ML6554IU hitachi ecu datasheet

ECU-V1H102KBM

Abstract: ECUV1H102KBM Regulator 168/184/208-PIN DIMM CONNECTORS AND SDRAM/SGRAM MODULES TERMINATION RESISTORS PC CHIP SET , termination voltages for DDR SDRAM, SSTL-2 SDRAM, SGRAM, or equivalent memories Generates termination voltages for active termination schemes for DDR SDRAM, GTL+, Rambus, VME, LV-TTL, HSTL, PECL and other high , interface standards such as DDR SDRAM, SSTL, CMOS, RambusTM, GTL+, VME, LV-CMOS, LV-TTL, HSTL and PECL , VREF Figure 4. Complete Termination Solution PC Main Memory (PC Motherboard) SO DIMM AND MODULES
Fairchild Semiconductor
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ECUV1H102KBM SMD 7014 ERJ8ENF1000V 3535 fairchild 820uf 25V capacitor

tag 8534

Abstract: TAG 8537 . SDRAM Interface , . 7-6 7.4.2. Access Transparent Mode to SDRAM (MB86861 only). , . 8-3 8.4.1. SDRAM Address Range Specifier Registers (SDARSR0-5). 8-3 8.4.2. SDRAM Address Mask Registers (SDAMR0-1) . 8-3 8.4.3. SDRAM Configuration Register (SDCFG) .
Fujitsu
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tag 8534 TAG 8537 ps0001 MB86860 MB86861/MB86862 MB8686

Tundra Semiconductor tsi108

Abstract: Tsi109 Corporation. All other registered and unregistered marks (including trademarks, service marks and logos) are , . . . . . . . . . . . . . . . . . . 65 3.5.2 SDRAM Clocks . . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . 70 3.5.6 Dual DIMM Connector Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 3.5.7 Single DIMM Layout. . . , 2.6 V VDD_PC VDD_PLL_PCI VDD_SD_Vref VIL VIH -0.5 4.1 V SDRAM reference voltage
Tundra Semiconductor
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Tundra Semiconductor tsi108 Tsi109 TSI108-200CLY tsi108 108/T 109TM 80B5000 MA002 2002/95/EC 2005/747/EC

310ERF

Abstract: alcatel 1648 Tundra Semiconductor Corporation. All other registered and unregistered marks (including trademarks , Bus (PB) Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 SDRAM Interface . . . . , . . . . . . . . . . . . . . . . 58 3.3.1 3.3.2 3.4 3.5 Time-Multiplexed SDRAM Signals . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . 73 3.7.1 4. SDRAM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 4.2 4.3 4.4 4.5 4.6 Supported SDRAM Configurations . . .
Tundra Semiconductor
Original
310ERF alcatel 1648 80A5000 MA001

CA91L750-100IL

Abstract: 7400 BOOK . . . . . . . . . . . . . . . . . . 32 1.2.2 SDRAM Interface . . . . . . . . . . . . . . . . . , . . 54 3.3.1 Time-Multiplexed SDRAM Signals . . . . . . . . . . . . . . . . . . . . . . . 58 , . . . . . . . . . . . . . . . . . . . 70 4. SDRAM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 4.2 Supported SDRAM Configurations . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . 76 4.3 SDRAM Operation . . . . . . . . . . . . . . . .
Integrated Device Technology
Original
CA91L750-100IL 7400 BOOK cdma fwt interface 740 IBM 917D MPC7400

ddr2 ram slot pin detail

Abstract: DDR3 DIMM 240 pinout leveling. DDR3 SDRAM with levelling applies to any DDR3 DIMM interfaces. DDR3 SDRAM without leveling , , DDR2, and DDR3 SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , SDRAM Overview DDR SDRAM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­1 DDR2 SDRAM Overview . . . . . . . , . . . . . . . . 2­1 DDR3 SDRAM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Altera
Original
ddr2 ram slot pin detail 945 MOTHERBOARD CIRCUIT diagram samsung DDR2 PC 6400 gigabyte 945 motherboard power supply diagram HPC 932 rtd 2668
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