SD101B SSOP-24 - Datasheet Archive

 

SD101B Low Power Receiver IC Description The SD101B is a low power receiver IC and it is suitable for use in a variety of low

 

Super Device Microelectronics Co., Ltd. SD101B SD101B Low Power Receiver IC Description The SD101B SD101B is a low power receiver IC and it is suitable for use in a variety of low power radio applications including remote keyless entry. The SD101B SD101B is based on a single-conversion, super-heterodyne receiver architecture and incorporates an entire phase-locked loop (PLL) for precise local oscillator generation. In addition, the SD101B SD101B provides an RSSI output. Features Extremely low power operation Low external part count Receiver input frequency : 290 ~ 460 MHz On-chip VCO with integrated PLL using crystal oscillator reference PLL power down feature Integrated IF and data filters RSSI output SSOP-24 SSOP-24 package (0.64 mm pitch) Applications Wireless mouse Video sender remote controller Car alarm and home security systems Functional Description The SD101B SD101B receiver IC incorporates an LNA; mixer; PLL-based local oscillator including VCO, fixed divider (÷ 64), reference crystal oscillator, phase-frequency detector (PFD), and charge pump; IF filter; logarithmic amplifier; data filter; peak detector; and 1bit comparator and is capable of demodulating ASK input signals. 1 of 5 SD101B SD101B Package and Pin Assignment A A1 A2 b C D E E1 e L y 0 Dimensions in mm Min. Nom. Max. 1.35 1.60 1.75 0.10 0.25 1.45 0.20 0.25 0.30 0.19 0.25 8.55 8.75 5.80 6.20 3.80 4.00 0.64 0.40 1.27 0.10 0 0 g0 Super-Device SD101B SD101B Symbols Dimensions in inch Min. Nom. Max. 0.053 0.064 0.069 0.004 0.010 0.057 0.008 0.010 0.012 0.007 0.010 0.337 0.344 0.228 0.244 0.150 0.157 0.025 0.016 0.050 0.004 0 0 80 2 of 5 SD101B SD101B Pin Descriptions Numbe r Name 1 2 3 IFDC1 IFDC2 IFIN MIXO UT VCC MIXIN RFOU T VSS2 RFIN ASKR EF ASKO UT PEAK 4 5 6 7 8 9 10 11 12 Description Numbe r Name Description IF amplifier input 13 14 15 VSS1 Ground PD PLL power down: low VCO1 Mixer output 16 VCO2 Nominal 5V supply RF mixer input 17 18 NC No connection RSS1 RSSI output Open collector LNA output 19 DO LNA ground LNA input 20 21 DF0 DF1 Comparator reference level 22 DF2 Comparator output 23 XTAL1 Crystal oscillator external Peak detector output 24 XTAL2 If amplifier feedback decoupling connections Open collector differential VCO outputs Charge pump output Data filter external connections connections Absolute Maximum Ratings VSS = VSS1 = VSS2 = 0V Parameter Supply voltage Operating temperature range Storage temperature range Soldering temperature range Soldering time range Symb ol Rating Uni t VCC VSS-0.5 to VSS +8.0 V TOPR -40 to 85 OC TSTG TSLD TSLD -55 to 150 OC 255 OC 10 s 3 of 5 SD101B SD101B Recommended Operating Conditions VSS = VSS2 = 0V Parameter Symbol Supply voltage range RF input frequency Operating temperature VCC FRFIN TA min. 4.75 290 -10 Value typ. max. 5.0 7.0 460 25 60 Unit V MHZ OC Electrical Characteristics (VCC= 4.75 to 7.0 V,VSS1 = OV , TA = -40 to 85 Parameter Current consumption Current consumption(PLL off) Sensitivitya Signal handlingb unless otherwise noted) Value Unit Symbol Condition min. typ. max. m 2.4 3.0 ICC,total VCC = 5V A m ICC,noPL 1.8 2.4 VCC=5V;VPD=OV A L dB f =434MHz;2K -103 -100 SENS RFIN m B/s dB -30 SH m Integrated IF filter-3-dB low pass fIF,-3dB cutoff frequency Adjacent channel rejectionc ACR ASK output duty ratio DR Peak detector source current Ipeak Peak detector leakage current Ileak Charge pump source/sink ICP current PD logic HIGH input voltage 65 dB 40 50 60 % 500 µA 250 nA VCC 0.5 VSS2 -0.5 VIL,PD ASKOUT voltage logic HIGH output VOH,ASKO ASKOUT logic LOW output voltage UT VOL,ASKO UT µA ±30 VIL,PD PD logic LOW input voltage 450 550 750 KHz Iload = 10µA Iload = 10µA VCC + 0.5 VSS2 -0.5 0.7* VCC V V V 0.3* VCC 4 of 5 V SD101B SD101B Note of Electrical Characteristics Sensitivity is defined as the minimum average signal level measured at the input which is necessary to achieve a bit error rate of 0.01 when the input signal is a return-to-zero (RZ) pulse with an average duty cycle of 50%. The RF input is assumed to be matched to 50 ohms. Signal handling is defined as the maximum input signal capable of being successfully demodulated. It is assumed that the input signal is ASK modulated with a minimum extinction ratio of 40 dB. The RF input is assumed to be matched to 50 ohms. Adjacent channel rejection is defined for an interfering tone ACR [dB] above the receiving threshold and 10 MHz offset from the carrier giving a 3dB reduction in sensitivity. Contact information For additional information please visit http://www.super-device.com.tw Tel: +886-2-8226-1788 Fax: +886-2-8226-2277 e-mail: sd@super-device.com.tw Data of release:03-2002 ~End~ 5 of 5