SA624 SA604A SA604 SR00440 SA624D SR00441 /SA605 NE624 SFG455A3 2A6597H N1500 - Datasheet Archive

 

SA624 High performance low power FM IF system with high-speed RSSI Product specification Replaces data of November 3, 1992 RF

 

RF COMMUNICATIONS PRODUCTS SA624 SA624 High performance low power FM IF system with high-speed RSSI Product specification Replaces data of November 3, 1992 RF Data Handbook Philips Semiconductors 1997 Nov 07 Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI DESCRIPTION SA624 SA624 PIN CONFIGURATION The SA624 SA624 is pin-to-pin compatible with the SA604A SA604A, but has faster RSSI rise and fall time. The SA624 SA624 is an improved monolithic low-power FM IF system incorporating two limiting intermediate frequency amplifiers, quadrature detector, muting, logarithmic received signal strength indicator, and voltage regulator. The SA624 SA624 features higher IF bandwidth (25MHz) and temperature compensated RSSI and limiters permitting higher performance application compared with the SA604 SA604. The SA624 SA624 is available in 16-lead SO (surface-mounted miniature) package. D Package IF AMP DECOUPLING 1 16 IF AMP INPUT GND 2 15 IF AMP DECOUPLING MUTE INPUT 3 VCC 14 IF AMP OUTPUT 4 13 GND RSSI OUTPUT 5 12 LIMITER INPUT MUTE AUDIO OUTPUT 6 FEATURES · Low power consumption: 3.4mA typical · Temperature compensated logarithmic Received Signal Strength 11 LIMITER DECOUPLING UNMUTE AUDIO OUTPUT 7 10 LIMITER DECOUPLING QUADRATURE INPUT 8 9 LIMITER SR00440 SR00440 Indicator (RSSI) with a dynamic range in excess of 90dB Figure 1. Pin Configuration · Fast RSSI rise and fall time · Two audio outputs - muted and unmuted · Low external component count; suitable for crystal/ceramic filters · Excellent sensitivity: 1.5µV across input pins (0.22µV into 50 APPLICATIONS · Digital cellular base station · Cellular radio FM IF · High performance communications receivers · Intermediate frequency amplification and detection up to 25MHz · RF level meter · Spectrum analyzer · Instrumentation · FSK and ASK data receivers matching network) for 12dB SINAD (Signal to Noise and Distortion ratio) at 455kHz · SA624 SA624 meets cellular radio specifications ORDERING INFORMATION DESCRIPTION TEMPERATURE RANGE DWG # -40 to +85°C 16-Pin Plastic Small Outline (SO) package (Surface-mount) ORDER CODE SA624D SA624D SOT109-1 ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER VCC Single supply voltage TSTG RATING Storage temperature range 9 TA °C -40 to +85 D package 2 °C 90 Operating ambient temperature range SA624 SA624 Thermal impedance V -65 to +150 JA 1997 Nov 07 UNITS °C/W 853-1647 18664 Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI SA624 SA624 BLOCK DIAGRAM 16 15 14 13 12 11 10 9 GND IF AMP LIMITER LIMITER QUAD DET SIGNAL STRENGTH VOLTAGE REGULATOR MUTE VCC GND 1 2 3 4 5 6 7 8 SR00441 SR00441 Figure 2. Block Diagram DC ELECTRICAL CHARACTERISTICS VCC = +6V, TA = 25°C; unless otherwise stated. LIMITS SYMBOL PARAMETER TEST CONDITIONS SA624 SA624 MIN VCC Power supply voltage range ICC DC current drain Mute switch input threshold 1997 Nov 07 TYP 4.5 2.5 (ON) (OFF) 1.7 3 UNITS MAX 8.0 3.4 V 4.2 mA 1.0 V V Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI SA624 SA624 AC ELECTRICAL CHARACTERISTICS Typical reading at TA = 25°C; VCC = +6V, unless otherwise stated. IF frequency = 455kHz; IF level = -47dBm; FM modulation = 1kHz with +8kHz peak deviation. Audio output with C-message weighted filter and de-emphasis capacitor. Test circuit Figure 3. The parameters listed below are tested using automatic test equipment to assure consistent electrical characterristics. The limits do not represent the ultimate performance limits of the device. Use of an optimized RF layout will improve many of the listed parameters. LIMITS SYMBOL PARAMETER TEST CONDITIONS SA624 SA624 MIN Input limiting -3dB Test at Pin 16 AM rejection 80% AM 1kHz Recovered audio level 15nF de-emphasis Recovered audio level 150pF de-emphasis THD Signal-to-noise ratio MAX -92 Total harmonic distortion S/N TYP UNITS dBm/50 30 34 dB 80 175 260 mVRMS 530 -42 dB 73 -34 No modulation for noise mVRMS dB RF level = -118dBm 0 160 650 mV RF level = -68dBm 1.9 2.65 3.1 V RF level = -18dBm RSSI output1 4.0 4.85 5.6 V IF freq. = 455kHz IF level = -44dBm 1.1 µs RSSI output rise time IF level = -16dBm 1.2 µs (10kHz pulse, no IF filter) IF freq. = 10.7MHz IF level = -44dBm 1.2 µs IF level = -16dBm 1.1 µs IF level = -44dBm 1.3 µs RSSI output fall time IF level = -16dBm 4.7 µs (10kHz pulse, no IF filter) IF freq. = 10.7MHz IF level = -44dBm 1.6 µs IF level = -16dBm 4.2 µs RSSI range R4 = 100k (Pin 5) 90 dB RSSI accuracy R4 = 100k (Pin 5) IF freq. = 455kHz +1.5 dB IF input impedance 1.4 1.6 k IF output impedance 0.85 1.0 k Limiter input impedance 1.4 1.6 k Limiter output impedance 300 Limiter output level no load 280 mVRMS Unmuted audio output resistance 58 k Muted audio output resistance 58 k NOTE: 1. SA604 SA604 data sheets refer to power at 50 input termination; about 21dB less power actually enters the internal 1.5k input. SA604 SA604 (50) SA624 SA624 (1.5k)/SA605 /SA605 (1.5k -97dBm -118dBm -47dBm -68dBm +3dBm -18dBm 1997 Nov 07 4 Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI SA624 SA624 F1 NE624 NE624 TEST CIRCUIT C4 Q = 20 LOADED C1 R2 C2 C5 R3 C6 INPUT F2 R1 16 15 14 13 12 11 10 9 C7 SA624 SA624 C3 1 2 3 4 5 C8 S1 MUTE INPUT AUDIO OUTPUT INPUT M U T E GND OFF ON 6.8µF +20% 25V Tantalum 455kHz Ceramic Filter Murata SFG455A3 SFG455A3 455kHz (Ce = 180pF) TOKO RMC 2A6597H 2A6597H 51 +1% 1/4W Metal Film IF SIGNETICS NE624 NE624 TEST CKT 100nF +10% 50V 10pF +2% 100V NPO Ceramic 100nF +10% 50V 100nF +10% 50V 15nF +10% 50V 150pF +2% 100V N1500 N1500 Ceramic 1nF +10% 100V K2000-Y5P K2000-Y5P Ceramic AUDIO DATA 100k +1% 1/4W Metal Film GND 1500 +5% 1/8W Carbon Composition R4 GND 1500 +1% 1/4W Metal Film R3 RSSI VCC R2 IF SIGNETICS NE624 NE624 TEST CKT DATA OUTPUT RSSI OUTPUT 100nF + 80 ­ 20% 63V K10000 K10000­25V Ceramic 100nF +10% 50V 100nF +10% 50V 100nF +10% 50V C12 F1 F2 R1 8 C10 C11 VCC C5 C6 C7 C8 C9 C10 C11 7 C9 R4 C12 C1 C2 C3 C4 6 INPUT M U T E GND OFF ON RSSI VCC AUDIO GND DATA GND SR00442 SR00442 Figure 3. SA624 SA624 Test Circuit 1997 Nov 07 5 Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI 16 15 14 13 12 SA624 SA624 11 10 9 GND 42k 42k 700 7k 1.6k 1.6k 40k 40k 700 35k 2k FULL WAVE RECT. FULL WAVE RECT. 4.5k 2k 8k VOLTAGE/ CURRENT CONVERTER VEE MUTE VOLT REG VOLT REG QUAD VCC DET BAND GAP VOLT VCC 80k 80k VCC GND 2 55k 55k 80k 1 40k 40k 3 4 5 6 7 8 SR00443 SR00443 Figure 4. Equivalent Circuit 1997 Nov 07 6 Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI 0.5 to 1.3µH SA624 SA624 SFG455A3 SFG455A3 22pF 1nF 5.5µH 0.1µF NE624 NE624 TEST CIRCUIT 0.1µF 455kHz Q=20 44.545 3rd OVERTURE XTAL SFG455A3 SFG455A3 5.6pF 0.1µF 10pF +6V 6.8µF 8 100nF 7 6 16 5 15 14 13 12 11 10 9 10nF 0.1µF SA602A SA602A 1 2 SA624 SA624 0.1µF 3 4 1 2 47pF 3 4 5 0.1µF 0.21 to 0.28µH 6 7 DATA OUT 100k +6V VCC C­MSG FILTER 22pF MUTE 100nF AUDIO OUT ­ `C' MESSAGE WEIGHTED (0dB REF = RECOVERED AUDIO FOR +8kHz PEAK DEVIATION (dB) ­ 10 8 AUDIO OUT RSSI NE624 NE624 IF INPUT (µV) (1500) 100 1k 10k 100k AUDIO ­0 4V RSSI (VOLTS) ­20 3V THD + NOISE ­40 2V ­60 AM (80% MOD) 1V NOISE ­80 ­120 ­100 ­80 ­60 ­40 NE602 NE602 RF INPUT (dBm) (50) ­20 SR00444 SR00444 Figure 5. Typical Application Cellular Radio (45MHz to 455kHz) One of the outputs is available at Pin 9 to drive an external quadrature capacitor and L/C quadrature tank. CIRCUIT DESCRIPTION The SA624 SA624 is a very high gain, high frequency device. Correct operation is not possible if good RF layout and gain stage practices are not used. The SA624 SA624 cannot be evaluated independent of circuit, components, and board layout. A physical layout which correlates to the electrical limits is shown in Figure 3. This configuration can be used as the basis for production layout. Both of the limiting amplifier stages are DC biased using feedback. The buffered output of the final differential amplifier is fed back to the input through 42k resistors. As shown in Figure 4, the input impedance is established for each stage by tapping one of the feedback resistors 1.6k from the input. This requires one additional decoupling capacitor from the tap point to ground. The SA624 SA624 is an IF signal processing system suitable for IF frequencies as high as 21.4MHz. The device consists of two limiting amplifiers, quadrature detector, direct audio output, muted audio output, and signal strength indicator (with output characteristic). The sub-systems are shown in Figure 4. A typical application with 45MHz input and 455kHz IF is shown in Figure 5. 42k V+ 15 16 1.6k 1 IF Amplifiers 40k The IF amplifier section consists of two log-limiting stages. The first consists of two differential amplifiers with 39dB of gain and a small signal bandwidth of 41MHz (when driven from a 50 source). The output of the first limiter is a low impedance emitter follower with 1k of equivalent series resistance. The second limiting stage consists of three differential amplifiers with a gain of 62dB and a small signal AC bandwidth of 28MHz. The outputs of the final differential stage are buffered to the internal quadrature detector. 1997 Nov 07 70014 7k SR00445 SR00445 Figure 6. First Limiter Bias Because of the very high gain, bandwidth and input impedance of the limiters, there is a very real potential for instability at IF frequencies above 455kHz. The basic phenomenon is shown in Figure 8. Distributed feedback (capacitance, inductance and radiated fields) 7 Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI 42k SA624 SA624 9 11 V+ 12 40k 8 BPF BPF 10 40k 80k SR00447 SR00447 SR00446 SR00446 Figure 8. Feedback Paths Figure 7. Second Limiter and Quadrature Detector HIGH IMPEDANCE BPF HIGH IMPEDANCE BPF LOW IMPEDANCE a. Terminating High Impedance Filters with Transformation to Low Impedance BPF A BPF RESISTIVE LOSS INTO BPF b. Low Impedance Termination and Gain Reduction SR00448 SR00448 Figure 9. Practical Termination 430 16 15 14 13 12 11 10 9 6 7 8 NE 624 430 1 2 3 4 5 SR00449 SR00449 Figure 10. Crystal Input Filter with Ceramic Interstage Filter input level, the limited signal will begin to dominate the regeneration, and the demodulator will begin to operate in a "normal" manner. forms a divider from the output of the limiters back to the inputs (including RF input). If this feedback divider does not cause attenuation greater than the gain of the forward path, then oscillation or low level regeneration is likely. If regeneration occurs, two symptoms may be present: (1)The RSSI output will be high with no signal input (should nominally be 250mV or lower), and (2) the demodulated output will demonstrate a threshold. Above a certain 1997 Nov 07 There are three primary ways to deal with regeneration: (1) Minimize the feedback by gain stage isolation, (2) lower the stage input impedances, thus increasing the feedback attenuation factor, and (3) reduce the gain. Gain reduction can effectively be 8 Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI accomplished by adding attenuation between stages. This can also lower the input impedance if well planned. Examples of impedance/gain adjustment are shown in Figure 9. Reduced gain will result in reduced limiting sensitivity. SA624 SA624 Quadrature Detector Figure 7 shows an equivalent circuit of the SA624 SA624 quadrature detector. It is a multiplier cell similar to a mixer stage. Instead of mixing two different frequencies, it mixes two signals of common frequency but different phase. Internal to the device, a constant amplitude (limited) signal is differentially applied to the lower port of the multiplier. The same signal is applied single-ended to an external capacitor at Pin 9. There is a 90° phase shift across the plates of this capacitor, with the phase shifted signal applied to the upper port of the multiplier at Pin 8. A quadrature tank (parallel L/C network) permits frequency selective phase shifting at the IF frequency. This quadrature tank must be returned to ground through a DC blocking capacitor. A feature of the SA624 SA624 IF amplifiers, which is not specified, is low phase shift. The SA624 SA624 is fabricated with a 10GHz process with very small collector capacitance. It is advantageous in some applications that the phase shift changes only a few degrees over a wide range of signal input amplitudes. Additional information will be provided in the upcoming product specification (this is a preliminary specification) when characterization is complete. Stability Considerations The high gain and bandwidth of the SA624 SA624 in combination with its very low currents permit circuit implementation with superior performance. However, stability must be maintained and, to do that, every possible feedback mechanism must be addressed. These mechanisms are: 1) Supply lines and ground, 2) stray layout inductances and capacitances, 3) radiated fields, and 4) phase shift. As the system IF increases, so must the attention to fields and strays. However, ground and supply loops cannot be overlooked, especially at lower frequencies. Even at 455kHz, using the test layout in Figure 3, instability will occur if the supply line is not decoupled with two high quality RF capacitors, a 0.1µF monolithic right at the VCC pin, and a 6.8µF tantalum on the supply line. An electrolytic is not an adequate substitute. At 10.7MHz, a 1µF tantalum has proven acceptable with this layout. Every layout must be evaluated on its own merit, but don't underestimate the importance of good supply bypass. The loaded Q of the quadrature tank impacts three fundamental aspects of the detector: Distortion, maximum modulated peak deviation, and audio output amplitude. Typical quadrature curves are illustrated in Figure 12. The phase angle translates to a shift in the multiplier output voltage. Thus a small deviation gives a large output with a high Q tank. However, as the deviation from resonance increases, the non-linearity of the curve increases (distortion), and, with too much deviation, the signal will be outside the quadrature region (limiting the peak deviation which can be demodulated). If the same peak deviation is applied to a lower Q tank, the deviation will remain in a region of the curve which is more linear (less distortion), but creates a smaller phase angle (smaller output amplitude). Thus the Q of the quadrature tank must be tailored to the design. Basic equations and an example for determining Q are shown below. This explanation includes first-order effects only. At 455kHz, if the layout of Figure 3 or one substantially similar is used, it is possible to directly connect ceramic filters to the input and between limiter stages with no special consideration. At frequencies above 2MHz, some input impedance reduction is usually necessary. Figure 9 demonstrates a practical means. Frequency Discriminator Design Equations for SA624 SA624 VOUT As illustrated in Figure 10, 430 external resistors are applied in parallel to the internal 1.6k load resistors, thus presenting approximately 330 to the filters. The input filter is a crystal type for narrowband selectivity. The filter is terminated with a tank which transforms to 330. The interstage filter is a ceramic type which doesn't contribute to system selectivity, but does suppress wideband noise and stray signal pickup. In wideband 10.7MHz IFs the input filter can also be ceramic, directly connected to Pin 16. SR00450 SR00450 Figure 11. In some products it may be impractical to utilize shielding, but this mechanism may be appropriate to 10.7MHz and 21.4MHz IF. One of the benefits of low current is lower radiated field strength, but lower does not mean non-existent. A spectrum analyzer with an active probe will clearly show IF energy with the probe held in the proximity of the second limiter output or quadrature coil. No specific recommendations are provided, but mechanical shielding should be considered if layout, bypass, and input impedance reduction do not solve a stubborn instability. VO = 1 1+ where 1 = 1 1 Q1S + ( S) 1 2 (1a) VIN (1b) L(CP + CS) Q1 = R (CP + CS) 1 (1c) From the above equation, the phase shift between nodes 1 and 2, or the phase across CS will be: The final stability consideration is phase shift. The phase shift of the limiters is very low, but there is phase shift contribution from the quadrature tank and the filters. Most filters demonstrate a large phase shift across their passband (especially at the edges). If the quadrature detector is tuned to the edge of the filter passband, the combined filter and quadrature phase shift can aggravate stability. This is not usually a problem, but should be kept in mind. 1997 Nov 07 CS CP + C S 9 Philips Semiconductors Product specification High performance low power FM IF system with high-speed RSSI 1 = VO - VIN = (2) resonances close, and to get maximum attenuation of higher harmonics at 455kHz IF, we have found that a CS = 10pF and CP = 164pF (commercial values of 150pF or 180pF may be practical), will give the best results. A variable inductor which can be adjusted around 0.7mH should be chosen and optimized for minimum distortion. (For 10.7MHz, a value of CS = 1pF is recommended.) Q1 tg-1 1 1 ­ () 2 ( 1 ) Figure 12 is the plot of vs. Audio Outputs It is notable that at = 1, the phase shift is Two audio outputs are provided. Both are PNP current-to-voltage converters with 55k nominal internal loads. The unmuted output is always active to permit the use of signaling tones in systems such as cellular radio. The other output can be muted with 70dB typical attenuation. The two outputs have an internal 180° phase difference. and the response is close to a straight 2 2Q1 = line with a slope of 1 The signal VO would have a phase shift of ­ 2Q1 with respect to the V . IN 1 2 If VIN = A Sin t VO = A t + Sin The nominal frequency response of the audio outputs is 300kHz. this response can be increased with the addition of external resistors from the output pins to ground in parallel with the internal 55k resistors, thus lowering the output time constant. Singe the output structure is a current-to-voltage converter (current is driven into the resistance, creating a voltage drop), adding external parallel resistance also has the effect of lowering the output audio amplitude and DC level. (3) 2Q1 ­ 2 1 Multiplying the two signals in the mixer, and low pass filtering yields: (4) VIN · VO = A2 Sin t t + Sin 2Q1 2 2Q1 This technique of audio bandwidth expansion can be effective in many applications such as SCA receivers and data transceivers. Because the two outputs have a 180° phase relationship, FSK demodulation can be accomplished by applying the two output differentially across the inputs of an op amp or comparator. Once the threshold of the reference frequency (or "no-signal" condition) has been established, the two outputs will shift in opposite directions (higher or lower output voltage) as the input frequency shifts. The output of the comparator will be logic output. The choice of op amp or comparator will depend on the data rate. With high IF frequency (10MHz and above), and wide IF bandwidth (L/C filters) data rates in excess of 4Mbaud are possible. ­ 1 after low pass filtering VOUT = 1 2 A Cos 2 ­ 2 1 (5) ) = 1 A2 Sin 2Q1 2 1 ( VOUT 2Q1 For 2Q1 1 1 =