NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: ( DOC No. HX8218-A-DS HX8218-A-DS ) HX8218-A HX8218-A 960CH 960CH TFT LCD Source Driver with Built-in T-CON Preliminary version 01January, 2005 HX8218-A HX8218-A 960CH 960CH TFT LCD Source Driver with Built-in T-CON Preliminary Version 01 January, 2005 1. General Description HX8218-A HX8218-A is a 960-channel output Source Driver with built-in TCON and DAC. The interface follows digital 8-bits serial/24-bits parallel RGB, or CCIR601/656 CCIR601/656 input signals and digital control timing signals. The DAC supports transferring digital ... | Original |
46 pages, |
tp 2808 stv 4326 VN228 tvr 10471 QB51 vn109 VN67 analog QC39 3951 stv 8112 Himax stv 9331 HX8218-A-DS VP178 VP44 HX8218-A-DS abstract |
|
|||
| Abstract: TARGET SPECIFICATION PI6C2972 PI6C2972, PI6C2973 PI6C2973 Low Voltage PLL Clock Driver outputs can be realized by pulsing low one clock edge prior to the coincident edges of the Qa and Qc outputs. The Sync output will indicat ... | Original |
7 pages, |
PI6C2973FB PI6C2973 PI6C2972FB PI6C2972 2973 PI6C2972 abstract |
|
|||
| Abstract: PI6C2973 PI6C2973 Low Voltage PLL Clock Driver can be realized by pulsing low one clock edge prior to the coincident edges of the Qa and Qc outputs. The Sync output will indicate when the coincident rising edges of the ... | Original |
8 pages, |
PI6C2973FC PI6C2973 PI6C2973 abstract |
|
|||
| Abstract: PI6C2973-2 PI6C2973-2 Low Voltage PLL Clock Driver Features Description ... | Original |
6 pages, |
PS8623 PI6C2973-2 PI6C2973-2 abstract |
|
|||
| Abstract: PI6C2972 PI6C2972 Low Voltage PLL Clock Driver can be realized by pulsing low one clock edge prior to the coincident edges of the Qa and Qc outputs. The Sync output will indicate when the coincident rising edges of the ... | Original |
7 pages, |
PI6C2972FC PI6C2972 PI6C2972 abstract |
|
|||
| Abstract: PI6C2972 PI6C2972 Low Voltage PLL Clock Driver can be realized by pulsing low one clock edge prior to the coincident edges of the Qa and Qc outputs. The Sync output will indicate when the coincident rising edges of the ... | Original |
7 pages, |
PI6C2972FC PI6C2972 PI6C2972 abstract |
|
|||
| Abstract: CDC222 CDC222 1-LINE TO 15-LINE 15-LINE DIFFERENTIAL CLOCK DRIVER SCAS548A SCAS548A Â NOVEMBER 1995 Â REVISED JUNE 1996 D D D Low Output Skew for Clock-Distribution and Clock-Generation Applications Differential Low-Voltage Pseudo-ECL (LVPECL)-Compatible Inputs and Outputs Distributes Differential Clock Inputs to 15 Differential Clock Outputs D D D D Output Reference Voltage, VREF, Allows Distribution From a Single-Ended Clock Input Outputs Configurable to Provide 1X or 1/2X Input Reference ... | Original |
7 pages, |
CDC222 15-LINE SCAS548A CDC222 abstract |
|
|||
| Abstract: RoboClock® CY7B9973V CY7B9973V High-Speed Multi-Output PLL Clock Buffer Features Functional Description · 10-MHz  200-MHz output operation The CY7B9973V CY7B9973V Low-Voltage PLL Clock Buffer offers user-selectable frequency control over system clock functions. This twelve output clock driver provides the system integrator selectable frequency ratios of 1:1, 2:1, 3:1, 3:2, 4:3, 5:1, 5:2, 5:3, 6:1 and 6:5 between outputs. An additional output is dedicated to providing feedback information to allo ... | Original |
8 pages, |
MPC973 CY7B9973V-AC CY7B9973V CY7B9973V abstract |
|
|||
| Abstract: MOTOROLA Order this document from Timing Solutions Operation SEMICONDUCTOR TECHNICAL DATA Product Preview MC100EP222 MC100EP222 Low Voltage ECL/PECL 1:15 Clock Driver The MC100EP222 MC100EP222 is a low voltage, low skew 1:15 differential %1 and %2 ECL/PECL clock distribution buffer. The MC100EP222 MC100EP222 has been designed and optimized for 2.5V and 3.3V systems. Target applications for this clock driver are high performance clock distribution systems for computer, networking and telecommunication systems ... | Original |
8 pages, |
MC100EP222 AN1545 datasheet abstract |
|
|||
| Abstract: MC100LVE222 MC100LVE222 Low Voltage 1:15 Differential �� ECL/PECL Clock Driver The MC100LVE222 MC100LVE222 is a low skew 1:15 differential ��ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be differential or used singleç'nded (with VBB output reference bypassed and connected to the unused input of a pair). Either of two fully differential clock inputs may be selected. Each of the four output banks of 2, 3, 4, and 6 differential pairs may be independe ... | Original |
8 pages, |
MC100LVE222FAR2 MC100LVE222FA MC100LVE222 LVE222 MC100LVE222 abstract |
|
|||
| Abstract: MC100LVE222 MC100LVE222 3.3 V ECL 1:15 Differential ��Clock Driver The MC100LVE222 MC100LVE222 is a low skew 1:15 differential ��ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be differential or used single- ended (with VBB output reference bypassed and connected to the unused input of a pair). Either of two fully differential clock inputs may be selected. Each of the four output banks of 2, 3, 4, and 6 differential pairs may be independently configured to f ... | Original |
8 pages, |
MC100LVE222FAR2 MC100LVE222FA MC100LVE222 LVE222 AN1406/D AN1560/D MC100LVE MC100LVE222 abstract |
|
|||