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CD4046BNSR Texas Instruments CMOS Micropower Phase-Locked Loop 16-SO -55 to 125 visit Texas Instruments Buy
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CD4046BNSRE4 Texas Instruments CMOS Micropower Phase-Locked Loop 16-SO -55 to 125 visit Texas Instruments
CD4046BF Texas Instruments CMOS Micropower Phase-Locked Loop 16-CDIP -55 to 125 visit Texas Instruments
CD4046BF3A Texas Instruments CMOS Micropower Phase-Locked Loop 16-CDIP -55 to 125 visit Texas Instruments
CD4046BEE4 Texas Instruments CMOS Micropower Phase-Locked Loop 16-PDIP -55 to 125 visit Texas Instruments

PLL CD4046 application

Catalog Datasheet MFG & Type PDF Document Tags

CD4046

Abstract: CD4046 application note National Semiconductor Application Note 210 Robert Pease April 1979 A phase-locked-loop (PLL) is a servo system or in other words a feedback loop that operates with frequencies and phases PLL , as quickly as the basic PLL of Figure 1 The reason is the use of the CD4046 frequency detector When , final application of this PLL is as a wide-range sine generator The VFC in Figure 9 puts out an , tiny signals out of large noises Here however we will discuss a new kind of PLL which cannot work with
National Semiconductor
Original
CD4046 application note CD4046 APPLICATION CIRCUIT PLL CD4046 application CD4046 applications PLL cd4046 Andrzej Przedpelski optimize AN-210

PLL CD4046 application

Abstract: CD4046 , but will not respond as quickly as the basic PLL of Figure 1. The reason is the use of the CD4046 , Converters (and more) One final application of this PLL is as a wide-range sine generator. The VFC in , A phase-locked-loop (PLL) is a servo system, or, in other words, a feedback loop that operates with frequencies and phases. PLL's are well known to be quite useful (powerful, in fact) in , new kind of PLL which cannot work with low-level signals immersed in noise, but has a new set of
National Semiconductor
Original
CD4046 pll application note PLL design przedpelski 2n3565 equivalent transistor LM324 vs LM741 PIN OUT of CD4046 CMOS PLL LM741 single op-amp

PLL CD4046 application

Abstract: CD4046 application note National Semiconductor Application Note 210 Robert Pease April 1979 A phase-locked-loop (PLL , for Precision PLL of Figure 13 One final application of this PLL is as a wide-range sine generator , . PLL's are well known to be quite useful (powerful, in fact) in communications systems, where they can pluck tiny signals out of large noises. Here, however, we will discuss a new kind of PLL which cannot , require a clean noise-free input frequency such as a square wave or pulse train. This PLL can operate
National Semiconductor
Original
LF351 op-amp integrator LF351 m op-amp integrator LF351 op-amp integrator mhz CD4046 application cd4046 sine compare LM324 with LM741

CD4046 application demodulator

Abstract: 74HC4046 application note or directly coupled with standard input logic levels. This device is similar to the CD4046 except , harmonics than the other two comparators. In a typical application any one of the three comparators feed , means of looking at the VCO input without loading down modifying the characteristics of the PLL filter , information table and typical performance curves. By increasing the value of R2 the lock range of the PLL is , considered in the design. (The CD4046 also provides a voltage.) The XOR is more susceptible to locking
Fairchild Semiconductor
Original
74VHC4046 VHC4046 MTC16 CD4046 application demodulator 74HC4046 application note 74hc4046 for 32 khz 74VHC4046M MO-153 MS-001

4046 as FM demodulator

Abstract: fm MODULATOR 4046 directly coupled with standard input logic levels. This device is similar to the CD4046 except that the , harmonics than the other two comparators. In a typical application any one of the three comparators feed an , VCO input without loading down modifying the characteristics of the PLL filter. Features Low , range of the PLL is offset above 0Hz and the gain (Volts/rad.) does not change. In general, when offset , to the loop filter and this should be considered in the design. (The CD4046 also pro vides a voltage
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4046 as FM demodulator fm MODULATOR 4046 4046 loop filter 4046 application note pll demodulator PLL WITH VCO 4046 pll fm MODULATOR 4046

HC4046

Abstract: HC4046 pll application note with standard input logic levels This device is similar to the CD4046 except that the Zener diode of , a typical application any one of the three comparators feed an external filter network which in , loading down modifying the characteristics of the PLL filter Features Y Y Y Y Low dynamic , performance curves By increasing the value of R2 the lock range of the PLL is offset above 0Hz and the gain , considered in the design (The CD4046 also provides a voltage ) VCO input voltage must increase and the
National Semiconductor
Original
MM54HC4046 MM74HC4046 HC4046 HC4046 pll application note HC4046 application note hc4046 cmos CD4046 vco

CD4046 pll application note

Abstract: PLL CD4046 application or directly coupled with standard input logic levels. This device is similar to the CD4046 except , . In a typical application any one of the three comparators feed an external filter network which in , loading down modifying the characteristics of the PLL filter. Phase Comparator I is an exclusive OR , typical performance curves. By increasing the value of R2 the lock range of the PLL is offset above 0Hz , considered in the design. (The CD4046 also provides a voltage.) quency is fMAX then the VCO input must be
Fairchild Semiconductor
Original
CD4046 vco application note 74hc4046 74hc4046 PIN DIAGRAM 74VHC4046MTC 74VHC4046N M16A

CD4046 application demodulator

Abstract: CD4046 pll application note or directly coupled with standard input logic levels. This device is similar to the CD4046 except , harmonics than the other two comparators. In a typical application any one of the three comparators feed , means of looking at the VCO input without loading down modifying the characteristics of the PLL filter , information table and typical performance curves. By increasing the value of R2 the lock range of the PLL , in the design. (The CD4046 also provides a voltage.) quency is fMAX then the VCO input must be
Fairchild Semiconductor
Original
CD4046 equivalent CD4046 lock detect applications M16D MM74HC4046M MM74HC4046MTC MM74HC4046N

PLL CD4046 application

Abstract: CD4046 pll application note Lifm Application Note 24 TECHNOLOGY September 1987 Unique Applications for the LTC1062 , frequency programmability to be used advantageously in PLL designs. The circuit of Figure 1 illustrates the use of the LTC1062 as a loop filter. The power supplies for the circuit are a single 5V for the PLL and ± 5V for the LTC1062. The CMOS PLL is a CD4046B. The LTC1062 can also be used with a single 5V , into a three-state mode. CD4046 V+=5V â f0UT = Nxf|N Figure 1 /TLreAà .^^m r TECHNOLOGY AN24
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design a 60hz notch filter 250hz lowpass filter tunable notch filter cd4046b application VCO Og VCO cd4046

CD4046 vco

Abstract: CD4046 standard input logic levels. This device is similar to the CD4046 except that the Zener diode of the metal , two comparators. In a typical application any one of the three comparators feed an external filter , the VCO input without loading down modifying the characteristics of the PLL filter. Features n , lock range of the PLL is offset above 0Hz and the gain (Volts/rad.) does not change. In general, when , output to the loop filter and this should be considered in the design. (The CD4046 also provides a
Fairchild Semiconductor
Original
74hc4046 fairchild 74hc4046 application notes of cd4046 74hc4046 application CD4046 equivalent application comparator detector

CD4046 pll application note

Abstract: CD4046 vco standard input logic levels This device is similar to the CD4046 except that the Zener diode of the metal , In a typical application any one of the three comparators feed an external filter network which in , loading down modifying the characteristics of the PLL filter Features Y Y Y Y Y Low , information table and typical performance curves By increasing the value of R2 the lock range of the PLL is , should be considered in the design (The CD4046 also provides a voltage ) VCO input voltage must
National Semiconductor
Original
phase comparator CD4046 datasheet 74VHC
Abstract: or directly coupled with standard input logic levels. This device is similar to the CD4046 except , onto harmonics than the other two comparators. In a typical application any one of the three , means of looking at the VCO input without loading down modifying the characteristics of the PLL filter , information table and typical performance curves. By increasing the value of R2 the lock range of the PLL , output to the loop filter and this should be considered in the design. (The CD4046 also provides a Fairchild Semiconductor
Original

PLL CD4046 application

Abstract: CD4046 vco or directly coupled with standard input logic levels. This device is similar to the CD4046 except , harmonics than the other two comparators. In a typical application any one of the three comparators feed , means of looking at the VCO input without loading down modifying the characteristics of the PLL filter , information table and typical performance curves. By increasing the value of R2 the lock range of the PLL , this should be considered in the design. (The CD4046 also provides a voltage.) The XOR is more
Fairchild Semiconductor
Original
MM74HC4046SJ N16E

74hc161 application notes

Abstract: MC14046 application Switched-Capacitor-Filter Clocks Dec 29, 2000 APPLICATION NOTE 724 Generating Switched-Capacitor-Filter Clocks , to the application. Some SCFs are self-clocking with the addition of external components (for , frequency. When an application meets this binary criterion, the ripple counter is easy to implement (Figure , loops (PLLs) for SCF clocks is easier than for other PLL applications. SCF clock frequencies also allow use of the ubiquitous 4046 divider. This venerable CMOS IC (CD4046, MC14046, 74HC4046, etc.) is
Maxim Integrated Products
Original
74hc161 application notes MC14046 application 4046 application note pll 4046 analog IC 74HC161 CD4046 datasheet analog devices MAX280 MAX7490 MAX7426/MAX7427 MAX7408 AN724 APP724

PLL CD4046 application

Abstract: VCO cd4046 with standard input logic levels. This device is similar to the CD4046 except that the Zener diode of , comparators. In a typical application any one of the three comparators feed an external filter network which , without loading down modifying the characteristics of the PLL filter. CMOS Phase Lock Loop Features , range of the PLL is offset above 0Hz and the gain (Volts/rad.) does not change. In general, when offset , be considered in the design. (The CD4046 also provides a voltage.) Figure 4 shows the state tables
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metal detector diagram loop

PLL CD4046 application

Abstract: 74hc4046 PIN DIAGRAM . This device is similar to the CD4046 except that the Zener diode of the metal gate CMOS device has been , application any one of the three comparators feed an external filter network which in turn feeds the VCO input , the characteristics of the PLL filter. Features â  Low dynamic power consumption: (VCC = 4.5V) â , performance curves. By increasing the value of R2 the lock range of the PLL is offset above 0Hz and the gain , considered In the design. (The CD4046 also provides a voltage.) Figure 4 shows the state tables for all
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metal detector diagram PI

cd4046 app

Abstract: or directly coupled with standard input logic lev­ els. This device is similar to the CD4046 except , likely to lock onto harmonics than the other two comparators. In a typical application any one of the , the characteristics of the PLL filter. Features â  Low dynamic power consumption: (VCC=4.5V) â , CD4046 also pro­ vides a voltage.) The XOR is more susceptible to locking onto harmonics of the , comparator II operates in such a way as to force the PLL into lock with 0 phase difference between the VCO
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cd4046 app

PLL CD4046 motor application

Abstract: CD4046 rather than the output stage. See the application section under "Output swing enhancement" for hints on , . _Application Hints Output Swing Enhancement When the Feedback terminal is directly connected to the Output , to allow for device-to-device variations In Ojc- The actual power dissipation in a given application , of the CD4046. The output of the phase comparator passes through a low pass filter and drives the , comparator of the CD4046 increases or decreases the input voltage to the LH0101 until the shaft encoder
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LH0101ACK LH0101AK PLL CD4046 motor application CD4046 motor application power amplifier for servomotor driver CD4046 application note light servomotor cd4046 schematic LH0101K B7-R10

CD4046 application demodulator

Abstract: HC4046 pll application note directly coupled with standard input logic levels. This device is similar to the CD4046 except that the , less likely to lock onto harmonics than the other two comparators. In a typical application any one of , the PLL filter. Features â  Low dynamic power consumption: (Vcc= 4.5V) â  Maximum VCO operating , curves. VCO WITHOUT OFFSET R2 = =o By increasing the value of R2 the lock range of the PLL is offset , CD4046 also provides a voltage.) Figure 5 shows the state tables for all three comparators. PHASE
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DEMODULATOR CD4046

pll fm MODULATOR 4046

Abstract: fm MODULATOR 4046 standard input logic lev els. This device is similar to the CD4046 except that the Zener diode of the metal , a typical application any one of the three comparators feed an external filter network which in turn , down modifying the characteristics of the PLL filter. Features Low dynamic power consumption: (VCC , range of the PLL is offset above 0Hz and the gain (Volts/rad.) does not change. In general, when offset , considered in the design. (The CD4046 also pro vides a voltage.) Figure 5 shows the state tables for all
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4046 Phase Locked ic 4046 pll TRANSISTOR 1pz 4046 application note vco
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