NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: PINOUTS The NM27LV010 NM27LV010 is available in three packages a 32-pin LCC (leadless chip carrier with erase window) a 32-pin PLCC (plastic leaded chip carrier) and a 32-pin TSOP (thin small outline package) The LCC and PLCC pin configuration is shown in Figure 1 and the TSOP pin configuration is shown in Figure 2 The pin configuration of the LCC and PLCC packages conform to the JEDEC standard for conventional , 11368 Â 2 FIGURE 2 TSOP Pin Configuration TL D 11368 Â 1 FIGURE 1 LCC and PLCC Pin ... | Original |
2 pages, |
NM27LV010 NM27C010 C1995 BIOS 32 Pin PLCC PLCC pin configuration NM27LV010 abstract |
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| Abstract: 21 22 23 24 2S 2S 27 28 290414-2 Figure 2. PLCC Pin Configuration ¡fiiTi i1 , P21 3 Pit 3 Pio 290414-1 Figure 1. DIP Pin Configuration a Jll* 3 4 3 2 1 44 , 3*R 3A, 3RD 3EA a is s -s g s s g 3 a jt: H S IB. 290414-3 Figure 3. QFP Pin Configuration , UPITM-C42 UPITM-C42 UNIVERSAL PERIPHERAL INTERFACE CHMOS 8-BIT SLAVE MICROCONTROLLER Pin, Software and , UPI-42 UPI-42 family. It Is fabricated on Intels CHMOS lll-E process. The UPI-C42 UPI-C42 is pin, software, and ... | OCR Scan |
1 pages, |
UPI-C42 UPI-42 UPI-41 PLCC pin configuration P10C 240800 UPITM-C42 UPITM-C42 abstract |
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| Abstract: 16 30 »7 29 3 vK 18 19 20 2t 22 23 24 23 2« 27 28 290414-2 Figure 2. PLCC Pin Configuration , 24 0.C 18 23 3*22 O7C 19 22 3P2t v„C 20 21 â-¡ PI0 290414-1 Figure 1. DIP Pin Configuration , PERIPHERAL INTERFACE CHMOS 8-BIT SLAVE MICROCONTROLLER Pin, Software and Architecturally Compatible with all , Intel's CHMOS lll-E process. The UPI-C42 UPI-C42 is pin, software, and architecturally compatible with the NMOS , U 15 16 17 18 19 20 21 22 uuuuuLlUUUUU . "iiii'ua"! â- â- ' i? 290414-3 Figure 3. QFP Pin ... | OCR Scan |
1 pages, |
UPI-C42 UPI-42 UPI-41 UPITM-C42 UPITM-C42 abstract |
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| Abstract: Configuration Standard Mode Table 2. 44-Pin PLCC Pin Identification Pin # Symbol Function 1-2 3-4 , Mode 28-Pin PLCC Pin Configuration Table 4. 28-Pin DIP/SOIC/PLCC Pin Identification Pin # , to 5.5V) s 28-Pin DIP/SOIC/PLCC Packages (E33/733/E34 E33/733/E34) 40-Pin DIP Package (E43/743/E44 E43/743/E44) 44-Pin PLCC/QFP Packages (E43/743/E44 E43/743/E44) s Software Enabled Watch-Dog Timer (WDT) s s , Configuration Standard Mode Pin # Symbol Function 1 Direction 1 2-4 5-7 8-9 10 11 R ... | Original |
10 pages, |
Z86E44 Z86E43 Z86E34 Z86E33 Z86743 Z86733 P34-P35 P04-P06 p03 transistor 3 pin Z86E33/733/E34 Z86E43/743/E44 Z86E33/733/E34 abstract |
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| Abstract: EPROM November 1994 PLCC Pin Configuration TQFP Pin Configuration PLCC Pin Configuration , options 44-Pin PLCC 44 Pin TQFP Block Diagram TL D 11376 Â 1 TRI-STATE is a registered , foreseen this need and provides windowed LCC for prototyping and software development PLCC for , NM27LV210 NM27LV210 V F 250 250 NM27LV210 NM27LV210 VE FE 250 250 Note Surface mount PLCC package available for commercial and extended temperature ranges only Package Types NM27LV210 NM27LV210 V F V e PLCC package F e TQFP ... | Original |
10 pages, |
VEJ44A V44A NM27LV210 C1996 NM27LV210 abstract |
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| Abstract: Z8614 Z8614 DIP Z8614 Z8614 PLCC Note: Pins 8 and 9 actually are connected to the chip, although used only for testing. These pins must be used as floaters by the customer. 44-Lead PLCC Pin Configuration 40-Lead DIP Pin Configuration 3 Z8614 Z8614 CPS DC-4038-03 DC-4038-03 DC CHARACTERISTICS VCC = 4.75 V to 5.25V , with 4 Kbytes of ROM. The Z8614 Z8614 KBC is housed in 40-lead DIP and 44-lead PLCC packages, and is ... | Original |
4 pages, |
Z8614 PLCC pin configuration DC-4038-03 Z8614 abstract |
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| Abstract: Completely static operation INPUT/OUTPUT TTL compatible (three state output) 28-pin DIP 32-lead PLCC PIN CONFIGURATION (TOP VIEW) A6 [5 A5 [6 A4 [7 A3 [J A2 [J A1 fÃ- AO [Ãœ NC [fi? 00 [¡3 ^ 5! 8: o 81? 2 < < > z > l , technology and is contained in 28-pin DIP or 32-tead PLCG package. (OKI can provide programming service as per customer's request.) FEATURES +5V single power supply 32,768-word x 8-bit configuration Access ... | OCR Scan |
7 pages, |
MSM27C256HZB MAX525 MAX184 242M0 242M0 abstract |
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| Abstract: VCC XTAL2 XTAL1 P31 P32 P33 P34 P04 P27 P26 28-Pin DIP Pin Configuration 28-Pin PLCC , PLCC Pin Configuration 44-Pin PLCC Pin Identification Pin # Symbol Function Direction , 24 32 28-pinDIP,SOIC,PLCC 40-pin DIP, 44-pin PLCC, 44-pin QFP s 32 Input/Output Lines , ) * Not available on Z86233 Z86233. Available on Z86243 Z86243 44-Pin QFP and PLCC versions only. Functional Block , 14 15 28-Pin DIP/SOIC/PLCC Pin Identification P24 P35 Pin # Function Direction ... | Original |
18 pages, |
Z86243 Z86233 PLCC pin configuration P35-P34 p26 28 Z86233/243 CP96DZ81201 Z86233/243 abstract |
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| Abstract: , 28-PIN PLCC PIN CONFIGURATION 4 NC NC NC VCC Z86E134/E135/ Z86E134/E135/ 11 12 19 18 NC NC NC , , 44-PIN PLCC PIN CONFIGURATION 6 1 7 40 39 Z86E144/E145/E146 Z86E144/E145/E146 17 18 29 28 NC , 28-pin DIP/SOIC, 28-pin PLCC, 40-pin DIP, 44pin PLCC, and 44-pin QFP configurations are shown in Figures 3 through 7, respectively. FIGURE 3. ICSP MODE, 28-PIN DIP/SOIC PIN CONFIGURATION NC NC NC NC , QFP PIN CONFIGURATION 33 34 23 22 Z86E144/E145/E146 Z86E144/E145/E146 44 1 12 11 NC NC NC NC ... | Original |
21 pages, |
Z86E145 Z86E132 Z86E133 Z86E134 Z86E135 Z86E136 Z86E142 Z86E143 Z86E144 ICSP DS010301-Z8X0400 Z86E136 abstract |
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| Abstract: /Pnnted m U S A PLCC Pin Configuration PLCC Pin Configuration TQFP Pin Configuration o o lu x °i2 , active power @ 3.3V â- Surface mount package options _ 44-Pin PLCC - 44 Pin TQFP Block Diagram data , prototyping and software development, PLCC for production runs, TQFP for PC board sensitive users. The , NM27LV210V NM27LV210V, F, 200 200 NM27LV210V NM27LV210V, F, 250 250 Pin Names A0-A15 A0-A15 Addresses CE Chip Enable OË Output Enable , ) NM27LV210 NM27LV210 VE, FE, 150 150 NM27LV210VE NM27LV210VE, FE, 200 200 NM27LV210 NM27LV210 VE, FE, 250 250 Note: Surface mount PLCC ... | OCR Scan |
10 pages, |
NM27LV210 NM27LV210 abstract |
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| PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 0380417 XC1736D XC1736D XC1736D XC1736D XC1736E XC1736E XC1736E XC1736E 8 PIN DIP 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20 HW-137-PC20 HW-137-PC20 HW-137-PC20 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 XC17128D/L XC17128D/L XC17128D/L XC17128D/L XC17128E/X XC17128E/X XC17128E/X XC17128E/X 8 PIN DIP 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW DIP 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 www.datasheetarchive.com/files/xilinx/docs/wcd0000d/wcd00dde-v1.htm |
Xilinx | 17/07/1998 | 15.82 Kb | HTM | wcd00dde-v1.htm |
| TMS7000 TMS7000 TMS7000 TMS7000 Family of Devices TMS7000 TMS7000 TMS7000 TMS7000 Product Configurations Part Number Program Memory (Bytes) Data Memory (Bytes) RAM Off-Chip Memory Expansion (Bytes) Serial UART Interface Timers # I/O Pins #Pins/Package ROM EPROM 21-Bit 13-Bit 10-Bit TMS70C20 TMS70C20 TMS70C20 TMS70C20 2K - 128 64K - - 1 - 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C40 TMS70C40 TMS70C40 TMS70C40 4K - 128 64K - - 1 - 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C42 TMS70C42 TMS70C42 TMS70C42 4K - 256 64K Yes 2 - 1 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C82 TMS70C82 TMS70C82 TMS70C82 8K - 256 64K Yes 2 - 1 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70CT20 TMS70CT20 TMS70CT20 TMS70CT20 2K - 128 - - - 1 - 20 28 PDIP TMS www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/micro/products/7000_pts.htm |
Texas Instruments | 18/01/2000 | 9.47 Kb | HTM | 7000_pts.htm |
| TMS7000 TMS7000 TMS7000 TMS7000 Family of Devices TMS7000 TMS7000 TMS7000 TMS7000 Product Configurations Part Number Program Memory (Bytes) Data Memory (Bytes) RAM Off-Chip Memory Expansion (Bytes) Serial UART Interface Timers # I/O Pins #Pins/Package ROM EPROM 21-Bit 13-Bit 10-Bit TMS70C20 TMS70C20 TMS70C20 TMS70C20 2K - 128 64K - - 1 - 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C40 TMS70C40 TMS70C40 TMS70C40 4K - 128 64K - - 1 - 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C42 TMS70C42 TMS70C42 TMS70C42 4K - 256 64K Yes 2 - 1 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C82 TMS70C82 TMS70C82 TMS70C82 8K - 256 64K Yes 2 - 1 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70CT20 TMS70CT20 TMS70CT20 TMS70CT20 2K - 128 - - - 1 - 20 28 PDIP TMS www.datasheetarchive.com/files/texas-instruments/data/wwwti~1.com/sc/docs/micro/products/7000_pts.htm |
Texas Instruments | 17/01/2000 | 9.47 Kb | HTM | 7000_pts.htm |
| TMS7000 TMS7000 TMS7000 TMS7000 Family of Devices TMS7000 TMS7000 TMS7000 TMS7000 Product Configurations Part Number Program Memory (Bytes) Data Memory (Bytes) RAM Off-Chip Memory Expansion (Bytes) Serial UART Interface Timers # I/O Pins #Pins/Package ROM EPROM 21-Bit 13-Bit 10-Bit TMS70C20 TMS70C20 TMS70C20 TMS70C20 2K - 128 64K - - 1 - 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C40 TMS70C40 TMS70C40 TMS70C40 4K - 128 64K - - 1 - 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C42 TMS70C42 TMS70C42 TMS70C42 4K - 256 64K Yes 2 - 1 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70C82 TMS70C82 TMS70C82 TMS70C82 8K - 256 64K Yes 2 - 1 32 40 PDIP/44 PDIP/44 PDIP/44 PDIP/44 PLCC TMS70CT20 TMS70CT20 TMS70CT20 TMS70CT20 2K - 128 - - - 1 - 20 28 PDIP TMS www.datasheetarchive.com/files/texas-instruments/sc/docs/micro/products/7000_pts.htm |
Texas Instruments | 03/01/1997 | 7.05 Kb | HTM | 7000_pts.htm |
| support a wide variety of package types and pin configurations. Each of the socket adapters is 8 PIN DIP 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20 HW-137-PC20 HW-137-PC20 HW-137-PC20 DIP 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 DIP 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 www.datasheetarchive.com/files/xilinx/docs/rp00006/rp0061a.htm |
Xilinx | 29/02/2000 | 25.36 Kb | HTM | rp0061a.htm |
| (E)PROMs and Micros up to and beyond 84 pins. The concept of the MULTISYTE is to put multiple electrically isolated programming electronics under the same controller. Each programming site has its own universal pin drivers that can be controlled separately or in parallel. With a full function pin driver for every pin exchanging the "TOPs" or mounting adapters. Both solutions are available for all packages up to 288 pins Three Basic Configurations GANG or SWAP Mode for Highest Throughputs Testvector Support Up www.datasheetarchive.com/files/intel/design/mcs96/devtools/708321ae.htm |
Intel | 05/11/1998 | 6.15 Kb | HTM | 708321ae.htm |
| (E)PROMs and Micros up to and beyond 84 pins. The concept of the MULTISYTE is to put multiple electrically isolated programming electronics under the same controller. Each programming site has its own universal pin drivers that can be controlled separately or in parallel. With a full function pin driver for every pin exchanging the "TOPs" or mounting adapters. Both solutions are available for all packages up to 288 pins Three Basic Configurations GANG or SWAP Mode for Highest Throughputs Testvector Support Up www.datasheetarchive.com/files/intel/design/mcs96/devtools/6a74e1ae.htm |
Intel | 02/08/1998 | 5.82 Kb | HTM | 6a74e1ae.htm |
| variety of package types and pin configurations. Each of the socket adapters is an 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20 HW-137-PC20 HW-137-PC20 HW-137-PC20 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20 HW-137-PC20 HW-137-PC20 HW-137-PC20 DIP 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 DIP 20 PIN PLCC 8 PIN SO/VOIC HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-DIP8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 HW-137-PC20/SO8 www.datasheetarchive.com/files/xilinx/docs/wcd00010/wcd010a2.htm |
Xilinx | 16/02/1999 | 21.38 Kb | HTM | wcd010a2.htm |
| 52-Pin Plastic Leaded Chip Carrier (PLCC) 64-Pin Plastic Quad Flat Pack MC68HC711E20CFN2 MC68HC711E20CFN2 MC68HC711E20CFN2 MC68HC711E20CFN2 52-pin PLCC Active 20VFN2 20VFN2 20VFN2 20VFN2 52-Pin PLCC Active 20MFN2 20MFN2 20MFN2 20MFN2 52-Pin PLCC Active 20CFN3 20CFN3 20CFN3 20CFN3 52-pin PLCC Active www.datasheetarchive.com/files/motorola/prodcat/psp/711e20.htm |
Motorola | 16/02/2000 | 29.06 Kb | HTM | 711e20.htm |
| reconfigured to match your planned memory configuration. This permits you to closely match the execution speeds hardware design. The address/data bus pins, port pins and other necessary device pins, including reset pins and operate the board in a standalone system mode to evaluate the system design. Tool Availability 83C196JR 83C196JR 83C196JR 83C196JR - 52ldPLCC 83C196JT 83C196JT 83C196JT 83C196JT - 52ldPLCC 87C196JQ 87C196JQ 87C196JQ 87C196JQ - 52ldPLCC 87C196JR 87C196JR 87C196JR 87C196JR - 52ldPLCC 87C196JT 87C196JT 87C196JT 87C196JT - 52ldPLCC 87C196JV 87C196JV 87C196JV 87C196JV - 52ldPLCC 87C196KR 87C196KR 87C196KR 87C196KR - 68ldPLCC 8XC196JX 8XC196JX 8XC196JX 8XC196JX - 68ldPLCC 8XC196KB 8XC196KB 8XC196KB 8XC196KB - 68 www.datasheetarchive.com/files/intel/design/mcs96/devtools/6e3461ae.htm |
Intel | 05/11/1998 | 5.97 Kb | HTM | 6e3461ae.htm |