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EPC1441LC20N Altera Corporation IC 440800 X 1 CONFIGURATION MEMORY, PQCC20, PLASTIC, LCC-20, Programmable ROM ri Buy
EPC1LI20 Altera Corporation IC 1046496 X 1 CONFIGURATION MEMORY, PQCC20, PLASTIC, LCC-20, Programmable ROM ri Buy
EPC1441LI20N Altera Corporation IC 440800 X 1 CONFIGURATION MEMORY, PQCC20, PLASTIC, LCC-20, Programmable ROM ri Buy

PLCC pin configuration

Catalog Datasheet Results Type PDF Document Tags
Abstract: PINOUTS The NM27LV010 NM27LV010 is available in three packages a 32-pin LCC (leadless chip carrier with erase window) a 32-pin PLCC (plastic leaded chip carrier) and a 32-pin TSOP (thin small outline package) The LCC and PLCC pin configuration is shown in Figure 1 and the TSOP pin configuration is shown in Figure 2 The pin configuration of the LCC and PLCC packages conform to the JEDEC standard for conventional , 11368 ­ 2 FIGURE 2 TSOP Pin Configuration TL D 11368 ­ 1 FIGURE 1 LCC and PLCC Pin ... Original
datasheet

2 pages,
66.98 Kb

NM27LV010 NM27C010 C1995 BIOS 32 Pin PLCC PLCC pin configuration NM27LV010 abstract
datasheet frame
Abstract: and One-Time Programmable EPROM (OTP). 290414-1 Figure 1. DIP Pin Configuration 290414-2 Figure 2. PLCC Pin Configuration Figure 3. QFP Pin Configuration The complete document fo r this , Packages (See Packaging Spec., Order #240800, Package Type P, N, and S) Pin, Software and , fabricated on Intel's CHMOS lll-E process. The UPI-C42 UPI-C42 is pin, software, and architecturally compatible with ... OCR Scan
datasheet

1 pages,
48.07 Kb

UPI-C42/UPI-L42 UPI-C42/UPI-L42 abstract
datasheet frame
Abstract: DIP Pin Configuration a a ft_ O. n_ (V y a s a as 2 1 0 3 9 3 -3 Figure 2. PLCC Pin Configuration The complete document for this product is available on Intel's "Data-on-Demand" CD-ROM product. , UPI-41AH/42AH UPI-41AH/42AH UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER UPI-41 UPI-41: 6 MHz; UPI-42 UPI-42: 12.5 MHz Pin, Software and Architecturally Compatible with all UPI-41 UPI-41 and UPI-42 UPI-42 Products 8-Bit CPU , ). All UPI-41 UPI-41 AH and UPI-42AH UPI-42AH devices are fully pin compatible for easy transition from prototype to ... OCR Scan
datasheet

1 pages,
43.36 Kb

UPI-41AH/42AH UPI-41 UPI-42 UPI-42AH UPI-41AH/42AH abstract
datasheet frame
Abstract: 8 C 9 C 10 C 11 C 12 PACKAGE: 24-pin D.I.P. * Also available 28-pin PLCC Pin configuration , Simplifies the interface of COM90C56 COM90C56 to lower cost DRAM Single + 5 v supply PIN CONFIGURATION ' VJ7 24 ... OCR Scan
datasheet

2 pages,
107.76 Kb

COM90C56 64k DRAM datasheet abstract
datasheet frame
Abstract: Configuration Standard Mode Table 2. 44-Pln PLCC Pin Identification P in# 1-2 3-4 5 6-10 11 12 13 14-16 17-19 , o > > Figure 7 ,44-Pin PLCC Pin Configuration EPROM Programming Mode Table 5. 44-Pin PLCC Pin Configuration EPROM Programming Mode Pin# 1-2 3-5 6-10 11-13 14-16 17-22 23-24 25-27 28 Table 5. 44-Pin PLCC , Standard Mode 28-Pln DIP/SOIC Pin Configuration Figure 10. Standard Mode 28-Pln PLCC Pin Configuration , J> Figure 12. EPROM Programming Mode 28-Pin PLCC Pin Configuration DS97Z8X1500 DS97Z8X1500 PRELIMINARY ... OCR Scan
datasheet

25 pages,
1074.73 Kb

Z86E33/733/E34 Z86E43/743/E44 Z86E33/733/E34 abstract
datasheet frame
Abstract: 16 30 »7 29 3 vK 18 19 20 2t 22 23 24 23 2« 27 28 290414-2 Figure 2. PLCC Pin Configuration , 24 0.C 18 23 3*22 O7C 19 22 3P2t v„C 20 21 - PI0 290414-1 Figure 1. DIP Pin Configuration , PERIPHERAL INTERFACE CHMOS 8-BIT SLAVE MICROCONTROLLER Pin, Software and Architecturally Compatible with all , Intel's CHMOS lll-E process. The UPI-C42 UPI-C42 is pin, software, and architecturally compatible with the NMOS , U 15 16 17 18 19 20 21 22 uuuuuLlUUUUU . "iiii'ua"! -- ' i? 290414-3 Figure 3. QFP Pin ... OCR Scan
datasheet

1 pages,
98.62 Kb

UPI-C42 UPI-42 UPI-41 3P2T datasheet abstract
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Abstract: 21 22 23 24 2S 2S 27 28 290414-2 Figure 2. PLCC Pin Configuration ¡fiiTi i1 , P21 3 Pit 3 Pio 290414-1 Figure 1. DIP Pin Configuration a Jll* 3 4 3 2 1 44 , 3*R 3A, 3RD 3EA a is s -s g s s g 3 a jt: H S IB. 290414-3 Figure 3. QFP Pin Configuration , UPITM-C42 UPITM-C42 UNIVERSAL PERIPHERAL INTERFACE CHMOS 8-BIT SLAVE MICROCONTROLLER Pin, Software and , UPI-42 UPI-42 family. It Is fabricated on Intels CHMOS lll-E process. The UPI-C42 UPI-C42 is pin, software, and ... OCR Scan
datasheet

1 pages,
130.86 Kb

UPI-C42 UPI-42 UPI-41 PLCC pin configuration P10C 240800 UPITM-C42 UPITM-C42 abstract
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Abstract: Configuration Standard Mode Table 2. 44-Pin PLCC Pin Identification Pin # Symbol Function 1-2 3-4 , Mode 28-Pin PLCC Pin Configuration Table 4. 28-Pin DIP/SOIC/PLCC Pin Identification Pin # , to 5.5V) s 28-Pin DIP/SOIC/PLCC Packages (E33/733/E34 E33/733/E34) 40-Pin DIP Package (E43/743/E44 E43/743/E44) 44-Pin PLCC/QFP Packages (E43/743/E44 E43/743/E44) s Software Enabled Watch-Dog Timer (WDT) s s , Configuration Standard Mode Pin # Symbol Function 1 Direction 1 2-4 5-7 8-9 10 11 R ... Original
datasheet

10 pages,
41.99 Kb

Z86E44 p03 transistor 3 pin P04-P06 P34-P35 PLCC pin configuration Z86733 Z86743 Z86E33 Z86E34 Z86E43 diode p25 Z86E33/733/E34 Z86E43/743/E44 Z86E33/733/E34 abstract
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Abstract: c C C C C 17 18 u u lo o CL Figure 3 . 44-Pin PLCC Pin Configuration Standard Mode , Figure 5. Standard Mode 28-Pin DIP/SOIC Pin Configuration Table 4. 28-Pin DIP/SOIC/PLCC Pin , Configuration identical on DIP and Cerdip W indow Lid style packages. Figure 6. Standard Mode 28-Pin PLCC Pin , Temperature (Vc c = 3.5V to 5.5V) Extended Temperature (Vc c = 4.5V to 5.5V) 28-Pin DIP/SOIC/PLCC Packages (E33/733/E34 E33/733/E34) 40-Pin DIP Package (E43/743/E44 E43/743/E44) 44-Pin PLCC/QFP Packages (E43/743/E44 E43/743/E44) Software Enabled ... OCR Scan
datasheet

14 pages,
635.71 Kb

Z86E33/733/E34 Z86E43/743/E44 Z86E33/733/E34 abstract
datasheet frame
Abstract: '- 1 - 1 - - Figure 3. 44-Pin PLCC Pin Configuration Table 2. 44-Pin PLCC Pin , Figure 5. 44-Pin PLCC Pin Configuration (EPROM Mode) Table 4. 44-Pin PLCC Pin Identification P in # 1 , 8K OTP FEATURES 40-Pin DIP or 44-Pin PLCC Package 4.5V to 5.5V Operating Range Low P ow e r C , Pin Configuration DS97KEY1800 DS97KEY1800 3 ZlLOG Z 86E 23 K e ybo a r d C o ntro ller PIN , Pin Configuration (EPROM Mode) 5 ZlLOG Z 86E 23 K e ybo a r d C o ntro ller PIN ... OCR Scan
datasheet

14 pages,
313.82 Kb

Z86E23 Z86E23 abstract
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Datasheet Content (non pdf)

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ISA/AT Bus Data and Interrupt Signals Require No Buffer Available in 44-Pin Plastic Leaded Chip Carrier (PLCC) and 48-Pin TQFP Package description The TL16PNP100A TL16PNP100A TL16PNP100A TL16PNP100A responds to the plug-and-play (PnP) autoconfiguration process. The process puts all PnP cards in a configuration mode, isolates cards, the process uses the CSN to configure the card by writing to the configuration registers. The TL16PNP100A TL16PNP100A TL16PNP100A TL16PNP100A implements configuration registers only for I/O applications with two logical devices, and DMA
www.datasheetarchive.com/files/texas-instruments/data/html/slls200b.htm
Texas Instruments 31/05/1997 2 Kb HTM slls200b.htm
(16MHz) (OSC-3) [Already mounted] Pin conversion board (M37780T-PTC M37780T-PTC M37780T-PTC M37780T-PTC) Oscillator board (bare board, OSC-1) Connector pin for OSC-1 Instruction manual Hardware Configuration Evaluation MCU Target system power voltage 5V±5% Connection with target system 84-pin 1.27mm-pitch PLCC Connected to the IC socket for the 84-pin PLCC on the target system 100-pin 0.65mm-pitch LCC Connected to the IC socket for 100-pin LCC on the target system via M37780T-PTC M37780T-PTC M37780T-PTC M37780T-PTC. [Ordering Information
www.datasheetarchive.com/files/mitsubishi/docs/tool/datsheet/7700_e/pod/80t_hpd.htm
Mitsubishi 24/07/2000 2.55 Kb HTM 80t_hpd.htm
) Plastic Pin Grid Array (PPGA) Plastic Leaded Chip Carrier (PLCC) Plastic Gull Wing Lead Configuration Solder Plate Lead Finish Molded Package Plastic Package Gull Wing Lead Configuration Solder Plate Lead Finish Molded Package EIAJ and JEDEC Package Format Plastic Pin Grid Array (PPGA) Package Characteristics: Through Chip Carrier (PLCC) Package Characteristics: Surface Mount Package J-Bend Lead
www.datasheetarchive.com/files/national/htm/nsc01716-v7.htm
National 13/08/1999 9.31 Kb HTM nsc01716-v7.htm
) Plastic Pin Grid Array (PPGA) Plastic Leaded Chip Carrier (PLCC) Plastic Gull Wing Lead Configuration Solder Plate Lead Finish Molded Package Plastic Package Gull Wing Lead Configuration Solder Plate Lead Finish Molded Package EIAJ and JEDEC Package Format Plastic Pin Grid Array (PPGA) Package Characteristics: Through Chip Carrier (PLCC) Package Characteristics: Surface Mount Package J-Bend Lead
www.datasheetarchive.com/files/national/htm/nsc01716-v6.htm
National 13/08/1999 9.31 Kb HTM nsc01716-v6.htm
) Plastic Pin Grid Array (PPGA) Plastic Leaded Chip Carrier (PLCC) Plastic Wing Lead Configuration Solder Plate Lead Finish Molded Package Plastic Package Dimensional Configuration Solder Plate Lead Finish Molded Package EIAJ and JEDEC Package Styles Plastic Package /Thermal Data for Through Hole, Dual-In-Line Packages in Table Format Plastic Pin Grid Array Packages in Table Format Plastic Leaded Chip Carrier (PLCC) Package Characteristics
www.datasheetarchive.com/files/national/htm/nsc04914.htm
National 18/12/1998 7.68 Kb HTM nsc04914.htm
) Plastic Pin Grid Array (PPGA) Plastic Leaded Chip Carrier (PLCC) Plastic Wing Lead Configuration Solder Plate Lead Finish Molded Package Plastic Package Dimensional Configuration Solder Plate Lead Finish Molded Package EIAJ and JEDEC Package Styles Plastic Package /Thermal Data for Through Hole, Dual-In-Line Packages in Table Format Plastic Pin Grid Array Packages in Table Format Plastic Leaded Chip Carrier (PLCC) Package Characteristics
www.datasheetarchive.com/files/national/htm/nsc01793-v4.htm
National 16/09/1998 7.68 Kb HTM nsc01793-v4.htm
) Plastic Pin Grid Array (PPGA) Plastic Leaded Chip Carrier (PLCC) Plastic Gull Wing Lead Configuration Solder Plate Lead Finish Molded Package Plastic Package Gull Wing Lead Configuration Solder Plate Lead Finish Molded Package EIAJ and JEDEC Package Format Plastic Pin Grid Array (PPGA) Package Characteristics: Through Chip Carrier (PLCC) Package Characteristics: Surface Mount Package J-Bend Lead
www.datasheetarchive.com/files/national/docs/wcd0003a/wcd03a61.htm
National 03/04/1998 7.02 Kb HTM wcd03a61.htm
packages, ranging from 20-pin PLCC to 44-pin VQFP. XC1800 XC1800 XC1800 XC1800 PROMs will be the industry's first PLD XILINX ANNOUNCES INDUSTRY'S FIRST PARALLEL-LOAD ISP CONFIGURATION PROM First devices of new (ISP), serial/parallel-load FPGA/CPLD configuration PROMs , the XC1800 XC1800 XC1800 XC1800 " series. Configuration , initially ranging from 128 Kbits to 4 Mbits of configuration memory, dramatically increases the range of programmable logic device densities that can be served by a single configuration chip while setting a new
www.datasheetarchive.com/files/xilinx/docs/rp00002/rp0029e.htm
Xilinx 29/02/2000 9.58 Kb HTM rp0029e.htm
Active Comm 28 Ld PDIP N/A 2.96 CS82C59A CS82C59A CS82C59A CS82C59A Active Comm 28 Ld PLCC 1 3.55 CS82C59A-12 CS82C59A-12 CS82C59A-12 CS82C59A-12 Active Comm 28 Ld PLCC 1 6.08 CS82C59A-1296 CS82C59A-1296 CS82C59A-1296 CS82C59A-1296 Active Comm 28 Ld PLCC T+R 1 6.45 CS82C59A-12Z CS82C59A-12Z CS82C59A-12Z CS82C59A-12Z Active Comm 28 Ld PLCC 3 6.08 CS82C59A-12Z96 CS82C59A-12Z96 CS82C59A-12Z96 CS82C59A-12Z96 Active Comm 28 Ld PLCC T+R 3 6.45 CS82C59A96 CS82C59A96 CS82C59A96 CS82C59A96 Active Comm 28 Ld PLCC T+R 1 3.68 CS82C59AZ CS82C59AZ CS82C59AZ CS82C59AZ Active Comm 28 Ld PLCC
www.datasheetarchive.com/files/intersil/device_pages/device_82c59a.html
Intersil 07/09/2006 35.31 Kb HTML device_82c59a.html
for set-up configuration Programmable pick and place for speed and position Mechanical sensing pin one orientation Optional vision system for ink, laser mark and lead defects Detail Matrix: Part & Package Status Availability 28F010 28F010 28F010 28F010 - PLCC-32 ld 28F010 28F010 28F010 28F010 - PLCC-32 ld 28F020 28F020 28F020 28F020 - PLCC-32 ld 28F020 28F020 28F020 28F020 - PLCC-32 ld Released Released Released
www.datasheetarchive.com/files/intel/design/flcomp/devtools/5089a_~1.htm
Intel 31/01/1997 3.22 Kb HTM 5089a_~1.htm